JPS6232430B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a display selection circuit for a multifunction watch, and particularly to a circuit for selecting only necessary functions and sequentially displaying them in a multifunction watch having a time display function and a plurality of additional functions. Generally, time display function and date display, alarm,
A multi-function watch that has additional functions such as a timer is provided with a switching display circuit for switching and displaying each function as necessary. As a switching display circuit for such a multi-function watch,
Conventionally, the following circuits have been used. FIG. 1 shows a schematic configuration of a switching display circuit of such a conventional multi-function watch. In the figure, a switch circuit 12 is connected to a display switching circuit 10 having a plurality of functions for switching and displaying necessary functions. ing. The switch circuit 12 is composed of a contact piece 14 and contacts 16a, 16b, 16c, and 16d of the same number as the number of functions, and the contact piece 14 is a contact that connects to a desired display function,
For example, if you want to display the time display function, contact 1
6a, the function can be displayed on the display unit 18 connected to the display switching circuit 10 by lighting up all the digits at the same time. Note that this lighting method is called a static lighting method. However, as is clear from the figure, the conventional switching display circuit for a multi-function timepiece has the disadvantage that as the number of display functions increases, the number of pins of the timepiece integrated circuit increases accordingly. Therefore, a switching display circuit for a multi-function watch as shown in FIG. 2 has been developed. FIG. 3 shows a more detailed configuration of the switching display circuit shown in FIG. Functional circuits 20, 22, 2 having
4 and 26 are provided. In addition, display switching circuit 1
9 is a switching circuit 2 for switching the display of each function.
8 is provided, and the switching circuit 28 includes a switching ring counter 30 and a plurality of gates 32a, 32b, 32.
A display switching switch 38 is connected to the input terminal of the switching ring counter 30 in order to switch the switching circuit 28. Every time the changeover switch 38 is pressed once, the changeover ring counter 30 changes 200a → 200b → 200.
A switching signal of "1" is repeatedly output in the order of c → 200d → 200a, and the OR gate 34 outputs switching signals for each function in the order of time display function → date display function → alarm time display function → timer time display function → time display function. is output. According to this method, each function is switched and displayed in sequence each time one of the display changeover switches 38 is pressed once, so the advantage is that even if the number of additional functions increases, the number of pins on the watch integrated circuit is sufficient. have. On the other hand, the digit selection circuit 4 is connected to the output terminal of the switching circuit 28.
0 is connected, and the digit selection circuit 40 receives digit selection signals 202a, 202b, 202c, 2 from the digit selection ring counter 42 connected to its input terminal.
02d, the display digits are sequentially selected one by one, and a display signal is output to the display unit 48 via the decoder 44 and driver 46. In addition, each digit selection signal 202a, 202b, 202 of the digit selection ring counter 42
c, 202d are connected to the display unit 48 via the driver 50.
The signals are sequentially output, and accordingly, each display digit of the display section 48 is sequentially activated. In this way, the display digits of the display unit 48 are lit one by one, and in the case shown in this figure, four digits are displayed, but the lighting speed is so fast that the lights do not appear simultaneously to the human eye. It looks like it is. This lighting method is called a dynamic lighting method. However, the display selection circuit of such a conventional multi-function watch has the disadvantage that a new integrated circuit must be designed each time an additional function is added or deleted. An object of the present invention is to eliminate the above-mentioned conventional drawbacks, and to provide a multifunctional watch that does not require designing a new integrated circuit every time an additional function is added or deleted from the watch, and allows only the necessary functions to be easily selected. The object of the present invention is to provide a display selection circuit. In order to achieve the above object, the present invention includes an oscillation circuit that outputs a reference signal, a frequency divider circuit that is connected to this oscillation circuit and divides the frequency of the reference signal, and a frequency divider circuit that is connected to a time display output terminal of this frequency divider circuit. , a time clock circuit that measures the current time using a frequency division signal, and a plurality of additional functions connected to the time display output terminal of the frequency division circuit or the time output terminal of the time clock circuit, each having a different function other than the time display function. A circuit, an externally operable display changeover switch for selectively switching each function, and an input terminal connected to the display changeover switch, count the number of times the display changeover switch is operated, and display a display according to the count value. A switching ring counter that outputs a selection signal, each input being connected to a selection signal output terminal of this switching ring counter and an output terminal of the time clock circuit and additional function circuit, and a display selection signal from the switching ring counter. a gate circuit that selects and outputs either one of the output signals from the time clock circuit or the additional function circuit in response to the clock signal, a display section having a plurality of display digits, and a clock input terminal of the frequency divider circuit; A clock pulse output terminal is connected, each of the plurality of output terminals is connected to a corresponding display digit of the display section, and a digit selection signal is sequentially transmitted to each of the output terminals in response to a clock pulse from the frequency dividing circuit. A digit selection ring counter that is repeatedly generated and connected to select each display digit of the display unit, and a digit selection ring counter that is connected to an output terminal of the gate circuit and a plurality of output terminals of the digit selection ring counter, and that is connected to the output terminal of the gate circuit. A digit selection circuit that repeatedly selects and outputs the output signal from the gate circuit for each display digit in response to the digit selection signal from the ring counter; a decoder that converts the output signal of the decoder into a display signal that can be displayed on the display section; and a decoder that is connected between the output terminal of this decoder and the input terminal of the display section, and that amplifies the display signal from the decoder and displays it on the display section. A first driver that inputs input to each display digit of a second driver that supplies a drive signal to drive each display digit of the display section; and a second driver that is connected to the reset terminal of the time clock circuit and the switching ring counter, and that operates the time clock in response to power connection. and an initial reset circuit that supplies an initial reset pulse to a reset terminal of a switching ring counter, which is connected to a specific output terminal of the second driver and is driven by the second driver. a digit selection signal detection circuit that extracts and outputs the signal;
The data input terminal is connected to the output terminal of the digit selection signal detection circuit and each output terminal of the digit selection ring counter, and the clock input terminal is connected to the clock pulse output terminal of the frequency dividing circuit.
Furthermore, the output terminal of the initial reset circuit is connected to the reset terminal, and in synchronization with the initial reset pulse from the initial reset circuit and the clock pulse from the frequency divider circuit, the output terminal is connected to the output terminal of the initial reset circuit, which is in phase with the drive signal from the digit selection signal detection circuit. a storage circuit having a plurality of storage sections each storing only a digit selection signal from the digit selection ring counter; one input terminal is connected to one output terminal of the switching ring counter; the other input terminal is connected to one output terminal of the switching ring counter; It consists of a plurality of AND gate groups each having one corresponding output terminal of the storage circuit connected to the terminal, and is supplied with both the display selection signal from the switching ring counter and the storage signal from the storage circuit. A matching circuit that generates a matching signal on the output line of only the AND gate that has been input, and a plurality of output lines of this matching circuit, connected to the display changeover switch and the clock pulse output terminal of the frequency dividing circuit, and a matching circuit that generates a matching signal on the output line. and a correction circuit that passes the clock pulse from the frequency dividing circuit on the condition that a coincidence signal exists, and supplies it to the clock input terminal of the switching ring counter as a correction switching signal in addition to the operation signal of the display switching switch. It is characterized by The present invention will be explained below based on the drawings. FIG. 4 shows a preferred embodiment of the display selection circuit for a multifunctional watch according to the present invention, and FIG. 5 shows a detailed circuit of the display selection circuit shown in FIG. 4. The same members as those in the conventional example are given the same reference numerals, and their explanations will be omitted. In the figure, the display selection circuit of the multi-function watch includes function circuits 20, 22, 24, 26 having a time display function and all additional functions that can be considered in advance, in this embodiment, a date display, an alarm, and a timer.
is provided. In order to select the required functions, in this embodiment, the time display, date display, and alarm time display, a driver 5 is provided on the output side of the digit selection ring counter 42.
A digit selection signal detection circuit 52 is provided via 0,
The digit selection signal detection circuit 52 includes diodes 54a and 54 connected only to the output terminal of the required function display among the output terminals of the digit selection ring counter 42.
b, 54c. In order to sequentially repeat and display only each selected function, the display selection circuit includes a switching circuit 5.
6 is provided, and the switching circuit 56 is configured as follows. That is, at the output end of the digit selection signal detection circuit 52, a storage circuit 58 is provided to store an unnecessary additional function, that is, a time display function in this embodiment, based on the detection signal 204 extracted by the digit selection signal detection circuit 52. is provided. This memory circuit 58 is a group of AND gates that input each digit selection signal 202a, 202b, 202c, 202d of the digit selection ring counter 42, the detection signal 204 of the digit selection signal detection circuit 56, or the frequency division signal 206 of the frequency division circuit 60. 62, and flip-flop circuits 64, 66, 68, and 70 to which gate signals from the AND gate group 62 are input. Also, a plurality of flip-flop circuits 72, 74,
On the output side of the switching ring counter 30 and the memory circuit 58, which are composed of 76 and 78, when the switching ring counter 30 selects an unnecessary timer time display function, the function is not displayed on the display section 48. A correction circuit 80 and a matching circuit 81 are provided. This coincidence circuit 81 is connected to each flip-flop circuit 72, 74, 7 of the switching ring counter 30.
6, 78 output signals 208, 210, 212, 2
14 and the flip-flop circuit 6 of the memory circuit 58
4, 66, 68, 70 output signals 216, 21
The correction circuit 80 consists of AND gates 82, 84, 86, and 88 which input signals 8, 220, and 222, respectively.
A NOR gate 90 inputting gate signals 224, 226, 228, 230, a gate signal 232 of the NOR gate 90 and an output signal 20 of the frequency dividing circuit 60.
6, an output signal 234 of the AND gate 92, and a display changeover switch 38.
and an OR gate 94 which inputs the switching signal 236 and outputs the switching signal to the flip-flop circuit 72 of the switching ring counter 30.
When the switching ring counter 30 selects an unnecessary timer time display function, the correction circuit 80 forcibly advances the count value of the switching ring counter 30 by 1 to avoid displaying the function. There is. On the other hand, a gate circuit 96 is provided on the output side of the switching ring counter 30 in order to switch and control each function display based on the count of the switching ring counter 30.
is provided, and the gate circuit 96 is connected to each functional circuit 2.
0, 22, 24, 26 output signals and each flip-flop circuit 72 of the switching ring counter 30,
74, 76, 78 output signals 208, 210, 2
12,214 and each AND gate 98 and 1
00, 120, 104, and each AND gate 98,
and an OR gate 106 into which gate signals 100, 102, and 104 are input. Also, the flip-flop circuit 6 of the memory circuit 58
AND gates 108 and 110 are connected to the output terminals of the AND gates 8 and 70, respectively, in order to notify alarms and control external devices based on each selected function, and furthermore, the output terminals of the AND gates 108 and 110 are connected to An alarm time signal circuit 112 and an external device control circuit 114 are connected to each. and,
These AND gates 108 and 110 prevent the external device control circuit 114 connected to the timer counter 26 from operating when the switching ring counter 30 selects an unnecessary timer time display function. Further, in FIG. 4, circuit 1 indicated by a dashed line
Reference numeral 16 is composed of one clock integrated circuit, and diodes 54a and 54 are connected only to the output terminals of the ring counter 42 for digit selection where function display is required.
By connecting b and 54c, desired functions can be displayed. In addition, the memory circuit 58 and the switching ring counter 3
0 flip-flop circuits 64, 66, 68,
An initial reset circuit 118 is connected to the reset terminals of the flip-flop circuits 64, 66, 68, 70, 72, 74, and 78, respectively.
76 and 78 are reset. The display selection circuit for a multifunctional timepiece according to the present invention has the above-mentioned configuration, and its operation will be explained below. First, the power is turned on, and the initial reset circuit 118, the memory circuit 58, and the flip-flop circuits 64, 66, 68, 7 of the switching ring counter 30 are reset.
Reset signal 23 at 0, 72, 74, 76, 78
8, an output signal of "1" is output only from the flip-flop circuit 72, and this output signal 208 is output to the AND gate 82 of the correction circuit 80 and the AND gate 98 of the gate circuit 96. And "1" from the digit selection ring counter 42
The digit selection signals 202a, 202b, 202c are sequentially output to the AND gate group 62 via the diodes 54a, 54b, 54c, and the unnecessary timer function is stored in the storage circuit 58. , 66, 68 output signals 216, 218, 220 of "1" to AND gates 82, 84, 86 of the correction circuit 80. However, an output signal 222 of "0" is output to the AND gate 88 from the flip-flop circuit 70 corresponding to the digit selection signal 202d to which no diode is connected. Therefore, the gate signal H224 of "1" is output from the AND gate 82 to the NOR gate 90, and the gate signal H224 of "0" is output from the NOR gate 90 to the AND gate 92, so that the correction action of the correction circuit 80 is not performed. On the other hand, the gate circuit 96 receives "1" only from the flip-flop circuit 72 of the switching ring counter 30.
Since the output signal 208 is inputted, the gate signal is sent only from the AND gate 98 which inputs the output signal from the time counter 20.
Output to 0. Therefore, the digit selection circuit 40 receives the output signals 202a and 20 of the digit selection ring counter 42.
2b, 202c, and 202d select display digits one by one, and output a time display signal to the display section 48 via the decoder 44 and driver 46. Accordingly, a predetermined time is displayed on the display section 48. Thereafter, each time the display changeover switch 38 is pressed, the output location of the "1" output from the changeover ring counter 30 to the correction circuit 80 and gate circuit 96 is sequentially shifted from flip-flop circuit 72→74→76→78. . In conjunction with this, the display section 48 sequentially displays the time, date, and alarm time in the same manner as described above. In this case as well, since the gate signal "1" is input from the AND gate 82 to the NOR gate 90, the correction circuit 80
No corrective action is taken. However, when the output signal 214 of "1" is output from the flip-flop circuit 78 to the AND gate 88 of the correction circuit 80, the output signal 214 of "1" is output from the flip-flop circuit 70 of the storage circuit 58 to the AND gate 88.
Since the output signal 230 of "0" is output from the NOR gate 90 to the AND gate 92, the gate signal 232 of "1" is output from the NOR gate 90 to the AND gate 92. As a result, the gate signal 234 is output from the AND gate 92 to the OR gate 94, so that a gate signal of "1" is output from the OR gate 94 to the flip-flop circuit 72 of the switching ring counter 30. Therefore, when the switching ring counter 30 counts the flip-flop circuit 78 connected to an unnecessary function, the count value is advanced by one due to the correction action of the correction circuit 80 described above. In this way, the "1" output point of the switching ring counter 30 is connected from the flip-flop circuit 78 to the flip-flop circuit 7.
2, the timer time is not displayed on the display section 48, and the display switching mode is as follows.

Further, since the output signal 222 of "0" is always output from the flip-flop circuit 70 of the correction circuit to the AND gate 110, the external device control circuit 114 connected to the timer counter 26 is always in an inactive state. As described above, according to the present invention, the digit selection signal detection circuit provided at the output part of the digit selection ring counter extracts unnecessary functions and stores them in the storage circuit, and the switching ring counter selects the unnecessary functions. When this occurs, by forcibly incrementing the count value by 1 in the correction circuit, only the necessary functions can be easily selected, and the selected functions can be repeatedly displayed. Therefore, it is possible to incorporate only the necessary functions into a watch from an integrated circuit that incorporates all the functions that can be considered in advance, which has the advantage of eliminating the need to design a new integrated circuit every time a function is added or deleted. are doing.

[Brief explanation of the drawing]

Fig. 1 is a schematic block diagram of a switching circuit of a conventional multi-function watch, Fig. 2 is a schematic block diagram showing another embodiment of a switching circuit of a conventional multi-function watch, and Fig. 3 is a schematic block diagram of a switching circuit of a conventional multi-function watch. 4 is a detailed block diagram of the display selection circuit of the multi-function watch according to the present invention; FIG. 5 is a detailed diagram of the display selection circuit shown in FIG. 4; and FIG. FIG. 6 is an output waveform diagram at each part of the display selection circuit shown in FIGS. 4 and 5. FIG. 30... Switching ring counter, 52... Digit selection signal detection circuit, 54a, 54b, 54c... Diode, 56... Switching circuit, 58... Memory circuit, 80... Correction circuit, 81... Matching circuit, 96
...Gate circuit, 202a, 202b, 202
c, 202d...Digit selection signal.

Claims (1)

[Claims] 1: an oscillation circuit that outputs a reference signal; a frequency divider circuit connected to the oscillation circuit and frequency-divided the reference signal; connected to a time display output terminal of the frequency divider circuit;
A time clock circuit that measures the current time using a frequency division signal, and a plurality of additions connected to the time display output terminal of the frequency division circuit or the time output terminal of the time clock circuit and each having a different function other than the time display function. a functional circuit; an externally operable display changeover switch for selectively switching each function; and an input terminal connected to the display changeover switch;
Count the number of times this display changeover switch is operated,
a switching ring counter that outputs a display selection signal according to the count value; each input terminal is connected to the selection signal output terminal of the switching ring counter and the output terminal of the time clock circuit and the additional function circuit; a gate circuit that selects and outputs either one of the output signals from the time clock circuit or the additional function circuit in response to a display selection signal from a ring counter; a display section having a plurality of display digits; and a clock input. A clock pulse output terminal of the frequency dividing circuit is connected to the terminal, and each of the plurality of output terminals is connected to a corresponding display digit of the display section,
a digit selection ring counter that selects each display digit of the connected display unit by sequentially and repeatedly generating a digit selection signal to each of the output terminals in response to a clock pulse from the frequency dividing circuit; It is connected to the output terminal of the gate circuit and a plurality of output terminals of the digit selection ring counter, and repeatedly selects the output signal from the gate circuit for each displayed digit in response to a digit selection signal from the digit selection ring counter. a digit selection circuit that outputs the digit selection circuit; a decoder that is connected to the output terminal of the digit selection circuit and converts the output signal from the digit selection circuit into a display signal that can be displayed on the display section; and an output terminal of the decoder and the display. a first driver connected between an input terminal of the digit selection ring counter and the display section, and a first driver that amplifies a display signal from the decoder and inputs the amplified display signal to each display digit of the display section; a second driver connected between a control terminal of the digit selector and a second driver that supplies a drive signal to drive each display digit of the display section corresponding to the digit selection signal from the digit selection ring counter; An initial reset circuit connected to a reset terminal of a time measurement circuit and a switching ring counter, and supplies an initial reset pulse to the reset terminal of the time measurement circuit and switching ring counter in response to power connection. , a digit selection signal detection circuit that is connected to a specific output terminal of the second driver and extracts and outputs a drive signal from the second driver; and an output terminal of the digit selection signal detection circuit that is connected to the data input terminal. and the output terminals of the digit selection ring counter are connected to each other, the clock input terminal is connected to the clock pulse output terminal of the frequency dividing circuit, the reset terminal is connected to the output terminal of the initial reset circuit, and the clock input terminal is connected to the clock pulse output terminal of the frequency dividing circuit. A plurality of circuits each storing only the digit selection signal from the digit selection ring counter that is in phase with the drive signal from the digit selection signal detection circuit in synchronization with the initial reset pulse from the initial reset circuit and the clock pulse from the frequency dividing circuit. a memory circuit having two memory sections; one input terminal connected to one output terminal of the switching ring counter, and the other input terminal connected one corresponding output terminal of the memory circuit; a coincidence circuit that is made up of a plurality of AND gate groups, and generates a coincidence signal on an output line only from the AND gate to which both the display selection signal from the switching ring counter and the storage signal from the storage circuit are supplied; A plurality of output lines of the matching circuit are connected to the display changeover switch and the clock pulse output terminal of the frequency dividing circuit, and the clock pulse from the frequency dividing circuit is passed through on the condition that a matching signal from the matching circuit exists. A display selection circuit for a multi-functional timepiece, comprising: a correction circuit that supplies a correction switching signal to a clock input terminal of the switching ring counter in addition to the operation signal of the display switching switch.