JPS6232608B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a semiconductor device in which a silicon single crystal (hereinafter referred to as Si) is used as a substrate crystal material and a compound semiconductor GaAs-based crystal is used as an active layer, between the substrate crystal and the compound semiconductor active layer. Perfect matching of lattice constants was achieved by creating a transition region consisting of two types of transition layers, Si _1-x Ge _x and In _1-y Ga _y P, in which the composition ratios x and y change in a tapered or step-like manner. The present invention relates to compound semiconductor devices.

Compound semiconductors take full advantage of their excellent performance, such as their band structure characteristics and high electron mobility.
In recent years, a variety of new multi-functional, high-performance electronic components have been provided. However, compound semiconductor crystals are generally expensive, and the industrialization of obtaining high-quality substrate crystals with large areas and few defects is still unsatisfactory. Therefore, attempts have been made to use Si substrates as substrate crystal materials, which are cheaper and for which industrial technology for mass production has already been completed, but they are still at the research stage and nothing has been put to practical use. .

FIG. 1 shows a conventional structural example of epitaxial growth of a compound semiconductor crystal using a silicon single crystal as a substrate. Various attempts have been made to grow epitaxial crystals between different materials, mainly for the purpose of crystallographic interest and the study of electrical properties of crystal interfaces (heterojunctions). When a GaAs layer 2 is epitaxially grown on the surface of a Si substrate 1, the lattice constants of Si and GaAs are 5.431 Å and 5.654 Å, respectively, and it is difficult to obtain a high-quality growth layer due to the considerable difference. It is possible. The compound semiconductor with a lattice constant closest to that of Si is GaP (lattice constant = 5.451 Å), but even in this case, detailed observation reveals that many minute cracks occur as the growth thickness increases. However, only a grown layer with many defects can be obtained, making it unsuitable for the construction of multi-functional, high-performance semiconductor devices.

The present invention relates to a compound semiconductor device having a structure in which a new transition region is provided in order to overcome the above-mentioned conventional drawbacks when using a silicon substrate, and the basic principle thereof will be explained below with reference to examples. do.

FIG. 2 is a structural diagram showing an embodiment of the present invention. In the figure, a first transition layer 4 is provided on the surface of a silicon substrate 3. The composition of the transition layer is
Si _1-x Ge _x , and the component ratio x is x on the silicon substrate surface.
= 0, and a tapered component configuration is set in which x increases as the thickness of the transition layer increases. Si and Ge, both group elements, have the same type of crystal structure, and when a Si _1-x Ge _x layer is epitaxially grown on a Si substrate, a single crystal is formed within the range of x = 35%.
It is possible to grow Si _1-x Ge _x and is known to exhibit unique heterojunction characteristics at the interface between the Si substrate and the grown layer. The Si _1-x Ge _x layer 4 forming the first transition layer in the present invention has x
By creating a tapered component configuration so that It's not a thing. The lattice constant of Si _1-x Ge _x matches the lattice constant of Si (=5.431 Å) at x = 0, and that of Ge (= 5.658 Å) at x = 1, and the
As an approximation, it increases in proportion to x.

In one embodiment of the present invention shown in FIG.
A second transition layer 5 consisting of an In _1-y Ga _y P layer is provided. In _1-y Ga _y P is a group-group compound semiconductor GaP
It is a mixed crystal of and InP, and its lattice constant has a value within the range of 5.451 Å to 5.869 Å within the range of y = 1 to y = 0. The composition ratio y of the second transition layer changes in a tapered manner to y=0.515 at the outermost surface, that is,
It is configured to have a lattice constant equal to that of GaAs.

FIG. 3 is an explanatory diagram for explaining the principle of the perfect continuity condition of the lattice constant at the interface between the first transition layer 4 and the second transition layer 5 in the present invention. The lattice constants of Si _1-x Ge _x and In _1-y Ga _y P at room temperature are the first
5.431+0.227x (Å) and 5.869− as approximations
0.418y (Å), thus giving the continuity condition of the lattice constant at room temperature at the interface of both transition layers
The relational expression is x=1.93-1.84y, which is like curve 1 in FIG. On the other hand, considering the epitaxial growth of the second transition layer, there is a thermal expansion phenomenon of the lattice constant at the epitaxial growth temperature.
The difference in the temperature coefficients of the lattice constants of Si _1-x Ge _x and In _1-y Ga _y P is assumed to be 2.97×10 ^-6 /℃, and at the interface of both transition layers during epitaxial growth with a temperature difference ΔT from room temperature. The relational expression between x and y that gives the continuity condition of the lattice constant is:
x=1.93−1.84y+7.678×10 ^-5 ΔT, and the matching condition when ΔT=700°C is the upper limit of the epitaxial growth temperature in an embodiment of the present invention as described later is shown in curve 2 in FIG. Shown below.

Looking at the results of the study on the perfectly continuous lattice constant condition of the present invention described above, the first transition layer that should match y=1, that is, GaP, is formed at the interface, as is clear from curves 1 and 2 in Figure 3. This means that approximately 9 to 15% of the atoms require crystal interfaces to be incorporated into the crystal structure in place of Si atoms, and this amount of Ge atoms is 10 ⁵ compared to the amount added as a normal impurity.
~ ¹⁰⁶ times more. Conventionally, attempts have been made to directly construct a heterojunction without using a transition layer, assuming that Si and GaP have close lattice constants, and have obtained unfavorable results. To overcome the difference (0.02Å),
It is clearly explained that the transition layer of the present invention is required to strongly exert the effect of Ge atoms as described above.

Various methods have been tried in the past regarding epitaxial growth techniques for the Si _1-x G _x and In _1-y Ga _y P layers to constitute the transition region of the present invention.
The epitaxial growth method for Si _1-x Ge _x is as follows:
Vapor phase growth using SiCl ₄ and GeCl ₄ is common, but molecular beam epitaxy (MBE), ion beam epitaxy (IBE), and cluster ion growth techniques, which have recently been rapidly researched and developed as semiconductor thin film growth techniques, are commonly used. There are new technologies such as beam epitaxy (ICBE), and these methods allow the supply of component elements to be controlled with high precision, and are useful when accurately realizing a tapered compositional structure like the transition layer of the present invention. is completely convenient. In addition, these growth methods require extremely low substrate temperatures (750 to 900 degrees Celsius for the MBE method and 650 to 800 degrees Celsius for the ICBE method) compared to conventional normal vapor phase growth methods.
℃), and the difference in thermal expansion coefficient between the substrate and the growth layer helps reduce thermal stress remaining in the crystal during the cooling process. In _1-y Ga _y P
For epitaxial growth of layers, VPE,
Technologies such as LPE, CVD and Planer Reactive Deposition are effectively applied. In the explanation of Figure 3 regarding the lattice constant continuity conditions at the interface between the first and second transition layers, we described the relationship between the growth temperature of the second transition layer, that is, In _1-y Ga _y P, and x~y. However, the epitaxial growth temperature of In _1-y Ga _y P is 650 to 750 in VPE.
℃, for LPE, 500-700℃, for CVD, 500-600
℃ and 300~ for Planer Reactive Deposition
The temperature is around 400℃.

FIG. 4 shows another embodiment of the present invention, in which a silicon substrate 6, a first transition layer 7 of Si _1-x Ge _x , and a second transition layer 7 of In _1-y Ga _y P are used. The structure of the transition layer 8 is the same as in the embodiment of the present invention shown in FIG. The third consisting of
A transition layer 9 is provided. The interface between the second transition layer 8 and the third transition layer 9 is y=0.515, i.e.
This is a connection between In ₀ . ₄₈₅ Ga ₀ . ₅₁₅ P and GaAs, and complete continuity of the lattice constant is achieved. The third transition layer 9 of semi-insulating GaAs plays an extremely effective role in device construction as an electrically insulating layer between the substrate and the GaAs active layer 10 formed thereon. As in the case of configuring a GaAs-FET as shown in FIG.
It is utilized for channel setting to control the current between the drain electrode 13 and the drain electrode 13. Also, GaAs—
It is effectively used as an insulating layer for separating elements in monolithic integrated device configurations such as FETs and light-emitting/light-receiving elements.

Note that the In _1-y Ga _y P layer of the second transition layer of the present invention
By adding impurities such as Cr and Fe, the layer can be made into a semi-insulating layer. That is, impurities such as Cr provide good semi-insulating properties of about 10 ¹⁰ Ω ^- cm not only to InP but also to CaP, and therefore, in the embodiment of FIG. 2 of the present invention, the entire area of the second transition layer is By adding Cr over a period of time, in addition to the role of complete continuity of the lattice constant of the layer, it can also serve as an electrically insulating layer as explained in another embodiment of the present invention. . Also, in the embodiment shown in FIG.
By adding Cr to the second transition layer 8, the thickness of the insulating layer becomes the sum of the thicknesses of the second transition layer 8 and the third transition layer 9, which reduces stray capacitance and improves device performance. Contribute to the improvement of

Further, the first and second transition layers of the present invention have been described with a composition composition in which x and y most typically change in a tapered shape in the embodiment shown in FIG.
Depending on the conditions of the epitaxial growth equipment, productivity may be improved by setting the distribution of x and y in the thickness direction in each layer to be approximated by multiple steps, and the basic principle of the present invention is All of the above methods also hold true.

As described above in detail in the embodiments of the present invention, the present invention is characterized in that a transition region consisting of two types of transition layers, Si _1-x Ge _x and In _1-y Ga _y P, is provided on the Si substrate. This transition region realizes perfect lattice constant matching between the Si substrate and GaAs, fundamentally solving the greatest difficulty in applying Si substrate crystals in the construction of conventional compound semiconductor devices. This makes full use of Si substrates, which are cheaper and have established large-area mass production technology, and has the effect of directly contributing to lower prices and large-scale integration of compound semiconductor devices. In addition, the second transition layer made of In _1-y Ga _y P is doped with impurities such as Cr and Fe, so that in addition to serving as a lattice constant matching, the second transition layer is made of In 1-y Ga y P and serves as an electrical conductor for isolation between elements. It is possible to simultaneously serve as an insulating layer, and this is completely effective in the construction of GaAs-FETs or optical devices, as well as in the construction of integrated devices thereof. Furthermore, as a result of making it possible to apply a Si substrate, it becomes possible to monolithically coexist Si-based elements and compound semiconductor-based elements, making it possible to construct various new multifunctional integrated devices.

Combining the above-mentioned effects of the present invention, the present invention not only directly contributes to lower cost and higher performance of compound semiconductor devices, but also provides an important basis for realizing new multifunctional integrated devices. , the effects of the present invention on electronics in general are extremely large.

[Brief explanation of the drawing]

Figure 1 shows a conventional structural example of epitaxial growth of a compound semiconductor crystal using a silicon single crystal as a substrate.
FIG. 2 is a structural diagram showing one embodiment of the present invention, and FIG. 3 is a structural diagram for explaining the perfect continuity condition of the lattice constant at the interface between the first transition layer and the second transition layer in the present invention. 4 are structural diagrams showing other embodiments of the present invention. 3... Si substrate, 4... First transition layer (Si _1-x Ge _x ),
5... Second transition layer (In _1-y Ga _y P), 6... Si substrate, 7
...First transition layer (Si _1-x Ge _x ), 8... Second transition layer (In _1-y Ga _y P), 9... Third transition layer (GaAs; Cr added), 10... Active layer (GaAs), 11...gate electrode, 12...source electrode, 13...drain electrode.

Claims (1)

[Scope of Claims] 1. A silicon crystal substrate, and Si _1- which is epitaxially grown on the silicon crystal substrate and whose composition ratio x increases in a tapered or step-like manner from the interface with the silicon crystal substrate. A first transition layer _{of x} Ge A compound semiconductor device comprising a second transition layer of In _1-y Ga _y P, and a GaAs-based element or a GaAs-based integrated circuit is configured on the second transition layer. 2. The compound semiconductor device according to claim 1, wherein the second transition layer of 2 In _1-y Ga _y P is made semi-insulating by adding impurities such as Cr and Fe. 3. A silicon crystal substrate and a first layer of Si _1-x Ge _x which is epitaxially grown on the silicon crystal substrate and whose composition ratio In _1-y Ga y which is epitaxially grown on the first transition layer and whose composition ratio y decreases in a tapered or step-like manner from the interface with the first transition _layer. A second transition layer made of P, and a third transition layer made of semi-insulating GaAs doped with impurities such as Cr and Fe, which is formed on the second transition layer. 1. A compound semiconductor device comprising a GaAs-based element or a GaAs-based integrated circuit on a transition layer. 4. The compound semiconductor device according to claim 3, wherein the second transition layer of In _1-y Ga _y P is made semi-insulating by adding impurities such as Cr and Fe.