JPS6232654B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic antenna switching device for diversity antenna reception in television.

Conventionally, as a method of comparing the reception levels of multiple television receiving antennas, a dedicated diversity receiver was installed in addition to the television receiver, and the video carrier was extracted from the signal received by each antenna, detected, and the reception level was determined. There is a way to compare, but the larger the time constant of the integrating circuit in the detection circuit, the slower the response to level fluctuations.
Conversely, if the time constant becomes small, the detected output is difficult to smooth, and ripples appear, making level comparison difficult. In addition, there are many additional circuits for comparing received levels, and the cost is high.

A device as shown in FIG. 1 can be considered as a solution to such conventional problems. This will be explained, but here, as an example, a case will be explained in which three antennas are switched.

Television high frequency signals 1, 2 and 3 received by respective antennas A, B and C are guided to a high frequency switch 4. In the high frequency switch 4, the high frequency signals 1, 2, and 3 from the antenna are sequentially switched by high frequency switch drive signals 5, 6, and 7 in a time-division manner after the television vertical synchronization signal. The high frequency signal 8 switched by the high frequency switch 4 enters the input terminal of the television receiver 9. A television video signal 10 is taken out from a television receiver 9, and a level detection circuit (peak hold circuit) 11 detects a level corresponding to switching of the input high frequency signal from the level of a flat portion of the video signal. The sample and hold circuit 13 samples and holds the levels corresponding to the input high frequency signals 1, 2, and 3 from the detection level signal 12 using sampling pulses 14, 15, and 16, and the level comparison circuit 20 samples and holds the levels corresponding to the input high frequency signals 1, 2, and 3.
Comparison signals 21, 22, and 23 of the timing of the clock signal 25 generated at the end of level sampling are held in a holding circuit 24 until the next level comparison. Control reference signal generation circuit 3
0, the control clock signal 29 to the control reference signal 3
Make 1, 32, 33. A sampling pulse generation circuit 34 generates sampling pulses 14, 15, and 16 for the sample hold circuit 13 from the reference signal. The clock pulse generation circuit 35 is connected to the holding circuit 24.
The clock pulse 25 is generated from the control reference signal 33 at the timing of the end of level sampling. Sampling switching signal generation circuit 3
Reference numeral 6 denotes a circuit that sets the control reference signals 31, 32, 33 to an arbitrary pulse width necessary for level sampling, and outputs sampling switching signals 37, 38, 39. The signal synthesis circuit 40 is a circuit that synthesizes the high frequency switch switching signals 37, 38, 39 during sampling and the antenna switching signals 26, 27, 28 based on level comparisons at times other than sampling. It becomes 6,7. According to the apparatus shown in FIG. 1, the levels of a plurality of antennas can be compared in a short time using a relatively simple circuit, and diversity reception can be performed by switching to the antenna with the highest level. However, the reception level is relatively stable and the reception level close to the maximum reception level is 2.
If there are more than two antennas and the antenna corresponding to the maximum reception level changes frequently, the image quality (conditions such as ghosts) will vary depending on the reception condition of each antenna, and flutter will be noticeable due to the change in image quality.

The present invention provides an automatic antenna switching device that solves the above problems. Hereinafter, the present invention will be explained based on illustrated embodiments.

FIG. 2 shows a basic block diagram of an embodiment of the present invention. The circuitry in the portions of FIG. 2 other than those within the dashed-dotted line frame is exactly the same as that in FIG. 1, so a description thereof will be omitted. Signals 17, 18, and 19 sampled and held by the sample and hold circuit 13 are input to a level comparison circuit 20 and a level comparison circuit 41 separately. The level comparison circuit 20 detects only the maximum level among the input levels, but the level comparison circuit 41 detects not only the maximum level but also detects and outputs anything close to the maximum level.
At the time of level sampling, the comparison signal of the previous level comparison is held in the output signal of the holding circuit 24, and the previous level comparison signal is held in the level comparison output signals 42, 43, and 44 by the level comparison match detection circuit 45. It is detected whether or not an object is included, and if so, the clock signal 25 of the holding circuit 24 is cut off, and the output of the holding circuit 24 holds the information of the previous level comparison as it is.
Furthermore, if the level comparison output signals 42, 43, and 44 do not contain the one holding the previous level comparison signal, the clock signal 25 of the holding circuit 24
is output as the output signal 46 of the level comparison match detection circuit and enters the holding circuit 24. In the holding circuit 24, the level comparison output signals 21, 22, and 23 of the level comparison circuit 20 are held at the timing of the clock signal 25 until a new level comparison is made.

FIG. 3 shows a specific example of the circuit of the level comparison section shown in FIG. 2. The circuit within the dashed-dotted line frame corresponds to the circuit within the dashed-dotted line frame in FIG. The sampled and held signals 17, 18, and 19 are input to a level comparison circuit 20 which detects only the maximum level and a level comparison circuit 41 which detects levels close to the maximum level as well. The level comparison circuit 20 is an example using an operational amplifier, and the input levels 17, 18, 19 are at point d.
The highest voltage among them will appear, and only the maximum input level will have a voltage corresponding to the input level at the output of the operational amplifier, and the others will be close to the O(V) potential. The output signal of the operational amplifier is switched by a transistor circuit, and a low potential is output for the maximum level, and a high potential is output for the other signals. The level comparison signal f of the level comparison circuit 41 is set by dividing the highest input level voltage d to an arbitrary ratio by the volume e. Level comparison circuit 4
The output of 1 becomes a high potential when all input signals having a higher level than the level comparison signal f are detected, and the other signals become a low potential. The output 26 of the holding circuit 24,
27 and 28 hold the previous level comparison output signals, and the level comparison match detection circuit 45 detects that the output signals 42, 43, and 44 of the level comparison circuit 41 include those selected in the previous level comparison. If it is, the level at point g becomes high potential, and the holding circuit 24
The clock signal 25 of is cut off by the gate circuit h,
The output of the holding circuit 24 maintains its previous state.

In addition, the output signals 42 and 4 of the level comparison circuit 41
If the one selected in the previous level comparison is not included in 3 and 44, the level at point g becomes a low potential, the gate circuit h is opened, the clock signal 25 is given to the holding circuit 24, and the level comparison is completed. The level comparison output signals 21, 22, 23 of the circuit 20 are connected to the holding circuit 2.
4 at the timing of the clock signal 25. In other words, even if the maximum level input signal at the time of level comparison is different from the one selected in the previous level comparison, if the one selected in the previous level comparison is close to the maximum level, the holding circuit 24 is left as is. The input high frequency signal is not switched.

As is clear from the above explanation, when there are two or more input signals close to the maximum level and the order of their levels is constantly changing, the device of the present invention can reduce the frequency of input signal switching. , the effect is that the screen becomes very stable.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an automatic antenna switching device considered as an improvement on the conventional antenna, Fig. 2 is a block diagram of an embodiment of the present invention, and Fig. 3 is a specific example of a circuit around the level comparison circuit of Fig. 2. FIG. A, B, C...Antenna, 4...High frequency switch, 9...Television receiver, 11...Level detection circuit, 13...Sample and hold circuit, 20
...Level comparison circuit, 24...Holding circuit, 30...
...Control reference signal creation circuit, 34...Sampling pulse creation circuit, 35...Clock pulse creation circuit, 36...Sampling switching signal creation circuit, 4
0...Signal synthesis circuit, 41...Level comparison circuit,
45...Level comparison match detection circuit.

Claims (1)

[Claims] 1 Automatic antenna switching that selects the optimal antenna within the vertical blanking period of a television video signal from high-frequency signals received by multiple antennas, and maintains this state until the next vertical blanking period after switching to that antenna. The device includes a level comparison circuit that selects the antenna with the maximum level, a level comparison circuit that selects all antennas near the maximum level, and detects whether or not any of the outputs matches the previously switched antenna. An automatic antenna switching device comprising a control circuit that controls an antenna switching and holding circuit using a signal.