JPS6233555B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a small electronic device capable of emitting multiple types of alarm sounds.

In recent years, small electronic calculators with a timekeeping function have been proposed that allow multiple types of alarm times to be set and emit a corresponding type of alarm sound at each alarm time. For example, an alarm time is set for each day of the week, and when the alarm time is reached, an alarm sound such as a melody corresponding to that day of the week is generated. However, with this type of computer, it is necessary to wait until the alarm time for each day of the week is reached in order to confirm the alarm sound corresponding to the set alarm time.

This invention was made to improve the above-mentioned points, and its purpose is to selectively call and emit an alarm sound at any time, and to enable confirmation of the type of alarm sound at any time. An object of the present invention is to provide a small electronic device having an alarm function.

Hereinafter, with reference to the drawings, an embodiment in which the present invention is applied to a small electronic calculator equipped with a timekeeping function and configured to emit alarm sounds with different melodies in response to a plurality of set alarm times. Explain. FIG. 1 is a diagram showing the configuration of the present invention. The key input unit 1 is provided with keys such as a numeric keypad and a function key, which are normally provided in a calculator, as well as a mode changeover switch (not shown) for calculation mode, time mode, etc., a melody call key, etc. There is. The key operation signal K of each key is input to the ROM (read only memory) address section 2, and the number data set by the numeric keypad is input to the X of the RAM (raw random access memory) 4.
input to the register. ROM address section 2 is
This circuit outputs address data for specifying an area in the ROM 3 to store microinstructions U, L, CODE, ING, and NA corresponding to the next operation to be executed. Therefore, ROM address section 2
includes a microinstruction NA specifying the next address, judgment operation result data J from the arithmetic circuit 5, and a signal 1P/S with a period of 1 second from the frequency dividing circuit 6, which will be described later.
A melody end signal from the ROM 7 and a note end signal from the sound alarm section 8 are further input, and predetermined address data is output in accordance with each of these input signals. The ROM 3 stores microprograms for controlling various calculations of the computer, generation of melody sounds, etc., and outputs microinstructions U etc. in parallel by being addressed by the address data output from the ROM address section 2. Microinstruction U is row addressing data for RAM 4, and microinstruction L is column addressing data for RAM 4, which are applied to RAM 4 via first address counter 9.

The microinstruction CODE is numerical code data and is given to the arithmetic unit 5. micro instructions
INS is various instruction data, which is given to the instruction decoder 10 and decoded.
Read/write signals R/W, etc. for RAM4,
Various command signals are created. Microinstruction NA is address data for specifying the next address.

The RAM 4 is composed of various registers such as an X register, an A register, and a B register. As shown in detail in Figure ₂ , each register consists of, for example, 10 digits, and the X register is used for arithmetic and display purposes. Related data is also stored.
Further, in the A register, as shown in the figure, there is an address for giving the start address of each melody, of which seven types of melodies are set corresponding to each day of the week from Sunday to Saturday, which are stored in the ROM 7, which will be described later. The first to seventh digits are stored in a desired order. Then, when calling the melody, which will be described later,
According to the contents of _X0 of the X register, one of the address data of the first to seventh digits of the A register is read out and converted by the arithmetic circuit 5 into the leading address of the corresponding melody. Further, the B register is used for storing flag data when calling a melody, which will be described later.

Although not shown, the RAM 4 is provided with a register for storing clock data (current time), a register for storing date and day of the week, a register for storing alarm time, and the like. Modification of the alarm time or the current time is executed by key operation of fixed keys (not shown) of the key input unit 1.

Then, the first address counter 9 and
The second address counters 11 for the ROM 7 are each driven by a control signal (increment signal) from the instruction decoder 10.

The arithmetic circuit 5 executes four arithmetic operations, judgment operations including alarm time detection, and timekeeping operations, and the result data of the four arithmetic operations and timekeeping operations are sent to a predetermined register in the RAM 4. On the other hand, the judgment calculation result data J is
It is sent to the ROM address section 2. Timing calculation is done by ROM
It is executed every time the signal 1P/S is input to the address section 2, and the +1 second operation is executed on the previous time measurement data to obtain new time measurement data.
Transferred to a register in RAM4. This time measurement data is compared with a pre-input alarm time, and if they match, a melody corresponding to that day of the week is read from the ROM 7 and emitted from the sound alarm section 8.

The oscillator 12 constantly generates a fundamental frequency signal and supplies it to the frequency dividing circuit 6, sound alarm section 8, etc., respectively. The frequency divider circuit 6 divides the frequency of the basic frequency signal to create a 1 second signal of 1 P/S, and the tone generator 8 generates a musical tone using the fundamental frequency signal based on the musical tone information stored in the ROM 7. I do.

As shown in Fig. 3, the ROM 7 stores musical tone information (note information, scale information) for seven different melodies A to G songs from Sunday to Saturday. are respectively A ₀
~ _G0 . These starting addresses A ₀ to G ₀ are obtained by reading out the addresses a ₀ to g ₀ corresponding to the above mentioned starting addresses A ₀ to G ₀ in the A register in the RAM 4 to the arithmetic circuit 5 and converting them. By setting this first address _A0 to _G0 in the second address counter 11 and sequentially incrementing it, the songs A to G in the ROM 7 are addressed, and musical tone information corresponding to each song is output. Ru. Each time the melody for each day of the week ends, a melody end signal is output to the ROM address section 2, and reading of the melody for the next day of the week is started.

The sound signal section 8 is composed of, for example, a musical tone generation circuit, a piezoelectric buzzer, etc., and each time a musical tone for one note of each melody is emitted, a note end signal is output to the ROM address section 2, and the instruction decoder 10 The next note data is read out from the ROM 7 by incrementing the second address counter 11 by an increment signal output from the ROM 7.

Next, the operation of the present invention will be explained with reference to FIGS. 4 and 5. When trying to check the melody for each day of the week, first press the melody call key
When 〓 is operated, the ROM is activated by the key operation signal K.
Address section 2 outputs predetermined address data.
ROM 3, and the operation of the flowchart in FIG. 4 is started. First, in step _S1 , it is determined whether the data in _B1 (second digit of the B register) is "0", that is, whether or not the melody call operation is in progress. The data in _B1 is now 0, so step
The process advances to _S2 , where data " ₁ " is written to B1 and a flag is set, indicating that the melody is being called. Next, in step _S3 , data "6" is written to _X0 (first digit of the X register). This is to output a song corresponding to Sunday. Note that data "5" to "0" of _X0 store address data for outputting songs corresponding to Monday to Saturday, respectively. Next, in step _S4 , it is determined whether the data in _X0 is "15"("1111" in binary notation), and since it is not "15", the process proceeds to step _S5 , and the data in _X0 is Data "6" is transferred and set in the first address counter 9. Next, in step _S6 , the digit of the A register corresponding to the contents of _X0 is specified. That is, since the content of X ₀ is "6", A ₆ , that is, the digit corresponding to Sunday, is specified. Address data _e0 corresponding to the start address _E0 of Sunday's E song is stored in this _A6 , and this address data _e0 is read out to the arithmetic circuit 5 and converted to the start address _E0 of E song. After being stored in the RAM 4, it is sent to the second address counter 11. Next, in step _S7 , the start address _E0 is set in the second address counter 11. and
The ROM 7 outputs musical tone information of music E one note at a time when addresses after _E0 are specified. In this case, each time a musical tone for one note is emitted, a note end signal is outputted from the tone reporting section 8 and given to the ROM address section 2, whereby an increment signal is sent from the instruction decoder 10 to the second address counter. 11, and the second address counter 11 is incremented every time one note ends. In this way, Sunday Melody (E song)
When the performance ends, a melody end signal is output from the ROM 7 and given to the ROM address section 2, and the process advances to step _S8 . Then, in _S8 , the data "6" in _X0 is decremented by 1 to become "5", and the process proceeds to step _S4 . In step _S4 , since _X0 is "5", the answer is "NO" and the process proceeds to step _S5 . In step _S5 , the content "5" of _X0 is sent to the first address counter 9. Next, the process advances to step _S6 , where digit _A5 of the A register corresponding to the content "5 _" of X0 is designated, as described above. Then, the address data C ₀ stored in A ₅ is read out by the arithmetic circuit 5, converted into the first address data C ₀ , and sent to the second address counter 11. In the next step _S7 , the second address counter 11
The ROM 7 is sequentially designated from address _C0 , and musical tone information of song C corresponding to Monday is output. When the performance of song C is finished, the data in _X0 becomes "4" at step _S8 , and the following steps are performed from step _S4 to step _S7.
is executed in the same manner as described above, and Tuesday's G song starts playing.

By the way, during the performance of the G song, as shown in FIG. 5, if the ≦ key is operated, the program will skip from the middle of the G song currently being played to the A song corresponding to the next Wednesday. That is, by operating the above key 〓〓, the program skips from the middle of step _S7 and proceeds to step _S1 and step _S8 , the data in _X0 becomes "3", and steps _S4 to _S7 are executed. The program is executed, and Wednesday's song A starts playing. Also, as shown in Figure 5, if you press the ▼ key during the performance of Wednesday's song A, the same steps described above will be executed, the data in X ₀ will become "2", and Thursday's D song will be played. The performance begins.

The same goes for the following. If you want to listen and confirm the entire content of the song for each day of the week, do not press the 〓〓 key during the performance, and if you do not need to hear the entire content of the song, press the 〓〓 key during the performance. If you press , it will skip to the next day's song and start playing. Then, when the performance of Saturday's song is finished, X ₀ is set by step _S8 .
The data within becomes "15" by the calculation of "0-1", and the process advances to step _S4 . Here, since the content of X ₀ is "15", it is determined as "Yes", and the series of processing ends.

In the above embodiment, the melodies stored in the ROM 7 are sequentially read out in a predetermined order to confirm the type of alarm sound, but it may also be possible to specify only a specific alarm sound so that only that alarm sound can be confirmed. . Furthermore, although a melody is preset in the ROM 7 as an alarm sound, the user may be able to preset his/her favorite melody or the like as an alarm sound in the RAM or the like. Further, the alarm sound is not limited to a melody, but may also be a single sound such as a buzzer sound, or a combination of single sounds. Furthermore, the present invention is applicable not only to small electronic calculators with a timekeeping function but also to any small electronic equipment that can emit multiple types of alarm sounds.

As explained above, according to the present invention, alarm sounds are selectively called out by operating a specific key at any time, and when two or more alarm sounds are called and emitted in succession, each alarm sound is By making it possible to arbitrarily control the sound emission time, it is possible to check the type of alarm sound that has been set, and if the above specific key is operated again while the alarm sound is being emitted,
Since the next alarm sound is emitted, there is an advantage that confirmation can be made in a short time by only listening to part of the alarm sound.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of the main part of an embodiment in which the present invention is applied to a small electronic calculator with a timekeeping function, and FIG.
Figure 3 is a configuration diagram of RAM 4, Figure 3 is a configuration diagram of ROM 7, Figure 4 is a flowchart explaining the operation, and Figure 5 is a diagram showing the relationship between key operations and music to be played when checking the alarm sound (melody). It is. 1... Key input section, MS... Melody call key, 2... ROM address section, 3... ROM, 4...
...RAM, 5... Arithmetic circuit, 7... ROM, 8...
Sound report section, 10...Instruction decoder,
12... Oscillator.

Claims (1)

[Claims] 1. In a small electronic device capable of emitting multiple types of alarm sounds, a storage means for storing a plurality of pieces of alarm sound designation code information in a desired order for specifying the alarm sounds corresponding to each of the plurality of types of alarm sounds; , a sound emitting means for emitting an alarm sound corresponding to the alarm sound designation code information stored in the storage means; and a sound emitting means for selectively emitting the alarm sound according to the designation code information stored in the storage means. a specific key for making a sound; a reading device for sequentially reading out designated code information from the storage device and inputting it to the sound emitting device by operating the specific key;
a detection means for detecting whether or not an alarm sound is being emitted by the sound emitting means; and a detecting means for detecting whether or not an alarm sound is being emitted by the sound emitting means; and control means for controlling to read out the next designated code information of the designated code information corresponding to the alarm sound being emitted in the storage means, and the control means causes two or more alarm sounds to be consecutively output. 1. A small electronic device having an alarm function, which is characterized by arbitrarily controlling the sound emission time of each alarm sound when the alarm sound is emitted.