JPS6233816B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to startup control of a DC converter in which a plurality of DC converters are connected in series.

FIG. 1 shows a schematic diagram of a general DC power transmission/conversion device. In the figure, A and B are AC systems, Tr ₁ to Tr ₄ are transformers, CON ₁ to _{CON 4} are AC/DC converters, DCL ₁ to DCL ₂ are DC reactors, L is DC transmission lines, and P and N are conversions. The DC terminal of the device, G, is the ground return path. The AC/DC converters CON ₁ to _{CON 4} are
A three-phase bridge is formed as shown in CON ₁ and CON ₂ . CON ₁ and CON ₂ (and CON ₃ and
CON ₄ ) typically has a commutation phase angle of 30° by transformers Tr ₁ and Tr ₂ (and Tr ₃ and Tr ₄ ). A thyristor is used as the AC/DC converter, and a narrow pulse signal is used as the gate signal. As this narrow gate pulse signal, in addition to the ON pulse of an automatic pulse phase shifter (APPS), a pulse signal obtained by forward voltage detection of a thyristor in the same phase is used. Thyristor converters used in DC power transmission may be damaged by the generation of overvoltage when the DC current is interrupted, so it is necessary to avoid such interruptions in the DC current. In addition, if an interruption occurs, a forced ignition method is adopted to prevent the above-mentioned damage. Therefore, it is necessary to avoid this interruption even in the case of a startup operation in a DC power transmission device, and it is necessary to ensure that all converters of the DC power transmission device perform a reliable bypass operation at a specified timing at the time of startup. When the DC power transmission converter shown in Fig. 1 is started and reaches normal operation, one of both converters is a forward converter, and
The other converter is operated as an inverse converter, but in the initial operation immediately after the startup command is input, both converters in AC systems A and B perform the same bypass operation, so hereinafter the converter on the AC system A side will be referred to as the converter. The bypass operation will be explained below.

When starting up the converter, a method is adopted in which the DC terminals P and N of the converter are temporarily short-circuited by a start command. As one method, one phase of the AC/DC converters CON ₁ and CON ₂ in FIG. 1, for example, CON ₁
A bypass pair signal is input to the thyristors of the U _P phase and _{U N} phase in CON ₂ , and the U P ′ phase and U _N ′ phase in CON 2, and the short circuit between the DC terminals P and N is performed as described above. It can be done. This situation is shown in the second
This will be explained in detail using diagrams.

Figure 2 shows the AC/DC converter CON ₁ in Figure 1 and
The thyristor voltages and gate signals of the U _P , U _N , U _P ′, and U _N ′ phases of CON ₂ are shown. In Fig. 2, when a start command a (solid line) is input at an arbitrary time t ₀ , the AC/DC converter CON ₁ switches the _UP and U _N phase thyristors at time t ₁ when θ = 60° in the _UP phase thyristor. Bypass pair signals (hereinafter referred to as BPP) c and e are applied to the U P phase, and the U _P phase is immediately fired. At the same time, the operation of the forward voltage detection device is started by inputting the BPP signal c, and at each forward voltage detection time point (θ=0°) after time _t6 , a gate signal is sequentially outputted and applied to the thyristor. The bypass state is intermittent.

On the other hand, in the U _N phase, the thyristor voltage becomes 0 due to the firing of the U _P phase. Further, the operation of the forward voltage detection device is started by inputting the BPP signal e, and after time _t4 , the bypass state of the U _N phase thyristor is continued as in the case of the U _P phase.

The actual bypass state in the U _N phase is at time t ₁
When the thyristor voltage of the U _N phase becomes 0 due to the firing _of the U _{P phase} ^at However, this time we will omit this to explain the basic operation, _and
It is assumed that the phase and the U _N phase are fired at the same time.

Next, on the AC/DC converter CON ₂ side, BPP signals g and i are applied to the _UP' -phase and _UN' -phase thyristors at time _t3 . At this time _t3 , θ=60 in the U _P 'phase
°, and the U _P 'phase ignites immediately. Also, U
_{The N} ' phase is fired in accordance with the description of the _UN phase of CON ₁ above, and CON ₂ enters the bypass state at time _t3 . Therefore, the DC terminal P-N of the DC converter
becomes short-circuited at time _t3 . That is, the bypass state of CON ₂ with respect to AC/DC converter CON ₁ is after 30°, which is the phase difference of the commutated voltage.

Next, we will discuss the case where the startup command is input as shown by the broken line. That is, when the start command a is input at time _t2 , on the AC/DC converter _CON2 side, BPP signals g and i are input to the U _P ' phase and the U _N ' phase at exactly the same time _t3 as described above, and the circuit enters the bypass state. Become. one side
On the CON ₁ side, the ignition time is specified at time t ₁
, the BPP signal applied to the U _P phase is delayed until time _t8 . That is, in this case, the time when AC/DC converter CON ₁ enters the bypass state is delayed by approximately one cycle with respect to CON ₂ , which is undesirable due to current interruption and generation of reverse voltage.

The present invention eliminates the above-mentioned drawback of ignition delay when starting up a converter in which two or more AC/DC converters are connected in series. With container CON ₁
CON ₂ ensures that the timing of the ignition always takes place with a commutation phase difference of 30°. Based on such a method, the case of a conversion device using a plurality of AC/DC converters can also be summarized, and the purpose of the plural AC/DC converter groups is to input BPP signals in a prescribed order.

In a converter equipped with AC/DC converters CON ₁ and CON ₂ , it is possible that CON ₁ (or CON ₂ ) may be operated alone, so the first and second AC/DC converters are each equipped with a start control device, Each activation operation is performed according to instructions from the central command station. Therefore, when CON ₁ and CON ₂ are activated at the same time, it is necessary to coordinate their time.
That is, in the present invention, the first activation control device and the second AC/DC converter in the first AC/DC converter are configured to measure the mutual relationship between the respective activation control devices in the output of the BPP signal obtained by the activation control device. Respective synchronization signals necessary for the operation of the second activation control device in the converter are mutually inputted.

According to the present invention, the activation command from the central command station is
Even if the ignition timing of AC/DC converter CON ₁ is input after the specified time and the ignition timing of said CON ₁ is lost, this command will not be executed before the time specifying the ignition point of AC/DC converter CON ₂ . If you enter CON ₁
AC/DC converter CON ₁ and
CON ₂ always has a phase difference of 30° (or at the same time)
I am trying to input a BPP signal.

FIG. 3 shows an embodiment of the present invention.

This figure shows one of the converters in the DC power transmission device of FIG. 1, and both converters are equipped with exactly the same equipment. The AC/DC converter shown in the figure adopts a method of obtaining a gate signal by detecting the forward voltage of each thyristor, and the activation control device of the present invention is configured with a method compatible with this. There is. In FIG. 3, CC is the central command station, and US ₁ and US ₂ are the activation control devices of the present invention.
OR ₁₁ , OR ₁₂ , OR ₂₁ and OR ₂₂ are OR circuits,
CON ₁ and CON ₂ are AC/DC converters. Said US ₁
and US ₂ have the same internal mechanism. Therefore, if we describe its internal configuration for US ₁ , 1 is the activation command input terminal, 2 and 3 are the synchronization signal input terminals, 4 is the synchronization signal input terminal of the BPP signal source, and 6 is the gate signal of APPS applied to the thyristor. A synchronization signal input terminal for deblocking, 7 a deblock signal output terminal for the gate signal, 8 a BPP signal output terminal for the thyristor U _P phase, and 9 a U _N phase output terminal.
This is a BPP signal output terminal. Also, 1 in US ₁
1 is a start command circuit, 12 is an AND circuit (hereinafter
13 is an OR circuit (called an AND circuit),
14 is a flip-flop circuit (FF circuit), 15
is an AND circuit, 16 is an FF circuit, 17 is a differential circuit,
24 is a timer circuit (TIM circuit), 25 is an AND circuit, and 26 is an FF circuit. Also, the above OR circuit
Input terminals 31, 32, 31' and 32' of OR ₁₁ to OR ₂₂ are input terminals for receiving a gate signal of an automatic pulse phaser (APPS), a gate signal from a thyristor forward voltage detection device, and the like.

Note that the DC power transmission converter is controlled to start up by various control devices after it receives a start-up command and reaches the normal operating state, but the start-up control devices US ₁ and US ₂ in FIG. Only relevant parts are described, and other control devices are omitted.

FIG. 4 is a time chart showing the internal operations of the activation control devices US ₁ and US ₂ in FIG. 3, mainly focusing on US ₁ .

In US ₁ in Figure 3, terminal 2 is an AC/DC converter.
Synchronization signal b related to starting CON ₁ is input,
A synchronizing signal c related to starting the AC/DC converter CON ₂ is input to the terminal 3. The OR circuit 13 inputs the signal i from both of them to the AND circuit 12.
The input signals of the AND circuit 12 also include the output signal f of the start command circuit 11 and the output signal h of the FF circuit 26 for deblocking the APPS gate signal. The signal f is set to "0" and the signal h is set to "1". Furthermore, a synchronization signal d that defines the firing time of the BPP signal in CON ₁ is input to the terminal 4. A synchronizing signal e at the output of the APPS described above is input to the terminal 6.

Now, when the activation command a from the central command station is input to the terminal 1 at time _t0 , the activation command circuit 11 immediately outputs the signal f to "1". By this AND
The gate of the circuit 12 is opened, and the input signal i from the OR circuit 13 is outputted to the output terminal of the circuit after time _t1 . Since the FF circuit 14 is inverted by the first input pulse signal of the signal i, the output signal j of the circuit becomes "1" at time _t1 , and the gate of the AND circuit 15 is opened. Therefore, AND circuit 1
The synchronization signal d for BPP that was input to 5 is output as a signal k to its output terminal from time _t3 . The FF circuit 16 immediately operates with the first pulse signal at time t ₃ , converts it into a pulse signal by applying it to the differentiating circuit ₁₇ , and outputs only one BPP signal m ₁ at time t 3 to output terminals 8 and 9. The U _P phase and U phase of the AC/DC converter are connected via OR circuits OR ₁₁ and OR ₁₂ .
Give to _N phase.

In addition, the output signal f of the start command circuit 11 is TIM
It is delayed by the circuit 24, and at time _t7 , the signal g is output and the gate of the AND circuit 25 is opened. Therefore
The synchronization signal e from APPS input to the AND circuit 25 outputs a pulse signal after time _t8 .
The FF circuit 26 inputs this pulse signal at time _t8 , immediately inverts it, outputs the signal to the terminal 7, and simultaneously deblocks the gate signal from the APPS.
Close the gate of AND circuit 12, and then close the gate of FF circuit 1.
4 and 16 are reset.

Such an operation is similarly performed on the activation control device US ₂ side of the AC/DC converter CON ₂ . FIG. 4 shows representative signals L', l' and m'. The BPP signal m' is obtained by the signal d' input to the terminal 4'. AC/DC converter CON _y
The converter group formed by CON y and CON _z is generally intended to reduce ripple current in the DC system, and considering the reduction of equipment associated with this purpose, the converter group formed by CON _y and CON _z is A commutation phase difference of 30° is provided. Therefore, the above signals m and m' should also have the same time relationship, and furthermore, in order to have a phase angle that can maintain the firing of the thyristor, the U ^C phase of CON _y and the U C phase of CON _z
The firing angle in ^{the C} ' phase (or the U ^A phase and the U ^A ' phase, referred to as the U ^C phase and the U ^C ' phase in the present invention) is set to θ=60°.

Figure 4 shows a case where the start command a is _input at _{time t}
In the conventional method, when the synchronizing signal is input within the time period t _z of the synchronizing signal of CON _z having a phase difference of 30' _, the
The BPP signal m' is output at time t ^b , whereas it operates with the commutation phase angle advanced by 30 degrees as described above.
On the CON _y side, the BPP signal m cannot be output at time t ^a and is output at time t ^d of the next cycle. In this way, CON _y enters bypass pair operation with a one-cycle delay relative to CON _z depending on the timing at which the activation command a from the central command station is input, but the present invention overcomes this drawback. do not have. In other words, the command a is the synchronization signal c before time _t2 .
If input during c ₀ − c ₁ pulse of signal b ₁
Or, by either signal c ₁ , BPP signals m and m' are output with the time relationship between times t ₃ and t ₄ maintained, and when time t ₂ has passed, the signal b ₂ in the next cycle is output. and c ₂ to maintain the time relationship and output BPP at times t ₆ and t ₆ ′.

FIG. 5 shows the bypass operation in the start-up of the converter performed in accordance with the above description of the invention. The figure shows that the AC/DC converter
A case is shown in which the activation command a is input at time t ₁ , which is past the signal b ₁ at time t ₀ related to activation of CON ₁ .

In this way, the time t ₁ when the start command a passes the signal b ₁
Even if you enter the signal b ₁ according to the above explanation
(signal c ₁ in Fig. 4), the starting control device US ₁ on the AC/DC converter CON ₁ side can also obtain its operation, so at time t ₃ the U _P phase and U phase in the thyristor of CON ₁
BPP signals d ₁ and f ₁ are applied to _{the N} phase, respectively. Also, in CON ₂ , the BPP signal h ₁ at time t ₄
and j ₁ are applied respectively. This time t ₃ −t ₄
The distance between them is 30°, which is the commutation phase angle. Furthermore, the BPP signal d ₁ at time t ₃ in the voltage waveform c of the thyristor U _P phase is θ = 60°, and similarly, the BPP signal h ₁ at time t ₄ with respect to the voltage waveform g of the U _P ′ phase is θ = 60°.゜.

The operation of the thyristor forward voltage detection device is started by the input of the BPP signal, and the signal at time _t5 is
A pulse due to forward voltage detection is applied in this order to the signal j ₂ at time f 2 , t _{6 ,} the signal d ₂ at time t ₈ , and the signal h ₂ at time t ₉ to continue the bypass operation of the thyristor. As mentioned earlier, the signal f ₂ at time t ₅ and the signal j ₂ at time t ₆ obtained by forward voltage detection are actually the U _{P phase} ( _and U The detection of the forward voltage is accelerated by the ignition of phase _P ' (voltage waveforms c and g), and a gate signal is applied approximately 2 m ^s after time _t3 (and _t4) to put the converter in a bypass state. , is omitted in FIG. 5 in order to explain the basic operation.

FIG. 6 shows an embodiment of the activation control device of the present invention according to the second plan. The AC/DC converters CON ₁ and CON ₂ in the figure adopt a method in which normal gate signals are input from the APPS, and are the activation control device when the forward voltage detection method is not provided. In the figure, US ₁ and US ₂ are activation control devices in the present invention, and CON ₁ and CON ₂ are AC/DC converters. The US ₁ and US ₂ have the same circuit configuration. In US ₁ , 1 is a start command input terminal, 2 and 3 are synchronization signal input terminals, and 4
is a synchronization signal input terminal for the BPP signal source, 5 is a synchronization signal input terminal for continuation with the BPP signal, 6 is a synchronization signal input terminal for deblocking the gate signal of the thyristor, 7 is a deblock output terminal for the gate signal, 8 9 is the BPP signal output terminal of the thyristor U _P phase, and 9 is the BPP signal output terminal of the U _N phase. In addition, 11 in US ₁ is a start command circuit, 1
2 is AND circuit, 13 is OR circuit, 14 is FF circuit, 15 is AND circuit, 16 is FF circuit, 17 is
TIM circuit, 18 and 19 are AND circuits, 20 and 21 are differentiation circuits, 22 and 23 are OR circuits, 24 is TIM circuit, 25 is AND circuit, 26 is
It is an FF circuit. Also, 31 and 32 are APPS
This is the gate signal input terminal from.

In the case of FIG. 6 as well, like FIG. 3, only the parts related to the present invention are shown. Figure 6 assumes that the AC/DC converter is ignited during normal operation using the APPS gate signal.
The activation control device of the present invention is adapted to this method.

Therefore, there are some changes in the internal configuration of the activation control device. However, its basic operation is almost the same as that of the activation control device shown in FIG. 3 above. Therefore, only supplementary explanations will be provided regarding the points of difference.

In response to a startup command from the central command station, the startup command circuit 11 starts operating, and each circuit operates in sequence. Eventually, the FF circuit 16 is inverted and the differential circuit 20 outputs a pulse signal. After getting
It is applied as a BPP signal to the thyristor U _P phase via the OR circuit 22. This signal is the signal d ₁ at time t ₃ in FIG. 5 (signal m ₁ in FIG. 4). Also,
The output signal of the FF circuit 16 is input to the TIM circuit 17, and this signal is delayed by the time set by the TIM circuit and output. Then, after obtaining a pulse signal in addition to the differentiating circuit 21, it is applied as a BPP signal to the thyristor U _N phase via the OR circuit 23. This signal is designated as signal _f2 at time _t5 in FIG. As mentioned earlier, this signal f ₂ changes the thyristor voltage waveform e of the U _N phase due to the firing of the U _P phase, so in reality, the signal f 2 is approximately 2 m from the output point of the signal d ₁ according to the above. The time of the TIM circuit is set so that the output is output after ^s , but this is omitted for the purpose of providing a basic explanation as before. The same setting is also made in the device j ₂ for the signal h ₁ .

The output signal of the FF circuit 16 is further sent to the AND circuit 18.
and 19 gates are opened,
The AND circuit 18 outputs the synchronization signal input from the terminal 2, and passes it through the OR circuit 22 to the thyristor U _P
apply it to the phase. This signal is the signal in Figure 5.
d ₂ (signal b ₂ in FIG. 4). in the same way
AND circuit 19 ORs the synchronization signal input to terminal 5.
It is applied to the U _N phase via circuit 23. This signal is designated as signal _f3 in FIG. Said signal
d ₂ and signal f ₃ have firing phase angles of θ=0° at their respective thyristor voltages. Further _{, the signal d and the signal f are changed to the signals d 2 , d 3 ...d N and the signals f 3 ,} f ₄ ...f _N is added. These signals are sent to FF circuit 2
6, the gate signal of APPS continues to be applied until it is deblocked, and the thyristor U _P
The bypass state by phase and U _N phase continues.

The above-mentioned operation is similarly carried out on the side of the activation control device US ₂ shown in FIG. Therefore, when starting AC/DC converters CON ₁ and CON ₂ at the same time, the sixth
The starting control devices US ₁ and US ₂ shown in the figure can fire while maintaining the initial phase angle relationship of the BPP signal at 30 degrees at the initial stage of starting explained in Fig. 3, regardless of the input point of the starting command. .

FIG. 7 shows the activation control device of the present invention in FIG. 3.
An example in which US ₁ (and US ₂ ) is modified is shown.

In FIG. 7, 1 is a start command input terminal, 2 and 3 are synchronization signal input terminals, 6 is a synchronization signal input terminal for deblocking the APPS gate signal applied to the thyristor, 7 is a deblock signal output terminal for the gate signal, and 8 9 is the BPP signal output terminal of the thyristor U _P phase, and 9 is the BPP signal output terminal of the U _N phase. In addition, 11 is a start command circuit, 12 is an AND
circuit, 13 is OR circuit, 14 is monostable
In the multivibrator circuit (hereinafter referred to as MM circuit), 15 is a differential circuit.

The embodiment shown in the figure is characterized in that by employing the MM circuit 14, the synchronization signal (input terminal 4) of the BPP signal source in FIG. 3 is omitted. In this device, since the MM circuit 14 is set for a certain time T in advance, the AND circuit 1
2 generates an output signal and after that time period BPP
A signal is generated and applied to the gate of the thyristor. In this case, the MM circuit 1 of the starting control devices US ₁ and US ₂ in the AC/DC converters CON ₁ and CON ₂
Assuming that the setting times of 4 are logically the same value,
The firing phase angle θ of the BPP signal in the _UP phase of CON ₁ and CON ₂ is as shown in FIGS. 8a and 8b.

That is, FIG. 8a shows a case where the activation command a from the central command station is input before time _t0 , and the activation control device US _{1 and}
Since US ₂ starts operating, the BPP signal c is output at time t ₂ in the time period T of the MM circuit 14 . Therefore, the firing phase angle of the U _P phase in the AC/DC converter CON ₁ is θ=60° as shown in the figure, and
The U _P phase of CON ₂ is ignited when θ ₂ =30°.

Next, FIG. 6 shows a case where the start command a is input between times _t0 and _t1 , and in this case, _US1 and _US2 start operating at time _t1 in the synchronization signal _b2 . Due to the time limit T, the BPP signal c is the time
Output at t ₂ . Therefore, the _UP phase in CON ₁ has an ignition phase angle of θ ₁ =90°, and the _UP phase in CON ₂ has an ignition phase angle of θ ₂ =60°. That is, in the starting control device of FIG. 7, CON ₁ and CON ₂ are simultaneously fired at either time t ₂ in FIG. 8 a or time t ₂ in FIG. 8 b. In addition, the ignition on the U _N phase side in CON ₁ and CON ₂ is performed by U _P as described in Fig. 3.
This is done using the gate signal obtained by detecting the forward voltage generated by the ignition of the phase, and is approximately 2 m ^s after the BPP signal c, but these relationships are omitted in Figure 8 a and b, and the time is basically It shall be fired at t ₂ .

According to the present invention, when starting a DC converter in which two AC/DC converters with a commutation phase difference of 30° are connected in series, a start command is input after a specified time in the AC/DC converter CON ₁ . Even in this case, the starting control device US ₁ associated with CON ₁ can also operate at a specified point in time in the AC/DC converter CON ₂ having a phase delay of 30°.
Since CON ₁ and CON ₂ always input the BPP signal with a 30° phase difference (or at the same time), the start of ignition due to the BPP signal on the CON ₁ side, which occurred in the conventional method, is reduced to one cycle. This eliminates the intermittent current and reverse voltage generated by the thyristor that would occur when there is a delay, making the startup operation of the DC power transmission device stable.

[Brief explanation of the drawing]

Figure 1 is a DC power transmission converter, Figure 2 is a bypass pair operation diagram at startup in a conventional DC power transmission and converter, Figure 3 is the startup control device of the present invention in the first plan, and Figure 4 is the same control. A time chart of the operation of the device, FIG. 5 is a bypass operation diagram when the DC power transmission converter is started by the control device, FIG. 6 is a start-up control device of the present invention in the second plan, and FIG. 7 is a diagram of the start-up control device of the present invention in the second plan. FIG. 8, a modification of the startup control device, is a bypass operation diagram when the DC power transmission conversion device is started by the same signal. A...AC system, B...AC system, Tr ₁ to _{Tr 4}
...Transformer, CON ₁ to CON ₄ ...AC/DC converter,
DCL ₁ ~ DCL ₂ ...DC reactor, L...DC transmission line, G...earth return path, P...positive DC terminal, N
...Negative DC terminal.

Claims (1)

[Claims] 1 a first actuator driven by a first activation control device;
Both the first converter station and the second converter station are equipped with a converter group in which the converter and the second converter driven by the second activation control device are connected in series. The first and second start-up control devices input a start-up command from a central command station to put the husband's converter in a bypass pair state, and the first start-up control device It has a first synchronization signal that is synchronized with the AC side voltage phase of the first converter, and a second
The activation control device has a second synchronization signal that is synchronized with the AC voltage phase of the second converter that is delayed by 30 degrees from the AC voltage phase of the first converter, The first or second activation control device inputs the first or second synchronization signal controlled by itself and the second or first synchronization signal, and if any of the synchronization signals is present, the central command station There is a start command from the converter, a deblock signal for the first or second converter controlled by the self, and in this state the first or second converter controlled by the self is set as a bypass pair. In the presence of a signal specifying time, a signal is output that makes the first or second converter controlled by the converter a bypass pair, and the group of converters at the first converter station and the converter group 1. A start-up control method for a DC power transmission device, characterized in that the converter group in the second converter station is set as a bypass pair at the same time that defines the group.