JPS6234141B2 - - Google Patents
Info
- Publication number
- JPS6234141B2 JPS6234141B2 JP56127048A JP12704881A JPS6234141B2 JP S6234141 B2 JPS6234141 B2 JP S6234141B2 JP 56127048 A JP56127048 A JP 56127048A JP 12704881 A JP12704881 A JP 12704881A JP S6234141 B2 JPS6234141 B2 JP S6234141B2
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- hole
- tape carrier
- wiring pattern
- metal wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/453—Leadframes comprising flexible metallic tapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
- H10W70/654—Top-view layouts
- H10W70/655—Fan-out layouts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/701—Tape-automated bond [TAB] connectors
Landscapes
- Wire Bonding (AREA)
Description
【発明の詳細な説明】
本発明は、いわゆるTAB(Tape Automated
Bonding)法により集積回路装置の組み立てを行
なう際に用いられるテープキヤリアに関するもの
である。DETAILED DESCRIPTION OF THE INVENTION The present invention is directed to the so-called TAB (Tape Automated
The present invention relates to tape carriers used when assembling integrated circuit devices using the bonding method.
TAB法は、同一配線パタンを長尺の絶縁性フ
イルム上に密着してくり返えし設けたテープキヤ
リアに集積回路(以下、ICと称す)チツプを接
続する方法で、配線パタンをICチツプの電極配
置に合わせて形成するために、両者の目合わせを
行なえば全接続を同時に行なえ、更に同一配線パ
タンが長尺のテープにくり返えし設けられている
のでICチツプの接続が連続して行なえるなどの
利点がある。 The TAB method is a method in which an integrated circuit (hereinafter referred to as IC) chip is connected to a tape carrier in which the same wiring pattern is repeatedly placed in close contact with a long insulating film. Since it is formed to match the electrode arrangement, all connections can be made at the same time by aligning the two, and since the same wiring pattern is repeated on a long tape, the IC chips can be connected continuously. There are advantages such as being able to perform
第1図に、ICチツプを接続した状態の従来の
テープキヤリアの例を示した。テープキヤリア1
の両側には、スプロケツトホール2が設けられて
おり、長尺のテープキヤリアの搬送に利用できる
ようになつている。テープキヤリアの中央部に
は、デバイスホール3が等間隔に開けられてお
り、その中にリード4が突出し、その先端にIC
チツプ5が接続されている。接続されたICの電
気テストは、リード4の末端部に設けられたパツ
ド6に針を当てて行なわれる。このようにして検
査されたICは、良、不良あるいは性能によるグ
レード分けを行なうために、貫通孔7a〜7dを
開ける。例えば、7aの位置に孔を開けたICは
不良品、7bは良品、7cは性能の良いIC、7
dは不良ではないが性能の劣るICというぐあい
にである。これらの貫通孔はホト・センサーによ
りその有無を検出され、例えば不良品はICを打
ち抜いて除去したり、グレード別に弁別するため
に用いられる。 Figure 1 shows an example of a conventional tape carrier with an IC chip connected. tape carrier 1
Sprocket holes 2 are provided on both sides of the tape carrier and can be used for transporting long tape carriers. Device holes 3 are formed at equal intervals in the center of the tape carrier, and leads 4 protrude into the holes, and an IC is inserted at the tip of the device holes 3.
Chip 5 is connected. An electrical test of the connected IC is performed by applying a needle to the pad 6 provided at the end of the lead 4. Through holes 7a to 7d are opened in the thus inspected ICs in order to grade them according to good, bad, or performance. For example, an IC with a hole at position 7a is a defective product, 7b is a good product, 7c is a good performance IC, and 7a is a good IC.
d is not a defective IC, but it is an IC with inferior performance. The presence or absence of these through-holes is detected by a photo sensor, and is used, for example, to punch out and remove defective ICs, or to differentiate them by grade.
しかし、従来はこの貫通孔は導電パタンのない
部分に開けられていたために、半透明の絶縁性フ
イルムを通しての光量と孔を通しての光量のコン
トラストが小さく、誤認識することがしばしばあ
つた。また、絶縁性フイルムの濃さも製造ロツト
のバラツキにより異なり、ホト・センサーの検出
感度をテープロツトにより調整しなければならな
い欠点があつた。 However, in the past, this through hole was made in a part without a conductive pattern, so the contrast between the amount of light passing through the semitransparent insulating film and the amount of light passing through the hole was small, and erroneous recognition often occurred. In addition, the density of the insulating film also varied due to variations in manufacturing lots, and there was a drawback that the detection sensitivity of the photo sensor had to be adjusted by tape lots.
本発明は、従来の上記欠点をなくすためになさ
れたもので、貫通孔を金属パタン上に開けること
により、孔が開いていない場合の光の漏れを防
ぎ、ホト・センサーによる検出の誤認識を防ごう
とするものである。 The present invention was made in order to eliminate the above-mentioned drawbacks of the conventional technology, and by making through holes on the metal pattern, it prevents light leakage when the holes are not open, and prevents erroneous recognition of detection by photo sensors. This is what we are trying to prevent.
すなわち本発明の特徴は、同一の金属配線パタ
ンを絶縁性フイルムの一主面に等間隔に密着して
くり返し設けたテープキヤリアにおいて、この金
属配線パタンに、前記金属配線パタンおよび前記
絶縁性フイルムを貫通する孔を設けたテープキヤ
リアにある。さらに本発明の他の特徴は、同一金
属配線パタンを絶縁性フイルムの一主面に等間隔
に密着して設けたテープキヤリアにおいて、前記
絶縁性フイルムの前記金属配線パタンを有しない
部分に遮光性パツドが形成され、この遮光性パツ
ド領域に前記絶縁性フイルムを貫量して孔が設け
られているテープキヤリアにある。そして、遮光
性パツドが金属配線パタンと同一の金属で形成さ
れていることが好ましい。 That is, a feature of the present invention is that in a tape carrier in which the same metal wiring pattern is repeatedly provided in close contact with one main surface of an insulating film at equal intervals, the metal wiring pattern and the insulating film are attached to the metal wiring pattern. It is located on a tape carrier with a hole passing through it. Furthermore, another feature of the present invention is that in a tape carrier in which identical metal wiring patterns are provided in close contact with one main surface of an insulating film at regular intervals, a portion of the insulating film that does not have the metal wiring pattern has a light-shielding property. The tape carrier is provided with a pad and a hole is provided in the light-shielding pad area extending through the insulating film. Preferably, the light-shielding pad is made of the same metal as the metal wiring pattern.
以下に本発明の実施例を図面を用いて説明す
る。ICの良否判別のために、金属パツド8を設
け、この上に貫通孔9aを開けた例を第2図に示
した。検出ミスのないパツドの大きさは、直径1
mmの穴の大きさに対して2mm角以上の正方形であ
ればよい。また、9bのように配線パタンの一部
に穴を開けてもよい。この場合、パツド6は少し
大きめにし、穴を開けた後でも電気テストが行な
えるようになつている。絶縁性フイルム1の色が
比較的濃い場合は、孔の全周が金属でなくても9
cのように一部だけが金属で覆われていても十分
である。絶縁性フイルムには、通常ポリエステル
かポリイミド・フイルムが用いられるが、ポリエ
ステルは光の透過率が高いので9aや9bの例の
ごとく行なつた方が良いが、ポリイミドの場合は
通常は茶褐色を呈しており光の通過率が比較的低
く、9cの例でも十分である。 Embodiments of the present invention will be described below with reference to the drawings. FIG. 2 shows an example in which a metal pad 8 is provided and a through hole 9a is drilled thereon in order to determine the quality of the IC. The size of the pad without detection error is 1 in diameter.
It only needs to be a square with a square size of 2 mm or more for the hole size of mm. Alternatively, a hole may be made in a part of the wiring pattern as shown in 9b. In this case, the pad 6 is made a little larger so that an electrical test can be performed even after the hole is drilled. If the color of the insulating film 1 is relatively dark, even if the entire circumference of the hole is not metal.
It is sufficient even if only a portion is covered with metal as shown in c. Polyester or polyimide film is usually used as the insulating film, but polyester has a high light transmittance, so it is better to use it as in examples 9a and 9b, but polyimide usually has a brownish color. Since the light transmission rate is relatively low, the example 9c is also sufficient.
以上の説明は、貫通孔を電気検査の良否判別や
グレード分けをするために開けた例で行なつた
が、これに限らず、テープキヤリア製造工程にお
ける不良やICチツプの組み立て工程での不良に
ついて行なつても良く、工程別に孔を開ける位置
を変えれば、最終段階で工程別の不良の集計を行
なうことも可能である。 The above explanation is based on an example in which through-holes are drilled for the purpose of determining pass/fail for electrical inspection and for grading, but the examples are not limited to this, and can also be applied to defects in the tape carrier manufacturing process and IC chip assembly processes. However, by changing the position of the holes for each process, it is also possible to tally the defects for each process at the final stage.
以上、詳細に説明したように、本発明によれば
テープキヤリア上に開けた孔の有無のホト・セン
サーによる検出が確実に行なえるようになり、良
品を除去したり不良品を良品として扱うミスが無
くなるだけでなく、工程管理も容易に且つ確実に
行なうことが可能となる。 As described in detail above, according to the present invention, it is possible to reliably detect the presence or absence of holes drilled on a tape carrier using a photo sensor, thereby eliminating the need to remove non-defective products or treat defective products as non-defective products. Not only is this eliminated, but process control can also be easily and reliably performed.
第1図は従来のテープキヤリアを示す平面図、
第2図は本発明の実施例のテープキヤリアを示す
平面図、である。
なお図において、1……絶縁性フイルム、2…
…スプロケツトホール、3……デバイス・ホー
ル、4……リード、5……ICチツプ、6……パ
ツド、7a〜7d……貫通孔、8……金属パツ
ド、9a〜9c……貫通孔、である。
Figure 1 is a plan view showing a conventional tape carrier.
FIG. 2 is a plan view showing a tape carrier according to an embodiment of the present invention. In the figure, 1... insulating film, 2...
... Sprocket hole, 3... Device hole, 4... Lead, 5... IC chip, 6... Pad, 7a to 7d... Through hole, 8... Metal pad, 9a to 9c... Through hole, It is.
Claims (1)
主面に等間隔に密着してくり返し設けたテープキ
ヤリアにおいて、前記金属配線パタンのうち前記
絶縁性フイルムに密着している部位に貫通孔を設
け、該貫通孔を通して光の透過を可能ならしめ、
これによりコントラスト良好の状態で、金属配線
パタンに接続された半導体チツプの特性結果を認
識しうるようにしたことを特徴とするテープキヤ
リア。1. In a tape carrier in which the same metal wiring pattern is repeatedly provided in close contact with the insulating film on one main surface of an insulating film, a through hole is provided in a portion of the metal wiring pattern that is in close contact with the insulating film, allowing light to pass through the through hole;
A tape carrier characterized in that this makes it possible to recognize the characteristic results of a semiconductor chip connected to a metal wiring pattern with good contrast.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56127048A JPS5828862A (en) | 1981-08-13 | 1981-08-13 | Tape carrier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56127048A JPS5828862A (en) | 1981-08-13 | 1981-08-13 | Tape carrier |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63099776A Division JPS63288038A (en) | 1988-04-22 | 1988-04-22 | Tape carrier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5828862A JPS5828862A (en) | 1983-02-19 |
| JPS6234141B2 true JPS6234141B2 (en) | 1987-07-24 |
Family
ID=14950312
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56127048A Granted JPS5828862A (en) | 1981-08-13 | 1981-08-13 | Tape carrier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5828862A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59161848A (en) * | 1983-03-04 | 1984-09-12 | Nec Corp | Apparatus for manufacturing resin sealed type semiconductor device |
| JPH056659Y2 (en) * | 1987-11-17 | 1993-02-19 | ||
| US4980219A (en) * | 1988-04-06 | 1990-12-25 | Casio Computer Co., Ltd. | Carrier tape for bonding IC devices and method of using the same |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5327364A (en) * | 1976-08-26 | 1978-03-14 | Fujitsu Ltd | Film carrier integrated circuit and its production |
| JPS5410867A (en) * | 1977-06-25 | 1979-01-26 | Toyota Motor Corp | Brake booster for vehicle |
| JPS54155869A (en) * | 1978-05-29 | 1979-12-08 | Seiko Epson Corp | Crystal watch |
-
1981
- 1981-08-13 JP JP56127048A patent/JPS5828862A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5828862A (en) | 1983-02-19 |
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