JPS6234153B2 - - Google Patents
Info
- Publication number
- JPS6234153B2 JPS6234153B2 JP56134566A JP13456681A JPS6234153B2 JP S6234153 B2 JPS6234153 B2 JP S6234153B2 JP 56134566 A JP56134566 A JP 56134566A JP 13456681 A JP13456681 A JP 13456681A JP S6234153 B2 JPS6234153 B2 JP S6234153B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- pair
- electrodes
- flat
- mold
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
- H10W76/10—Containers or parts thereof
- H10W76/12—Containers or parts thereof characterised by their shape
- H10W76/13—Containers comprising a conductive base serving as an interconnection
- H10W76/138—Containers comprising a conductive base serving as an interconnection having another interconnection being formed by a cover plate parallel to the conductive base, e.g. sandwich type
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07351—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
- H10W72/07354—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in dispositions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/341—Dispositions of die-attach connectors, e.g. layouts
- H10W72/347—Dispositions of multiple die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Die Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
この発明はモールド形半導体装置、特にダイオ
ードや整流器等2端子構造の半導体素子の両側に
ヒートシンクを配設し、両電極面より放熱させる
ダブルヒートシンク構造の半導体装置の製造方法
に関する。[Detailed Description of the Invention] This invention relates to a method for manufacturing a molded semiconductor device, particularly a semiconductor device with a double heat sink structure in which heat sinks are disposed on both sides of a semiconductor element with a two-terminal structure such as a diode or a rectifier, and heat is dissipated from both electrode surfaces. Regarding.
従来、ダイオードや整流器は小形で放熱特性が
優れ、比較的電流容量の大きいものが得られるた
め、素子電極の両側に電極板を取付したDHD構
造のものが主流を占めている。例えば、第1図は
この種DHD形ガラス封止ダイオード1の断面図
であり、ダイオード素子2の両電極2a,2bが
一対のジユメツト材よりなる口出導体3,3で挾
着され、これらの周囲を覆つてガラス管4により
口出導体3の側面で封止されている。口出導体3
の外方には、一対のリード線5,5が溶接され、
ダイオード素子2内部で発生した熱は大径の口出
導体3を通して素子両側に導出するよう構成され
ている。ところで、このようなダイオード1をプ
リント基板等に実装するには、図示しないが、前
記リード線5をプリント基板の装着孔にピツチ合
わせして成形し、この成形されたリード線5をプ
リント基板の装着孔に弾接させて挿入した後、半
田付けして行われるが、作業が繁雑で多大の工数
を要していた。このため、第2図に示すように、
小径部6と大径部7を有する一対の口出導体8,
8を用い、この小径部6の端面間にダイオード素
子2の電極2a,2bを挾着させ、ダイオード素
子2を囲んで口出導体8の小径部6の側面でガラ
ス管4で封止したDHD形ガラス封止ダイオード
9も提案されている。(DHD形ダイオード出願番
号53―118203昭和53年8月28日付参照)このダイ
オード9は口出導体8の大径部7が板状であり、
上記ダイオードの如く曲がり易いリード線5を用
いないから、取扱いが容易となりプリント基板の
取付に自動化が適用出来る等優れた効果を有する
ものである。 Conventionally, diodes and rectifiers are compact, have excellent heat dissipation characteristics, and have a relatively large current capacity, so the DHD structure, in which electrode plates are attached to both sides of the element electrode, has been the mainstream. For example, FIG. 1 is a cross-sectional view of this kind of DHD type glass-sealed diode 1, in which both electrodes 2a and 2b of a diode element 2 are clamped by a pair of lead conductors 3 and 3 made of a composite material. A glass tube 4 covers the periphery and is sealed on the side surface of the outlet conductor 3. Exit conductor 3
A pair of lead wires 5, 5 are welded to the outside of the
The structure is such that the heat generated inside the diode element 2 is led out to both sides of the element through the large-diameter lead conductor 3. By the way, in order to mount such a diode 1 on a printed circuit board or the like, the lead wire 5 is molded by aligning it with the mounting hole of the printed circuit board (not shown), and the molded lead wire 5 is inserted into the mounting hole of the printed circuit board. This is done by inserting elastically into the mounting hole and then soldering, but this is a complicated process and requires a large amount of man-hours. Therefore, as shown in Figure 2,
a pair of outlet conductors 8 having a small diameter portion 6 and a large diameter portion 7;
8, the electrodes 2a and 2b of the diode element 2 are clamped between the end faces of the small diameter part 6, and the diode element 2 is surrounded and sealed with the glass tube 4 on the side of the small diameter part 6 of the outlet conductor 8. A shaped glass-sealed diode 9 has also been proposed. (Refer to DHD type diode application number 53-118203 dated August 28, 1973) In this diode 9, the large diameter portion 7 of the outlet conductor 8 is plate-shaped.
Since the lead wire 5, which is easy to bend as in the case of the diode, is not used, it is easy to handle and has excellent effects such as being able to automate the mounting of printed circuit boards.
しかしながら、このように使用面で優れた特徴
を有するダイオード9も、一方製造面に於いて
は、小径部6と大径部7を有する口出導体8の製
造や、ガラス封止作業が難しくなる欠点があつ
た。即ち、口出導体8は小径円筒状のジユメツト
部品と大径の板状部品を溶接等により接合して得
られるが所定寸法精度のものが得にくいものであ
つた。又ガラス封止作業はカーボン治具等を用
い、ダイオード素子2、口出導体8、ガラス管4
等の封着部品を位置合わせして装着し、ガラス管
4を高温に加熱溶融して行われるが、何分にも異
形状の口出導体8の装着に手間がかゝり工数増と
なる等のため、高価となり、製造及び使用の両面
を併せて満足出来るダブルヒートシンク構造の半
導体装置は得られていない。 However, even though the diode 9 has such excellent features in terms of use, in terms of manufacturing, it becomes difficult to manufacture the lead conductor 8 having the small diameter part 6 and the large diameter part 7, and to perform glass sealing work. There were flaws. That is, although the lead conductor 8 is obtained by joining a small-diameter cylindrical piece and a large-diameter plate-like part by welding or the like, it is difficult to obtain one with a predetermined dimensional accuracy. In addition, the glass sealing work uses a carbon jig, etc. to seal the diode element 2, the lead conductor 8, and the glass tube 4.
This is done by aligning and attaching the sealing parts such as, and heating and melting the glass tube 4 at a high temperature, but it takes a lot of time and effort to attach the lead conductor 8, which has an irregular shape, and increases the number of man-hours. For these reasons, it is expensive, and a semiconductor device with a double heat sink structure that can satisfy both manufacturing and usage aspects has not been obtained.
本発明は以上の点に鑑み提案されたものであ
り、プリント基板への装着や取扱いが容易な構造
で、しかも量産性よく安価に製造出来るダブルヒ
ートシンク構造の半導体装置の製造方法を提供す
る。 The present invention has been proposed in view of the above points, and provides a method for manufacturing a semiconductor device with a double heat sink structure that is easy to attach to a printed circuit board and handle, and can be mass-produced at low cost.
本発明に係る半導体装置は、半導体素子両主面
に形成された電極面がヒートシンクとなる一対の
平坦な電極板間にサンドイツチ構造にマウントさ
れる。そしてこれらの電極板間に半導体素子が固
着されたマウント体は、半導体素子及び両電極板
の外端面を除く主要部分がモールド部材で被覆さ
れるもので、一対の口出導体に平板状の電極板を
用いるため、製造が極めて容易となると共に、細
線のリード線を用いないチツプ構造であるから、
半導体装置の使用が容易となる等優れた効果が得
られる。かゝる構造の半導体装置の製造は、少な
くとも次の如き工程を経て製造される。即ち、
1 半導体素子の両主面に形成された電極面を一
対の電極板間に固着する半導体素子のマウント
工程、
2 前記半導体素子の固着されたマウント体を複
数個、夫々の電極板の両主面をこれらの電極板
より大きく形成されたマウント体の保持具、例
えば一組の基台間に密着固定させ、前記電極板
の外端面をカバーする工程、
3 前記電極板の端面をカバーした保持具の各マ
ウント体間の空隙内にモールド部材を充填し、
前記半導体素子と前記電極板を一体にモールド
する工程、
4 前記充填されたモールド部材を固化する工
程、
5 前記モールド部材の固化后、前記一組の基台
を前記一対の電極板の端面から除去する工程、
及び
6 前記固化されたモールド部材を半導体素子間
で切断分離し個々の半導体装置を得る工程とを
含むもので、半導体素子の両電極面を固着する
一対のヒートシンクとなる電極部材に、製造容
易な平板状電極部材が使用され、又モールドタ
イプであるから従来のガラス封止タイプに比べ
封止作業が容易且つ量産性に優れる等、製造及
び使用両面に亘つて優れた特徴を有するダブル
ヒートシンク構造の半導体装置が安価且つ能率
よく製造される。 The semiconductor device according to the present invention is mounted in a sandwich structure between a pair of flat electrode plates, in which electrode surfaces formed on both main surfaces of the semiconductor element serve as heat sinks. The mount body in which the semiconductor element is fixed between these electrode plates is one in which the main parts of the semiconductor element and both electrode plates except for the outer end surfaces are covered with a molding material, and the flat electrodes are attached to a pair of lead conductors. Since it uses a plate, manufacturing is extremely easy, and the chip structure does not use thin lead wires.
Excellent effects such as ease of use of the semiconductor device can be obtained. A semiconductor device having such a structure is manufactured through at least the following steps. That is, 1. A semiconductor element mounting step in which electrode surfaces formed on both main surfaces of the semiconductor element are fixed between a pair of electrode plates; 2. A plurality of mount bodies to which the semiconductor element is fixed are mounted on both sides of each electrode plate. 3. Covering the outer end surface of the electrode plate by tightly fixing the main surface between the holders of the mount body, such as a pair of bases, which are formed larger than the electrode plates; 3. Covering the end surface of the electrode plate; Filling the void between each mount body of the holder with a mold member,
4. Solidifying the filled mold member; 5. After solidifying the mold member, removing the set of bases from the end faces of the pair of electrode plates. The process of
and 6. Cutting and separating the solidified mold member between semiconductor elements to obtain individual semiconductor devices. The double heat sink structure has excellent characteristics in terms of both manufacturing and use, such as using a flat electrode member and being a mold type, which makes the sealing work easier and easier to mass-produce than conventional glass-sealed types. A semiconductor device can be manufactured at low cost and efficiently.
以下本発明の実施例を図面と共に詳述する。 Embodiments of the present invention will be described in detail below with reference to the drawings.
第3図は本発明方法で得られるダブルヒートシ
ンク構造の半導体装置の一実施例で、樹脂封止タ
イプのSiダイオード11が示されている。図に於
いて12はプレーナ構造のダイオード素子で、両
主面には図示しないが内部のP―N接合に対応し
たアノード電極12a、及びカソード電極12b
がオーミツクコンタクトの良好な金属、例えば
Au,Agの蒸着又はメツキ法等で形成されてい
る。13及び14はこれらの両電極12a,12
bに夫々銀ペースト等の鑞材15により接合され
た平板電極で、素子12の電極導出端子及びヒー
トシンクとして作用する。16は素子12及び平
板電極13,14の外端面13a,14aを除く
主要部を被覆したエポキシ樹脂等のモールド部材
である。かゝる構造のダイオード11は、素子1
2が一対の平板電極13,14間に挾着された状
態で接合されており、素子12内部で発生した熱
はこれらの両平板電極13,14を通して両側に
放熱される。又、一対の平板電極13,14の外
端面13a,14aが夫々露出して樹脂封止され
ているから、これらの端面13a,14aを、図
示しないがプリント基板等の導電ランドに半田付
け等により取付出来、リードを用いないチツプ構
造であるから、取扱いが容易である。 FIG. 3 shows an embodiment of a semiconductor device with a double heat sink structure obtained by the method of the present invention, in which a resin-sealed Si diode 11 is shown. In the figure, 12 is a diode element with a planar structure, and an anode electrode 12a and a cathode electrode 12b, which are not shown in the figure, correspond to the internal PN junction on both main surfaces.
metals with good ohmic contact, e.g.
It is formed by Au, Ag vapor deposition or plating method. 13 and 14 are these two electrodes 12a, 12
A flat plate electrode is bonded to b by a solder material 15 such as silver paste, and serves as an electrode lead-out terminal and a heat sink for the element 12. 16 is a molded member made of epoxy resin or the like that covers the main parts of the element 12 and the flat electrodes 13 and 14 except for the outer end surfaces 13a and 14a. The diode 11 having such a structure has the element 1
2 is connected between a pair of flat plate electrodes 13 and 14 in a sandwiched state, and heat generated inside the element 12 is radiated to both sides through both of these flat plate electrodes 13 and 14. Furthermore, since the outer end surfaces 13a and 14a of the pair of flat plate electrodes 13 and 14 are exposed and sealed with resin, these end surfaces 13a and 14a can be soldered to conductive lands on a printed circuit board or the like (not shown). It is easy to install and has a chip structure that does not use leads, so it is easy to handle.
次にかゝる構造のSiダイオード11の製造方法
について述べる。先づ、第4図に示すようにダイ
オード素子12の両電極12a,12bを一対の
平板電極13,14間にAgペースト等の鑞材1
5を介してサンドイツチ式に接合して固着する。
このダイオード素子12の平板電極13,14へ
の取付けは、図示しないが、例えばカーボン治具
等を用いてコンベア炉に通す方法等通常の半導体
マウント装置を用いて容易に達成出来る。又、用
いる鑞材15は、Agペーストの他半導体素子1
2及び平板電極13,14と接着性良好な半田部
材、例えば金錫半田や銀錫半田等を用いることが
出来る。次に半導体素子12の両電極12a,1
2bを平板電極13,14に取付したマウント体
17は第5図に示すように、先づ一方の平板電極
14側の外端面14aを平板状基台18に接着材
19等を用いて複数個所定間隔離間して固定す
る。接着材19としては、後述する半導体素子1
2のモールド時、電極端面14aが充分カバー出
来る程度の接着力を有し、モールド部材の固化后
容易に剥離出来る樹脂性接着材が用いられる。
又、20は平板状基台18の各マウント体17間
に設けた仕切板で、必らずしも必要でないが、モ
ールド部材固化後の切断分離を容易にしている。
次に他方の平板電極13上から平板状基台21を
接着材19を用いてその電極端面13aを同様に
密着固定させる。即ち、平板状基台18及び21
はマウント体17の夫々の電極端面14a,13
aが密着固定されるマウント体17のモールド用
保持具であり、必らずしも平板状基台としてこれ
に接着剤で固定する必要はなく、要は各マウント
体17のモールドに先立ち、各マウント体17の
電極端面14a,13aがカバーされる構造であ
ればよい。 Next, a method for manufacturing the Si diode 11 having such a structure will be described. First, as shown in FIG. 4, both electrodes 12a and 12b of the diode element 12 are bonded with a solder material 1 such as Ag paste between the pair of flat electrodes 13 and 14.
5, and are joined and fixed in a sanderch style.
Although not shown, the diode element 12 can be easily attached to the flat plate electrodes 13 and 14 using a conventional semiconductor mounting device, such as a method of passing the diode element 12 through a conveyor furnace using a carbon jig or the like. In addition, the soldering material 15 used is not only Ag paste but also the semiconductor element 1.
2 and the flat plate electrodes 13, 14, a solder material having good adhesion, such as gold-tin solder or silver-tin solder, can be used. Next, both electrodes 12a, 1 of the semiconductor element 12
As shown in FIG. 5, the mount body 17 in which the electrodes 2b are attached to the flat electrodes 13 and 14 is first attached to the outer end surface 14a of one of the flat electrodes 14 on the flat base 18 using an adhesive 19 or the like. Separate and fix for a specified period of time. As the adhesive material 19, the semiconductor element 1 to be described later is used.
2, a resin adhesive is used that has enough adhesive strength to sufficiently cover the electrode end face 14a and can be easily peeled off after the mold member has solidified.
Further, 20 is a partition plate provided between each mount body 17 of the flat base 18, which, although not necessarily necessary, facilitates cutting and separation after the mold member has solidified.
Next, the electrode end surface 13a of the flat base 21 is similarly tightly fixed from above the other flat electrode 13 using the adhesive 19. That is, the flat bases 18 and 21
are the respective electrode end surfaces 14a and 13 of the mount body 17.
a is a holder for the mold of the mount body 17 that is closely fixed, and it is not necessarily necessary to fix it to this as a flat base with adhesive; in short, each mount body 17 is Any structure may be used as long as the electrode end faces 14a and 13a of the mount body 17 are covered.
次に、このように両電極板13,14が平極板
基台18,21間に固定され、両電極外端面13
a,14aがカバーリングされた複数個のマウン
ト体17は、第6図に示すように、両基台18,
21間の空隙内にエポキシ、シリコン等の樹脂
材、又はガラス材等のモールド部材16を充填す
ることにより、半導体素子12及び両平板電極1
3,14が一体にモールドされる。モールド部材
16の充填は、デイツプ法、スプレー法、射出法
等種種の方法が採用されるが、両電極13,14
の外端面13a,14aは基台18,21でカバ
ーリングされ、この部分にはモールド部材16が
被覆されないようにする。次にモールドされたマ
ウント体17は所定の温度でモールド部材16を
固化した後、全体を接着材19の洗浄液中に浸す
と、第7図に示すように、平板状基台18,21
が平板電極13,14から除去されると同時に、
接着材19が剥離され両平板電極の外端面13
a,14aが露呈する。その後、矢印図示するよ
うに各素子12間でモールド部材16を切断分離
することにより、第3図に示すダブルヒートシン
ク構造のSiダイオード11が同時に多数個製造さ
れる。この切断分離は、ダイシング法、プレスカ
ツト法等種々の方法が採用されるが、図示するよ
うに、基台18,21のモールド部材16切断予
定域にモールド部材16と非接着性の仕切板20
を設けておくと、切断分離が容易となる。又、モ
ールド部材16の充填を、第8図に示すように、
個々の素子12毎に行ない各素子12間に空隙を
設けるようにすれば、モールド部材16の固化後
の切断作業が不要になる。 Next, both electrode plates 13 and 14 are fixed between the flat plate bases 18 and 21 in this way, and both electrode outer end surfaces 13 and 14 are fixed between the flat plate bases 18 and 21.
As shown in FIG.
The semiconductor element 12 and both flat electrodes 1 are filled with a molding member 16 made of a resin material such as epoxy or silicone, or a glass material.
3 and 14 are integrally molded. Various methods can be used to fill the mold member 16, such as a dip method, a spray method, and an injection method.
The outer end surfaces 13a, 14a of are covered with the bases 18, 21, so that these portions are not covered with the mold member 16. Next, after solidifying the mold member 16 at a predetermined temperature, the molded mount body 17 is immersed in a cleaning solution for the adhesive 19. As shown in FIG.
is removed from the flat electrodes 13 and 14, and at the same time,
The adhesive material 19 is peeled off and the outer end surfaces 13 of both flat electrodes are removed.
a, 14a are exposed. Thereafter, by cutting and separating the mold member 16 between each element 12 as shown by the arrows, a large number of Si diodes 11 having the double heat sink structure shown in FIG. 3 are simultaneously manufactured. Various methods such as a dicing method and a press cut method are adopted for this cutting and separation.
If this is provided, cutting and separation will be facilitated. Further, the filling of the mold member 16 is performed as shown in FIG.
If this is done for each individual element 12 and a gap is provided between each element 12, cutting work after solidifying the mold member 16 becomes unnecessary.
第9図及び第10図は、本発明に係る他の実施
例で、上記実施例の平板電極13,14に、個々
の電極板となる複数個の半導体素子12のマウン
ト部と、これらのマウント部間を接続する連結部
とで構成したフレーム体が用いられ、夫々半導体
素子12のマウント后の状態が示されている。即
ち、第9図に示すフレーム体22は、隣接するマ
ウント部23間を連結片24で複数個縦横に連結
したものであり、又第10図に示すフレーム体2
5は、一枚の巾広の電極板26をプレス打込み又
は切削加工で縦横の溝27を形成して複数個のマ
ウント部28を構成したもので、これらのフレー
ム体22及び25は、マウント部23及び28が
多数板状に連結されており、取扱いが容易とな
り、自動化に適する利点がある。これらのフレー
ム体22,25を用いたものも、同数に個々の電
極板となるマウント部23及び28の背面側が図
示しないが一対の基台18,21でカバーされ、
基台18,21間にモールド部材16が充填され
る。そして固化後、切断分離され、夫々第11図
及び第12図に示すダブルヒートシンク構造のダ
イオード29,30が得られる。これらのダイオ
ード29,30は、平板電極のマウント部23,
28の外端面がモールド部材16から露出するば
かりでなく、側面の連結片24や溝26の切断面
31が露出した構造が得られ、この露出した切断
面31をプリント基板等の取付けに利用すること
が出来便利である。 9 and 10 show another embodiment of the present invention, in which the flat electrodes 13 and 14 of the above embodiment are provided with mounting portions for a plurality of semiconductor elements 12 serving as individual electrode plates, and mounting portions for these mounts. A frame body is used, which is made up of connecting parts that connect the parts, and the state after the semiconductor element 12 is mounted is shown in each frame body. That is, the frame body 22 shown in FIG. 9 has a plurality of adjacent mount parts 23 connected vertically and horizontally by connecting pieces 24, and the frame body 22 shown in FIG.
5, a plurality of mount parts 28 are constructed by forming vertical and horizontal grooves 27 in one wide electrode plate 26 by pressing or cutting. A large number of 23 and 28 are connected in a plate shape, which has the advantage of being easy to handle and suitable for automation. In the case where these frame bodies 22 and 25 are used, the back side of the same number of mount parts 23 and 28, which serve as individual electrode plates, is covered by a pair of bases 18 and 21 (not shown).
A mold member 16 is filled between the bases 18 and 21. After solidification, they are cut and separated to obtain diodes 29 and 30 having a double heat sink structure as shown in FIGS. 11 and 12, respectively. These diodes 29 and 30 are connected to the mounting portion 23 of the flat electrode,
A structure is obtained in which not only the outer end surface of 28 is exposed from the mold member 16, but also the connecting piece 24 on the side surface and the cut surface 31 of the groove 26 are exposed, and this exposed cut surface 31 is used for attaching a printed circuit board, etc. It is convenient to do this.
本発明は以上のように、ヒートシンクとなる一
対の平板状電極体間に半導体素子の両電極を固着
し、この半導体素子の固着されたマウント体複数
個をそれぞれの電極体を各マウント体のモールド
用保持具に密着固定して、電極体の端面をカバー
した後、両基台間にモールド部材を充填して半導
体素子と電極体を一体にモールドし、モールド部
材を固化した後カバーリングを除去して個々の半
導体装置を得るように構成したから、製造が容易
となり、しかもプリント基板への装着や、取扱い
の容易なチツプ構造のダブルヒートシンク形半導
体装置が提供出来る。 As described above, the present invention fixes both electrodes of a semiconductor element between a pair of flat electrode bodies serving as a heat sink, and attaches each electrode body to the mold of each mount body. After tightly fixing it to the holder and covering the end face of the electrode body, fill the space between the two bases with a molding member to mold the semiconductor element and the electrode body together, and remove the cover ring after solidifying the molding member. Since the semiconductor device is constructed so that individual semiconductor devices are obtained, it is possible to provide a double heat sink type semiconductor device having a chip structure that is easy to manufacture, easy to mount on a printed circuit board, and easy to handle.
第1図及び第2図は従来のダブルヒートシンク
形半導体装置の断面図、第3図は本発明に係るダ
ブルヒートシンク形半導体装置の断面図、第4図
乃至第7図は第3図の製造過程を示す部品断面
図、第8図は第3図の一実施態様を示す部品断面
図、第9図乃至第12図は本発明の他の実施例を
示す部品及び製品の斜視図である。
11,29,30……ダブルヒートシンク形半
導体装置、12……半導体素子、13,14,2
2,25……平板状電極体、13a,14a……
端面、16……モールド部材、17……マウント
体、18,21……保持具(基台)。
1 and 2 are cross-sectional views of a conventional double heat sink type semiconductor device, FIG. 3 is a cross-sectional view of a double heat sink type semiconductor device according to the present invention, and FIGS. 4 to 7 are manufacturing steps shown in FIG. 3. FIG. 8 is a cross-sectional view of parts showing one embodiment of FIG. 3, and FIGS. 9 to 12 are perspective views of parts and products showing other embodiments of the present invention. 11, 29, 30...Double heat sink type semiconductor device, 12...Semiconductor element, 13, 14, 2
2, 25... Flat electrode body, 13a, 14a...
End face, 16...mold member, 17... mount body, 18, 21... holder (base).
Claims (1)
複数個離間して前記一対の平板状電極体を保持具
に密着させ、前記保持具内の空隙内にモールド部
材を充填して前記半導体素子のモールド体を形成
し、前記保持具を前記一対の平板状電極体から除
去し、前記モールド体のモールド部材を前記半導
体素子間で切断分離することを特徴とするダブル
ヒートシンク形半導体装置の製造方法。1. Separate a plurality of semiconductor elements clamped by a pair of flat electrode bodies, bring the pair of flat electrode bodies into close contact with a holder, and fill the void in the holder with a molding member to remove the semiconductor elements. A method for manufacturing a double heat sink type semiconductor device, comprising forming a mold body, removing the holder from the pair of flat electrode bodies, and cutting and separating the mold members of the mold body between the semiconductor elements. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56134566A JPS5834951A (en) | 1981-08-26 | 1981-08-26 | Manufacture of double heat sink type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56134566A JPS5834951A (en) | 1981-08-26 | 1981-08-26 | Manufacture of double heat sink type semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5834951A JPS5834951A (en) | 1983-03-01 |
| JPS6234153B2 true JPS6234153B2 (en) | 1987-07-24 |
Family
ID=15131327
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56134566A Granted JPS5834951A (en) | 1981-08-26 | 1981-08-26 | Manufacture of double heat sink type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5834951A (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1047087B1 (en) * | 1994-06-10 | 2005-11-23 | Avx Corporation | Method of manufacturing solid state capacitors |
| EP2234154B1 (en) * | 2000-04-19 | 2016-03-30 | Denso Corporation | Coolant cooled type semiconductor device |
| JP4479121B2 (en) | 2001-04-25 | 2010-06-09 | 株式会社デンソー | Manufacturing method of semiconductor device |
| JP5141076B2 (en) | 2006-06-05 | 2013-02-13 | 株式会社デンソー | Semiconductor device |
| ITMI20112300A1 (en) | 2011-12-19 | 2013-06-20 | St Microelectronics Srl | CONSTRUCTION OF DSC-TYPE ELECTRONIC DEVICES VIA SPACER INSERT |
-
1981
- 1981-08-26 JP JP56134566A patent/JPS5834951A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5834951A (en) | 1983-03-01 |
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