JPS6234285B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transistor circuit, and more particularly to a transistor circuit suitable for an automatic gain control circuit used in a circuit that handles pulse signals such as a pulse noise removal circuit.

Automotive radio receivers and the like require a circuit for removing pulse noise contained in received signals, and an automatic gain control circuit is used for this pulse noise removal circuit.

That is, FIG. 1 is a block diagram of a pulse noise removing circuit in which the circuit of the present invention is used.
An audio signal at an input terminal 1 is guided to an output terminal 3 via a gate circuit 2. A part of the input signal is branched and amplified by an amplifier 4, and its output is given to a trigger pulse generator 6 via a wave generator 5. This wave generator 5 is for separating high frequency signals included in pulse noise.
Its passband is set at a frequency higher than the normal audio frequency appearing at terminal 1. This wave device 5
A part of the output of is applied to the input of an automatic gain control circuit 7, which circuit 7 is configured to control the amplification gain of the amplifier 4.

In such a pulse noise removal circuit, when pulse noise arrives at the signal at the input terminal 1, a signal appears at the output of the wave generator 5, and the trigger pulse generator 6
A pulse is sent from , which opens the gate circuit 2 for the duration of this pulse and interrupts the path of the signal at the input terminal 1 to the output terminal 3 . However, if the pulse noise continues for a long time, the output terminal 3
No output signal appears at all. In order to eliminate this inconvenience, when a signal appears continuously at the output of the wave generator 5, the automatic gain control circuit 7 operates to lower the amplification gain of the amplifier 4 or attenuate the input voltage of the amplifier 4. The trigger pulse generator 6 is controlled so that no pulse is generated.

FIG. 2 shows a conventional example of an automatic gain control circuit 7 for this purpose. That is, when a signal appears at the output of the wave generator 5 described above, the divided voltage of the resistors R ₆ and R ₇ causes the transistors Q ₄ , Q ₃ and Q ₂ to conduct, and charging of the capacitor C ₁ begins. This charging rate depends on the capacitance of capacitor C ₁ and resistors R ₂ and R ₃
The equivalent resistance value between the collector and emitter of the transistor Q ₁ decreases according to the voltage across the capacitor C ₁ , which lowers the input voltage of the amplifier 4.

Such conventional circuits have the following drawbacks.

(1) The control level of automatic gain control is
Since it is determined by the base-emitter voltage _VBE of _Q4 , it is temperature dependent.

(2) Since transistors Q ₄ , Q ₃ , and Q ₂ perform saturation switching operations, the DC current in the circuit changes rapidly, causing click noise interference to other analog signal circuits.

(3) The charging time constant (T ₁ ) of capacitor C ₁ is approximately R ₂ ,
Since C ₁ and the discharge time constant (T ₂ ) are approximately determined by R ₃ and C ₁ , the voltage across capacitor C ₁ is
If an attempt is made to raise the voltage between the base and emitter of Q ₁ (V′ _BE ), it becomes difficult to create the condition that T ₁ > T ₂ , and the recovery operation of the automatic gain control circuit is delayed.

In this way, when this circuit is constructed from a semiconductor integrated circuit, it becomes more susceptible to the effects of temperature, more susceptible to inductive interference from closely spaced circuits, and furthermore, the capacitance of capacitor C ₁ is limited, so the above drawbacks are overcome. It becomes even more noticeable.

SUMMARY OF THE INVENTION An object of the present invention is to provide a transistor circuit suitable for a gain control circuit that is not easily affected by temperature, prevents noise generation due to changes in circuit current, and facilitates setting of circuit constants.

According to the present invention, a differential transistor pair circuit preferably has its emitters connected in common, is connected to a constant current source, and has an input guided to the base of one transistor, and an operational output of the differential transistor pair circuit. There is obtained a transistor circuit characterized in that it includes a controlled current source circuit, a time constant circuit controlled by the current source circuit, and a variable impedance element controlled by the voltage of the time constant circuit.

Examples will be described below with reference to the drawings.

FIG. 3 is a circuit diagram showing one embodiment of the present invention. This figure shows in particular detail the automatic gain control circuit 7 of the pulse noise removal circuit shown in FIG. 1, and the gate circuit 2 or trigger pulse generator 6 is omitted from the figure.

In FIG. 3, the DC power supply _Vcc supplied to the automatic gain control circuit 7 is stabilized by a series pair circuit of a diode _D2 and a Tuner diode _D3 . This stabilizing potential is designated as V _p . Transistors Q ₆ and Q ₇
The emitters are commonly connected to each other, and a constant current circuit 11 is connected between the emitters and ground. The collector of the transistor _Q7 is connected to the potential point _Vp , and the collector of the transistor _Q6 is connected to the potential point _Vp via the diode _D1 . The bases of these transistors Q ₆ and Q ₇ are connected to dividing points of dividing resistors R ₁₁ , R ₁₂ and R ₉ , R ₁₀ inserted between potential point V _p and ground, respectively. Also, transistor _Q6
The output of the wave generator 5 is guided to the base of the wave generator 5, which serves as an input point of the automatic control circuit 7.

The collector of transistor Q ₆ is at the potential point V _p
It is further connected to the base of a transistor Q ₅ whose emitter is connected to, and the collector of which transistor Q ₅ is connected to a time constant circuit consisting of a parallel circuit of a capacitor C ₂ and a resistor R ₈ . The voltage across this capacitor _C2 is supplied between the base and emitter of transistor _Q1 , and this transistor
Q ₁ is configured to operate as a resistance circuit for changing the input level of the amplifier 4 together with the input resistor R ₁ .

In a circuit configured like this, the transistor
Q ₆ and Q ₇ operate as a differential switching circuit, and the constant current I ₀ flowing through the constant current circuit 11 flows concentratedly in either transistor Q ₆ or Q ₇ . That is, when the output voltage of wave generator 5 is low, transistor Q ₇ conducts, the output voltage of wave generator 5 exceeds a certain value (V _AGC ), transistor Q ₆ conducts, and current I ₀ flows into transistor Q ₆ . The current flows concentratedly, and the collector current of transistor _Q7 disappears. This constant value (V _AGC ) is the control level of this automatic gain control circuit 7, and V _AGC = V _p (R ₁₀ /R ₉ +R ₁₀ −R ₁₂ /R ₁₁ +
_R12 )......(1).

Here, _the potential V _p in equation (1) is a stabilized voltage due to the series circuit of diode D ₂ and Zener diode D ₃ , and
Since the temperature characteristics of D ₃ are just the opposite sign,
They cancel each other out and are hardly affected by temperature changes. Furthermore, since the resistances R ₉ to _{R 12} are of the same type and exist as linear expressions in the denominator and numerator, respectively, as shown in equation (1), the influence of temperature is canceled out. In this way, the control leveler V _AGC
is a value that is almost unaffected by temperature.

Furthermore, as mentioned in the above explanation, transistors Q ₆ and Q ₇ operate differentially depending on the input voltage of the automatic control circuit 6, so that the sum of the collector currents of transistors Q ₆ and Q ₇ is always Since it is a constant value I ₀ , the current flowing through terminal V _cc does not change due to the operation of this circuit. Therefore, the opening and closing operations of the automatic control circuit do not cause click noise interference to other circuits.

Next, when a constant current I ₀ flows through the transistor Q ₆ ,
_The voltage drop of diode _D1 is added between the base and emitter of transistor _Q5 ,
A collector current _I1 of is generated. Since the current flowing through _the diode _D1 has a constant value _I0 , this current I1 remains approximately constant even if the collector potential of the transistor _Q5 changes.

The current I ₁ flowing through the transistor Q ₅ is the capacitor
Charge _C2 . As the voltage across the capacitor _C2 changes, the equivalent resistance value between the collector and emitter of the transistor _Q1 changes, and the input level of the amplifier 4 changes due to interaction with the resistor _R1 .

When the input voltage of the automatic gain control circuit 7 falls below V _AGC , the current I ₁ flowing through the transistor Q ₅ becomes zero. At this time, the charge stored in the capacitor _C2 is discharged through the resistor _R8 . Therefore, in this circuit, the discharging time constant T ₂ of the time constant circuit is determined by the product of the capacitor C ₂ and the resistor R ₈ , and the charging time constant T ₁
can be determined independently of the discharge time constant T ₂ by appropriately setting the constant current I ₁ . That is, even when the voltage V _C across the capacitor C ₂ rises to exceed the conduction voltage V _BE between the base and emitter of the transistor Q ₁ , the condition T ₁ >T ₂ can be easily created.

This can be explained graphically as shown in Figure 4. Figure 4 shows the duration of the current _I1 on the horizontal axis and the voltage _Vc across the capacitor on the vertical axis.
In the conventional example shown in the figure, (b) shows an implementation circuit of the present invention shown in FIG. That is, in conventional circuit A, when the voltage V _C exceeds V' _BE , the rise in V _C suddenly slows down, and this does not change even if the resistance R ₂ is made small. On the other hand, in circuit B according to the embodiment of the present invention, the rise in V _C is constant regardless of the passage of time, and is not affected by the value of current I ₁ or resistor R ₈ .

FIG. 5 shows an automatic gain control circuit constructed from a semiconductor integrated circuit as a second embodiment of the present invention. This circuit consists of two voltage detection circuits 21 and 22 and one DC voltage generation circuit 23. N _IN V′ _IN are inputs of different systems,
V _OUT is the output of the automatic gain control voltage. A stabilizing voltage is applied to V _p . E is a ground terminal.
Each of the voltage detection circuits 21 and 22 includes a transistor pair circuit that operates differentially,
This operating output is available in transistor _Q11 or _Q12 . The operating outputs are combined in the base circuit of transistor _Q13 , which is configured to control transistor _Q14 , _which corresponds to transistor _Q5 in the embodiment shown in FIG.

As explained above, according to the present invention, (1) the control level of automatic gain control is not affected by temperature, (2) it does not cause click noise interference to other analog circuits, and (3) it can be controlled arbitrarily. An automatic gain control circuit that can set the charging and discharging time constants is obtained. Since the circuit of the present invention can be configured by a directly connected circuit of each transistor,
It is suitable as a semiconductor integrated circuit, and a pulse noise removal circuit using this can be obtained at low cost and with high performance. The present invention can also be applied to prescalers, phase locked circuits, and the like.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a pulse noise removal circuit using the automatic gain control circuit according to the present invention, FIG. 2 is a block diagram of a conventional circuit used for the automatic gain control of FIG. 1, and FIG. FIG. 4 is a block diagram of a circuit showing an embodiment of the present invention. FIG. 4 is a diagram showing the time course of the voltage V _C across a capacitor, in which A shows a conventional circuit and B shows a circuit according to an embodiment of the present invention. FIG. 5 is a circuit diagram showing a second embodiment of the present invention. 1...Input, 2...Gate circuit, 3...Output,
4...Amplifier, 5... Wave generator, 6... Trigger pulse generator, 7... Automatic gain control circuit, 11... Constant current circuit, 21, 22... Voltage detection circuit, 23...
...Control voltage generation circuit.

Claims (1)

[Claims] 1. A variable gain amplifier that includes a variable impedance element and whose gain is controlled to amplify an input signal depending on the impedance of the variable impedance element, a high frequency generator that receives the output of the variable gain amplifier, and an emitter that has a constant current in common. a differential switching circuit consisting of a pair of transistors connected to a power supply, the output of the high frequency generator being applied to the base of one of the transistors; a second resistive voltage divider that divides the power supply voltage to provide a reference voltage to the base of the other transistor of the transistor pair; and a current inflow end is connected to the collector of the one transistor. a current mirror circuit; a time constant circuit for charging and discharging the output current of the current mirror circuit; and a voltage obtained in the time constant circuit to adjust the impedance of the variable impedance element, thereby controlling the gain of the variable gain amplifier. an automatic gain control comprising: a pulse generator that generates pulses in response to the output of the high frequency generator; and means for preventing the input signal from appearing at the output terminal during the period of the pulse. Noise removal circuit with circuit.