JPS623473B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state scanning device for reading information such as a specific figure written on a moving document, such as a postal code written on a postal letter.

Conventionally, scanners, especially solid-state scanners, that read information such as postal codes written on postal letters,
Photodiodes, CCDs, etc. are used. In the case of this type of solid-state scanner, once it is incorporated into the device and fixed, the geometrical relative positional relationship such as the distance between the letter and the solid-state scanner, the focal point distance of the condensing lens, etc. Once determined, the scanning area on the letter will be uniquely determined. Therefore, when reading a postal code using the scanner mentioned above, it is an absolute requirement that only the desired postal code be written in a predetermined narrow area, and letters that meet this condition are extremely effective. It was a scanner.

However, if the postal code is allowed to be written over a certain wide range on a postal letter, it is necessary to scan the allowed wide range, and moreover, within that scanning area, Since information other than the postal code, such as the recipient's name and sender's address, is usually included, it is necessary to extract it before recognizing the postal code.

Traditionally, methods for extracting postal codes include temporarily storing all of the wide scanning signals in a storage element;
A method of extracting information on a target postal code based on pre-arranged relative positional conditions of the postal code, such as that the address must be written in the top row and at the left end, or a patent application for the specification of a prior application. 1971-
As described in No. 125654, there is a method of using a scanning device equipped with a position specifying circuit for extracting the position of a postal code written on a postal letter.

In the former case, information that does not need to be recognized must be stored, so the storage capacity becomes enormous.Moreover, it causes time loss as it scans areas other than the target postal code, and the entire wide scanning area is scanned. Since it is necessary to extract a scanning signal that is faithful to the character pattern on the letter during this period, scanning becomes extremely inefficient. On the other hand, when using the latter, even if the position of the postal code is designated by the position designation circuit, when using a solid-state scanner, unlike a flying spot scanner, the nature of the solid-state scanner means that it cannot self-scan. Due to the nature of scanning using a shift register, it is impossible to limit scanning to a narrow area within a wide scanning range. The information on the target postal code must be extracted and recognized by applying a gate to the narrow area containing the postal code specified by the position designation circuit in the signal. Therefore, in this method, as with the former, it is necessary to extract the scanning signal of the part deleted by the gate signal as an accurate pattern, and since the part to be deleted is also scanned, time is lost, resulting in inefficient scanning. It had the disadvantage of becoming boring.

In reality, when the size of the letters in a postal code is 2 to 3 mm, a resolution of about 0.1 mm is required, and a wide area of 51.2 mm in length in the vertical direction is scanned using a 512-bit solid-state scanner. In this case, the required scanning speed is 15.5MHz. However, the currently available scanning speed is about 10 MHz, and when the scanning speed is increased to 10 MHz or higher, it becomes difficult to distinguish characters, etc. from the scanned output.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide an efficient solid state scanning device that eliminates the drawbacks of the prior art.

According to the present invention, the speed of the letter, the resolution on the letter,
While the number of photoelectric conversion elements in the solid-state scanner and the scanning area on the letter are held constant, the part of the postal code that is the target of character reading for the array of photoelectric conversion elements is Scanning is performed using pulses of 10 MHz or less (low-speed shift pulses) to obtain target signals (hereinafter referred to as actual scanning), while other areas that are not directly related to character reading are simply used to save time. Therefore, a solid-state scanning device that performs scanning with a pulse (high-speed shift pulse) of 10 MHz or more (hereinafter referred to as blank scanning) can be obtained.

Next, the present invention will be explained in detail with reference to the drawings.

Figure 1 shows an example of the arrangement of solid-state scanners for postal letters.
1 shows an addressee 12 and a solid-state scanner 32 such as a photodiode array.

The letter 10 is conveyed at a speed of 3 m/s in the direction of the arrow v in the figure, and an example of the letters written on the letter 10 is transferred to a 512-bit scanning element that is a part of the solid-state scanner 32 on the lens 13.
The light is focused by Also, ABCD in the diagram is postal code 1
The solid-state scanner 32 shows a wide scanning area (vertical length: 51.2 mm) that allows the description of 1.
As the letter 10 is conveyed, it is relatively scanned.

On the other hand, EFGH indicates a narrow scanning area that includes the postal code 11 detected by the preprocessing of the main scan, and this scanning area EFGH changes arbitrarily depending on the position where the postal code 11 is written. Hereinafter, EFGH will be referred to as scanning area 1.

Note that the method of detecting the postal code 11 from within the wide scanning area ABCD and specifying the scanning area 1 as a preprocessing process is described in the specification of the prior application, and will therefore be omitted here.

FIG. 2A is an enlarged view of the vicinity of the postal code 11 in FIG. 1 in order to explain scanning by the solid-state scanner according to the present invention. In this figure, a ₁ , a _o , d _o , d ₁ including the scanning area 1 are the solid-state scanner 32
The area actually scanned by
With a ₁ as the scanning starting point, scan areas a ₁ , a _o , F,
E, H, G, d _o , d ₁ (hereinafter referred to as scanning area 2)
Scanning lines a _i , e _i , h _i , d _i (i=1, 2...n)
Then, just to save time, a high-speed shift pulse is used for empty scanning.

On the other hand, scanning lines e _i , h _i (i=1,
2, .

FIG. 2b is a further enlarged view of FIG. 2A. In this figure, for example, if the traveling speed of the letter 10 is
The scanning area of the 3m/S, 512-bit solid-state scanner 32 is 51.2mm. Then, the narrow scanning area 1 including the postal code is 6.4 mm, and the letter 10 is moved while the horizontal resolution on the letter 10 is being scanned once, i.e., a _i-1 - ₁ , d _i-1 - ₁ . distance, that is, a _i-1 −
₁ , a _i is 0.1 mm, the number of elements of the solid-state scanner 32 that scans the scanning area 1 is 64 bits, and a _i-1
The time required for one scan from ₋₁ to d _{i-1 −1} is calculated to be approximately 33 μS.

Regarding scanning in the vertical direction, switching between actual scanning (scanning using low-speed pulses) and idle scanning (scanning using high-speed shift pulses) is performed by counting the number of scanning pulses that scan the 512 bits of the photoelectric conversion element. That is, since the scanning width of 51.2 mm of the letter 10 corresponds to 51.2 bits of the photoelectric conversion element, if the bits to be actually scanned are designated, the switching operation can be performed by counting the scanning pulses.

Note that when the frequencies of the low-speed shift pulse and the high-speed shift pulse are kept at fixed values, the size of the scanning area 1 changes depending on the size of the postal code written on the letter 10, so the time required for one vertical scan will be slightly longer. As a result, the resolution of the letter 10 in the transport direction also changes. However, the resolution decreases when the scanning area 1 is large, and this corresponds to the case where the marking characters of the postal code are large, so there is no effect on the subsequent identification operation.

Furthermore, if the frequency of at least one of the high-speed shift pulse and the low-speed shift pulse is automatically changed according to the ratio of scanning areas 1 and 2, one scan time in the vertical direction can be kept constant, and the resolution in the horizontal direction can be kept constant. Can be kept at

Now, the frequency of the high-speed shift pulse that scans scan area 2 is set to twice the frequency of the low-speed shift pulse that scans scan area 1, and the number of bits of the photoelectric conversion element is
512, the width of scanning area 1 is within the vertical scanning width of 51.2mm
If it is 6.4 mm, the number of high-speed shift pulses in one vertical direction is 576 {(512-64)+64×2=576}. Considering the vertical scanning time of 33 μS obtained earlier, the frequency of the high-speed shift pulse is
17.45MHz, low speed shift pulse frequency is 8.73MHz
becomes.

FIG. 3 is a block diagram of a solid-state scanning device according to the present invention, and the device is roughly composed of a scanning control section 20, a solid-state scanning section 30, and an identification section 40. It is assumed that the letter 10 is illuminated by the light source 33 on the side where the addressee is written at a detection point P set in front of the solid-state scanner 32. The scan control unit 20 includes a position designation circuit 21, a control circuit 22, a high-speed shift pulse generation circuit 23, and an irregular shift pulse generation circuit 24.
In FIG. A, the EFGH position signal is transferred to the control circuit 22 through l1. The technology of the position specifying circuit 21 is described in the specification of the prior application mentioned above, so a detailed explanation will be omitted.

Based on the EFGH position signal sent through l1, the control circuit 22 sends a scan start pulse through l2 to solid-state scanning in order to start scanning when the scan start point _a1 on the letter 10 reaches the detection point P. Similarly, when the scan end point _do reaches the detection point P, a scan end pulse is sent through l2 to end the scan. Further, gate pulses corresponding to e _i and h _i in the scanning area 1 of FIG. 2A are generated and transferred to the irregular shift pulse generation circuit 24 through l3. Note that the gate pulse is, for example, a pulse that is "1" in the section of the scanning area 1 and "0" in the section of the scanning area 2. The high-speed shift pulse generation circuit 23 generates a high-speed shift pulse (hereinafter referred to as CLK ₁ ) with a constant period, and CLK ₁ is transferred to the irregular shift pulse generation circuit through l4.

The irregular shift pulse generation circuit 24 generates a gate pulse "1" based on the gate pulse sent through l3 and CLK ₁ sent through l4.
The part corresponding to is the low-speed shift pulse (CLK ₂ below)
), while the part corresponding to “0” is CLK ₁
Generate the same irregular shift pulse. this
The irregular shift pulse consisting of CLK ₁ and CLK ₂ is l5
is transferred to the solid-state scanner 32 through. The details of the irregular shift pulse generation circuit 24 will be described later. The solid-state scanning unit 30 includes a solid-state scanner 32 such as a photodiode array scanner, an analog-to-digital (A/D) converter 31, and a light source 3 that is an optical system.
3. Consists of a condensing lens 34. The letter 10 is irradiated with irradiation light 35 from a light source 33 at a point P, and the scattered light 36 is focused onto the solid-state scanner 32 by a lens 34. The solid-state scanner 32 starts scanning with a start pulse sent through l2, and at the same time scans with an irregular shift pulse sent through l5. Then, the scanning ends with the end pulse sent through l2. The scanning output signal (analog amount) during this period is sent to the A/D converter 31 through l6. A/D converter 31
Then, the electrical scanning signal is converted into a binary signal according to the pattern on the letter, and the electrical scanning signal is sent to the identification section 40 consisting of a processor through l7.
identify. FIG. 4 is a configuration diagram of the irregular shift pulse generation circuit 24. The CLK ₁ and gate pulse sent through l4 and l3 pass through the AND circuit 241, and only the gate pulse "1" portion is output as CLK ₁ . This CLK ₁ is l11
to the J/K flip-prop 242, where the period of CLK ₁ is lengthened, i.e., CLK ₂
is generated and sent to the OR circuit 245 through l12.

On the other hand, the gate pulse sent through l3 is inverted by the inverting circuit 243, and this inverted gate pulse is applied to CLK ₁ sent through l4.
It is also sent to the AND circuit 244, which outputs only CLK ₁ , which is only the "0" portion of the gate pulse before being inverted, and this CLK ₁ is sent to the aforementioned OR circuit 245 through l14.

In the OR circuit 245, CLK ₂ sent through l12 and CLK ₁ sent through l14.
The output signal is sent to a single shot multivibrator circuit (S.
S) 246. Here, CLK ₁ and
Keep the pulse width of CLK ₂ constant and output an irregular shift pulse to l5.

FIG. 5 shows waveforms on the signal lines in FIG. 4. Waveform S ₁ is the l4 signal and represents the high speed shift pulse CLK ₁ . Waveform S ₂ is a signal of l3 and shows a gate pulse corresponding to a narrow area including the postal code. Waveform _S3 is the signal of l11 and the gate pulse is “1”
Only part of the fast shift pulse CLK ₁ is shown. Waveform
_S4 is a signal of l12 and indicates a low speed shift pulse _CLK2 . Note that the cycle of CLK ₂ at this time is twice the cycle of CLK ₁ , but this can be changed as necessary. Furthermore, the waveform _S5 is a signal of l13, which is the negation of the waveform _S2 , that is, a gate pulse in which the portion corresponding to the narrow region including the postal code is "0" and the rest is "1". Waveform _S6 is the signal of l14, and only the gate pulse “1” of waveform _S5 is a high-speed shift pulse.
Indicates CLK ₁ . Waveform _S7 is a signal of l5 and shows irregular shift pulses including low speed shift pulse _CLK2 .

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the arrangement of solid-state scanners for a letter, FIGS. 2A and B are diagrams showing scanning by the solid-state scanner according to the present invention, and FIG. 3 is a diagram showing the configuration of an embodiment of the present invention. 4 is a diagram showing the configuration of an irregular shift pulse generation circuit among the components shown in FIG. 3,
FIG. 5 is a diagram showing waveforms of various parts of the irregular shift pulse generation circuit shown in FIG. ...Position designation circuit, 22...Control circuit, 23...High-speed shift pulse generation circuit, 24...Irregular shift pulse generation circuit, 30...Solid state scanning section, 31...A/D converter, 32...Solid state scanning Vessel, 33...Light source, 34...
...Lens, 40...Identification section.

Claims (1)

[Claims] 1. In a fixed scanning device that reads address information written on a letter being conveyed, a solid-state scanner in which a plurality of photoelectric conversion elements are arranged so as to read the letter, and a signal indicating the position of the address information. Shifting the frequency of the shift pulse received and supplied to the solid-state scanner to be lower in a portion corresponding to the position of the address information in the letter than in other portions with respect to the array of the plurality of photoelectric conversion elements of the solid-state scanner. A solid-state scanning device comprising pulse control means.