JPS6236556B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to an electronic watch with a game having a liquid crystal display device. The present invention particularly relates to an electronic timepiece with an added game in which players compete for points based on the agility of switch operations. Traditionally, there is a game called ``whack-a-mole'', which is an electronic game where players compete for points based on their agility.
Adding such a game to an electronic watch is
Due to the limited number of display pixels of electronic watch display devices, this has been almost impossible or limited to extremely simple games. The object of the present invention is to double as a display device for an electronic watch,
The object of the present invention is to realize an electronic clock that enables a game in which the quickness of switch operation is competed by adding a simple circuit. The present invention provides an electronic watch having a liquid crystal display device including 7-segment number display digits, in which the upper half or lower half of one of the 7-segment number display digits is Selectively display all remaining segments (hereinafter referred to as M display), select and display one segment of each digit corresponding to the remaining segment by operating a switch (hereinafter tentatively referred to as H display), and display the corresponding digit in the M display above and below. This is an electronic watch with a game that has a game logic circuit that gives points by matching the positions of the digits and completely displaying the upper half or lower half of the corresponding digit. In addition, in order to increase the interest of the game, a plurality of reference signals obtained by dividing the reference frequency signal that defines the switch pulse signal when operating the switch for selecting the H display are latched in the pulse state of the switch pulse signal, and the data is It has a circuit that obtains a signal and determines the selection of M display. FIG. 1 shows an overview of an electronic timepiece with a game according to the present invention. In the figure, the game is being executed, and a "U"-shaped M display 13 and a bar-shaped H display 14 are displayed on the liquid crystal display. If you move the H display using the switch and match it with the M display to create a square-shaped display, you will score points. Of course, the M display does not wait for the H display to approach, but automatically moves to another location after an appropriate time (0.5 seconds in the example). When switch A11 is pressed, the H display moves one digit to the left, and when switch B12 is pressed, the H display moves one digit to the right.
Move the digits, press both at the same time to move up or down. The switch C10 is for switching between a time display state and a game display state. FIG. 2 shows display pixels of the liquid crystal display device of the present invention. Six digits are arranged to enable display of hours, minutes, and seconds. P0, P1,..., P
10 and P11 are identification numbers of the moving locations of the H display and M display. M display is 7 segment type a, b,
Using 3 segments of g or c, d, g, H
The display uses one segment of e or f. However, other choices are also possible. FIG. 3 shows only the display section in three states, a, b, and c, as the game progresses. A is a diagram in which the H display 31 is located to the right of the M display 32. By pressing switch A immediately, b
is displayed, the selection locations of the M display 34 and the H display 33 match, a "square" shape is displayed, and the points are added. c is a diagram in which the M display 36 automatically changes its selection location immediately after that, while the H display 35 remains as it was before. After this, if you follow the M display again and match it, you will get more points. FIG. 4 is a circuit diagram for executing game logic related to the basic content of the present invention. FIG. 5 is a timing chart of important signals. In addition, the oscillation and
Circuit configurations such as frequency division, time measurement, drive, etc. are well-known technical contents, and their explanation will be omitted. A description will be given below of the case where the game display state is entered by pressing the switch C10. At this time, the signal GON is at a high potential (VDD), that is, 1, and in the normal time display state, the signal GON is at a low potential (earth), that is, 0. Immediately after entering the game state, both the M display and the H display are at the last position of the previous game state. The data that determines the position of the M display are signals Mα, Mβ, Mγ,
Mδ and is the output of latch 49. The data that determines the position of H display are signals Hα, Hβ, Hγ, H
δ, and the signal Hα is the toggle flip-flop 4.
5, and the other signals are the outputs of the hexadecimal up-down counter 46. The table shows the relationship between data signals and display selection positions. Since the M display and the H display are the same code, α, β, γ, and δ represent the data of both.

[Table] When switch A11 is pressed, the switch terminal 41 becomes 1, and when switch B12 is pressed, the switch terminal 42 becomes 1. Each is input to a D flip-flop, and the timing is defined by a reference frequency signal of 64 Hz. D flip-flop 4 for switch B
The output signal UDS of No. 3 becomes an up-down signal of the counter 46. In the example, when switches A and B are pressed at the same time, the H display moves up and down, so the D flip-flops 44 and 43 output
A signal obtained by ANDing SWA and SWB is made into a pulse to obtain a clock signal CK1 for vertical movement. Similarly, the signal obtained by ORing both outputs is made into a pulse, and in the case of vertical movement, it is prohibited.
The clock signal CK2 of the counter 46 is obtained. As mentioned above, the toggle flip-flop 45 obtains the output signal H.alpha. by the clock signal CK1. The counter 46 operates according to the clock signal CK2 and the up-down signal UDS, and outputs Hβ, Hγ, Hδ.
get. The hexadecimal counter 47 consists of three flip-flops and one NOR gate, and has a reference frequency of 64Hz.
Performs hexadecimal up counting operation. The first stage provides 32Hz, the second stage provides P10, and the third stage provides Q10. These signals are latched by a clock latch 48. The latch clock signals are CK1 and CK
This is the OR of 2. Furthermore, latch 48
The output of Mα,
Obtain Mβ, Mγ, and Mδ. The clock signal of this latch is the carryout signal CYO of timer 50.
It is. As a result, the position of the M display is determined by the switch timing immediately before the M display changes. Coincidence between the positions of the H display and the M display is detected by a coincidence circuit 51, and a signal MHI is obtained. This is pulsed and used as a signal POC, which is used as a reset signal for the timer counter 50 and a set signal for the reset latch 52. The signal GON is inputted to the clock enable of the timer counter 50, and it always counts in the game state. Input the reference frequency signal 16Hz to the clock terminal and measure 0.5 seconds. That is, when the Q3 output of the final stage becomes 1, the reset latch 53 is set, the carry out signal CYO becomes 1, and the counter 50 is reset. The latch 52 is also reset, and the stop signal IDM in the M state is changed from 1 to 0. The timer counter 50 is reset in 0.5 seconds whether or not they match, and if they match, it starts counting again for 0.5 seconds from that point. When there is a match, the signal IDM becomes 1 for 0.5 seconds and is supplied to the match display drive circuit 56. Also, since the signal POC becomes pulse-like every time there is a match, this can be used to count up the game score. A desired display can be obtained by inputting the data signals obtained in this manner to the liquid crystal display device 57 via a display decoder and display drive circuits 54 and 55. As described above, the present invention can display a figure by simply adding a simple circuit, which also serves as a display element for an electronic watch, and by combining a part of a moving unfinished figure without adding a new display element. An interesting game to complete can be added to the electronic watch.

[Brief explanation of the drawing]

FIG. 1 is an overview diagram of the present invention. FIG. 2 shows display pixels of the liquid crystal display device of the present invention. FIG. 3 is an example of a game state according to the present invention. FIG. 4 is a circuit diagram of the game logic of the present invention. Figure 5 is a timing chart of the important signals. 10, 11, 12...Switch, 13...M display,
14...H display, 41, 42...Switch terminal, 46
...Updown counter, 48, 49...Clock clutch, 47...Hex counter, 50...Timer counter, 52, 53...Set reset latch.

Claims (1)

[Claims] 1. In an electronic watch having a liquid crystal display device with date-shaped segments for time display, the operating switch 1
1, 12, an up-down counter 46 that counts the number of operation signals from the operation switch, and a drive signal that applies a drive signal to some display elements of the Japanese character segment of the liquid crystal display device corresponding to the count value from the up-down counter. A first display drive circuit 54 that supplies
a clock latch 49 that latches a plurality of clock signals and outputs a combination of the latched signals;
Receiving the signals from the clock clutch, driving the remaining display elements, including the display element displayed by the first drive circuit, at the display device position corresponding to the combination of the signals to form a specific figure. a second display drive circuit 55 for supplying a signal; a coincidence circuit 51 for comparing the output from the up-down counter with the output from the clock latch and outputting a coincidence signal; An electronic timepiece with a game, comprising a match display drive circuit 56 that supplies a drive signal in a display state representing a match to the display device.