JPS6236558B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic watch with a melody function that plays a melody.

In recent years, digital electronic watches have become more multi-functional, and in addition to the usual time and day of the week functions, models that have functions such as a chronograph (stopwatch), an alarm, and a dual time are now on the market. In such electronic clocks, an electronic sound using a frequency division stage signal has conventionally been used as the alarm sound, but recently, models that play a melody have also been considered.

As the frequency source for the melody in this electronic watch with a melody function, it is desirable to use a reference signal for a watch in order to reduce costs. However, in order to increase the precision and bandwidth of melody sounds, a high reference frequency is required, but the timekeeping reference signal source for watches is usually 32.768KHz due to constraints on current consumption and clock accuracy. It is used. For this reason, in the conventional system, the accuracy of the melody scale deteriorates and the band narrows.

The purpose of this invention was made in view of the above circumstances, and is to provide an electronic clock with a melody function that uses a timekeeping reference signal for the clock and can improve the precision of the melody scale and widen the band. It's about doing.

The present invention will be described below with reference to the drawings.

FIG. 1 shows the overall structure of an electronic timepiece with a melody function, which includes an oscillation circuit 11 for both melody and timekeeping. This oscillation circuit 11 generates a timekeeping reference signal with a frequency of 32.768 KHz, and the signal is transmitted to a timekeeping frequency dividing circuit 12 and a melody circuit 1 to be described later.
3. In the frequency dividing circuit 12, the time reference signal is frequency-divided and supplied to the time counter 14. This clock counter 14 includes a frequency dividing circuit 12
In response to the output, a normal clock measures seconds, minutes, hours, etc., and the measured data is supplied to the display control circuit 15. This display control circuit 15
is composed of a decoder, a driver, etc., and supplies clock data to a display (not shown) using a liquid crystal or the like in synchronization with the signal from the frequency dividing circuit 12 to display the normal time.

Further, the signal from the frequency dividing circuit 12 is sent to the melody circuit 13 and the switch input control circuit 16.
Also supplied. This switch input control circuit 16 corrects the contents of the clock counter 14, sets the time in the alarm memory 17 that stores the time at which the alarm sound is to be sounded, and controls the melody sound on/off control for the melody circuit 13 in accordance with the switch input. It is something to do. The time data stored in the alarm memory 17 is supplied to the display control circuit 15. By inputting a switch, the alarm time can be displayed on the display as appropriate.

Furthermore, the clock data from the clock counter 14 and the time data in the alarm memory 17 are also supplied to a comparator circuit 18 . This comparison circuit 18 detects a match between both data and supplies the detection signal to the melody circuit 13. and,
When the melody sound generation function is set to the ON state, the melody sound is generated from a sound generation mechanism (not shown), such as a speaker.

As shown in FIG. 2, this melody circuit 13 is equipped with a frequency multiplication/switching circuit 19, the details of which will be described later, but a reference signal for timekeeping (32.768 KHz) from the oscillation circuit 11 is supplied, and as will be described later. Switching input signal C from the melody memory 21
Under the control of , the signal is multiplied or directly supplied to the scale programmable frequency divider 20 .
This scale programmable frequency divider 20 is specified by an address counter 23 to a melody memory 21 composed of a ROM etc. that stores scale and note length data and switching input signals corresponding to octaves. The frequency is variably divided according to the stored contents of the address, and is supplied to the scale output control circuit 22 as a scale signal. This scale output control circuit 22 generates a control signal for the sound generation mechanism that generates melody sounds, and since the duty of the output of the scale programmable frequency divider 20 is as small as 1/the frequency division number, the duty is reduced to 1/2. do. Contains a binary counter.

Further, the note length data of the melody memory 21 is supplied to a note length programmable frequency divider 24.
The tone length programmable frequency divider 24 is supplied with the frequency division signal for time measurement from the frequency dividing circuit 12 as a reference clock signal for tone length, and divides the frequency at a frequency division ratio according to the tone length data to calculate the tone length. At the same time, the contents of the address counter 23 are incremented.

FIG. 3 shows an example of the frequency multiplication/switching circuit 19, in which the reference signal for timekeeping (32.768KHz) is
A is supplied to an inverter 25 and an exclusive OR circuit 26. The output signal B from the inverter 25 is supplied to an AND circuit 27 and is also connected to the IC supply power VDD via a capacitor 28. Further, the AND circuit 27 is supplied with a switching input signal C stored in the melody memory 21 and corresponding to the octave. and,
The output signal D from the AND circuit 27 is supplied to the exclusive OR circuit 26, which generates an output signal E.

FIG. 4 shows a timing chart of each of the above-mentioned signals A to E. A reference signal A of 32.768 KHz is supplied, and signal B is inverted after being delayed by the time constant via the inverter 27 and capacitor 28. is supplied to the AND circuit 27. When the switching input signal C is at the "0" level, the output signal D of the AND circuit 27 is at the "0" level, so the output signal E of the exclusive OR circuit 26 is the inverted state of the timekeeping reference signal A. There is no change in frequency. In addition, the switching input signal C
When the output signal D reaches the "1" level, the output signal D is ANDed with the signal B, and becomes an inverted version of the signal A with a delay corresponding to the delay of the signal B. The output signal E is then output as a signal with twice the frequency of the signal A, as shown in the figure.

For electronic watches equipped with such a melody function, the scale is set by dividing the reference frequency signal, but the 12-tone equal-tempered scale currently in general use has one octave, that is, a frequency ratio of 1. :
2 into 12 geometric series, and the frequency ratio per semitone is 2 ^1/12 (1.059463). Therefore, every semitone increase increases the frequency by 2 ^1/1
It will be fine if you do ² . FIG. 5 shows the frequency ratio of each note for two octaves according to the above principle when the C major key is set to "1".

FIG. 6 shows, as an example, the frequency division when the number of bits of the scale programmable frequency divider 20 is set to 5 when the timekeeping reference signal (32.768KHz) is not multiplied by the frequency multiplication/switching circuit 19. Since it is 5 bits, it can be divided up to 2 ⁵ =32, so the frequency ratio for the frequency division by 32 is shown. Here, the output frequency is obtained by further dividing the output of the programmable frequency divider 20 by two for duty control.

The musical scale is determined by the frequency ratio between notes, so
As a melody tone performance function as an additional function of the watch, a scale can be constructed by appropriately selecting a reference tone and matching the frequency ratio with the reference tone. Now, if we assume that the output frequency of 512Hz, which is divided by 32 in Figure 6, is the C note of C major, then the fifth
The scale can be constructed by selecting the output of the frequency division number with as little error as possible between the frequency ratio shown in the figure and the frequency ratio shown in FIG. Here, Figures 5 and 6
As is clear from a comparison of the figures, frequency accuracy is poor with about 5 bits, and it is impossible to construct a scale of about 2 octaves. however,
The equal-tempered scale itself uses approximate frequency division to simplify tuning, and the frequency accuracy and stability of actual musical instruments is about 10 ^-2 to 10 ^-3 , so a certain error is forgiven. In reality, if you optimize the frequency of the reference tone and select a location with little error, and then increase the number of bits by about 1 bit to halve the error, you can achieve a precision of about 1 octave that is acceptable for practical purposes. can get. If you try to widen the usable range by one octave, you can increase the number of bits of the scale programmable frequency divider 20 by one bit, but each additional bit lowers the reference tone and deviates from the band of the small speaker. The number of bits in the melody memory and programmable frequency divider increases, resulting in an increase in the number of elements.

Therefore, in the present invention, when generating a melody sound one octave higher, the switching input signal C output from the melody memory 21 and supplied to the frequency multiplication/switching circuit 19 is set to the "1" level, and the timekeeping reference signal (32.768 KHz) is multiplied to 65.536KHz. This signal is then supplied to the scale programmable frequency divider 20. At this time, each output frequency corresponding to the frequency division number of the melody scale is raised by one octave as shown in FIG. Comparing this with Figure 6,
The selection range of scales increases, making it possible to achieve higher accuracy and wider range of scales.

In other words, a melody sound in the low range obtained by variable frequency division of the reference signal and a melody sound in the high range one octave higher than the low range obtained by variable frequency division of the multiplied reference signal correspond to each other. It is possible to obtain arbitrary tones such as "Fah" in the low range and "Fah" in the high range one octave higher than this by using the same frequency division number of the scale programmable frequency divider 20. Therefore, corresponding sounds in the bass and treble ranges can be obtained with the same precision, and auditory unnaturalness can be eliminated.

In other words, in general, the difference between the output frequency when the variable frequency divider circuit divides the frequency by n stages and the output frequency when the frequency is divided by n successive (n-1) stages is determined by setting the input frequency of the variable frequency divider circuit to f. Then, it is given by the following formula.

f/n-1-f/n=nf-(n-1)f/n(n-
1)=f/n(n-1)...(1) Therefore, the output frequency of the variable frequency divider circuit when frequency is divided by n stages and the output frequency of the variable frequency divider circuit when frequency is divided by (n-1) stages. The difference in output frequency becomes larger as the frequency division number n becomes smaller. Here, frequency multiplication/switching circuit 1
9 is not provided, in order to output the high frequency range, the frequency division number n of the variable frequency dividing circuit (scale programmable frequency divider 20) needs to be smaller than the low frequency range, and the n-stage frequency division The difference in output frequency during frequency division by (n-1) steps becomes larger than in the bass range.
This means that the accuracy of the sound when outputting a low frequency range is different from the accuracy of the sound when outputting a high frequency range, which results in an unnatural sound. However, this problem has been solved in this invention.

Furthermore, since arbitrary corresponding sounds in the bass and treble ranges can be obtained with the same frequency division number, there is an effect that the capacity of the melody memory 21 that stores the scale data of the melody can be reduced.

In addition, FIG. 8 shows that since using the frequency multiplier circuit 19 increases current consumption, the operation of the frequency multiplier/switching circuit 19 is prohibited when the melody is not used in order to reduce power consumption. In the diagram shown,
An AND circuit 32 is provided. A gate control signal is supplied to the AND circuit 32 from the comparator circuit 18 so that the clock reference signal (32.768 KHz) is supplied to the frequency multiplier circuit 19 only during the melody ringing period.

As described above, according to the present invention, since a clock reference signal and its multiplied frequency signal are used, it is possible to provide an electronic timepiece with a melody function that can improve the accuracy of the melody scale and widen the band. be able to.

[Brief explanation of the drawing]

FIG. 1 is an overall configuration diagram of an electronic timepiece with a melody function according to an embodiment of the present invention, FIG. 2 is a configuration diagram of a melody circuit of the electronic timepiece, and FIG. 3 is a diagram of a frequency multiplication/switching circuit in the melody circuit. Circuit configuration diagram, Figure 4 is a timing chart in the frequency multiplier circuit, Figure 5 is a diagram showing the frequency ratio of a general musical scale, and Figure 6 is the output for the frequency division number when the frequency multiplier circuit is not functioning. Diagram showing frequencies,
FIG. 7 is a diagram showing the output frequency with respect to the frequency division number when the frequency multiplier circuit is operated, and FIG. 8 is a diagram showing another embodiment. DESCRIPTION OF SYMBOLS 11... Oscillation circuit, 12... Frequency division circuit, 13... Melody circuit, 14... Time counter, 19... Frequency multiplication/switching circuit, 20... Scale programmable frequency divider, 21... Memory for melody, 25... Inverter, 26... Exclusive OR circuit, 27...AND circuit.

Claims (1)

[Claims] 1. An oscillation circuit that generates a timekeeping reference signal, a frequency division circuit that divides the frequency of the reference signal from this oscillation circuit into a timekeeping signal, and a frequency division circuit that counts the timekeeping signal from this frequency division circuit. A timekeeping circuit, a frequency multiplier circuit that multiplies the timekeeping reference signal from the oscillation circuit, a sound generation mechanism that generates a melody sound, and a switching input signal corresponding to scale information and octave information of the melody to be generated by this sound generation mechanism. a memory circuit for storing, an input terminal connected to an output terminal of the oscillation circuit and an output terminal of the frequency multiplier circuit, and an output terminal of the frequency multiplier circuit and the reference signal based on a switching input signal from the memory circuit; a selection circuit that selects and outputs a scale information; a scale frequency divider circuit that variably divides the output from the selection circuit at a division ratio corresponding to the scale information from the storage circuit and outputs a scale signal; An electronic timepiece comprising: a scale output control circuit that controls the sound generation operation of the sound generation mechanism based on the output signal from the frequency dividing circuit.