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JPS6237855B2 - - Google Patents
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JPS6237855B2 - - Google Patents

Info

Publication number
JPS6237855B2
JPS6237855B2 JP4524281A JP4524281A JPS6237855B2 JP S6237855 B2 JPS6237855 B2 JP S6237855B2 JP 4524281 A JP4524281 A JP 4524281A JP 4524281 A JP4524281 A JP 4524281A JP S6237855 B2 JPS6237855 B2 JP S6237855B2
Authority
JP
Japan
Prior art keywords
signal
circuit
pll
supplied
intermediate frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP4524281A
Other languages
Japanese (ja)
Other versions
JPS57159146A (en
Inventor
Satoshi Yokoya
Norio Numata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP4524281A priority Critical patent/JPS57159146A/en
Publication of JPS57159146A publication Critical patent/JPS57159146A/en
Publication of JPS6237855B2 publication Critical patent/JPS6237855B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H20/00Arrangements for broadcast or for distribution combined with broadcast
    • H04H20/86Arrangements characterised by the broadcast information itself
    • H04H20/88Stereophonic broadcast systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H40/00Arrangements specially adapted for receiving broadcast information
    • H04H40/18Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Stereo-Broadcasting Methods (AREA)

Description

【発明の詳細な説明】 1つのAM放送波でステレオ放送を行うAMス
テレオ放送がある。そして、このAMステレオ放
送の1つの方式として、ステレオの左チヤンネル
の信号L及び右チヤンネルの信号Rの和信号L+
RでキヤリアをAM変調すると共に、その差信号
L−RでキヤリアをFM変調する方法がある。
[Detailed Description of the Invention] There is AM stereo broadcasting in which stereo broadcasting is performed using one AM broadcast wave. As one method of AM stereo broadcasting, a sum signal L+ of a stereo left channel signal L and a right channel signal R is used.
There is a method of AM modulating the carrier with R and FM modulating the carrier with the difference signal L-R.

従つて、そのようなAMステレオ放送の受信機
は、例えば第1図に示すように構成されている。
Therefore, such an AM stereo broadcast receiver is configured as shown in FIG. 1, for example.

すなわち、第1図において、1はアンテナ同調
回路、2はミキサ回路、3は局部発振回路、4は
その共振回路、5は中間周波アンプ、6はAM検
波回路を示し、この検波回路6からは和信号L+
Rが取り出され、この信号L+Rが差信号L−R
に対する遅延時間補正用の遅延回路7を通じてマ
トリツクス回路8に供給される。
That is, in FIG. 1, 1 is an antenna tuning circuit, 2 is a mixer circuit, 3 is a local oscillation circuit, 4 is its resonance circuit, 5 is an intermediate frequency amplifier, and 6 is an AM detection circuit. Sum signal L+
R is taken out, and this signal L+R is the difference signal L−R
The signal is supplied to the matrix circuit 8 through the delay circuit 7 for delay time correction.

また、中間周波アンプ5からの中間周波信号が
リミツタ11により一定振幅とされてからFM復
調回路12に供給されて差信号L−Rが復調され
る。そして、この場合、差信号L−Rは、送信
時、例えば第2図に示すように4000Hz(時定数τ
=400μ秒)の帯域が6dB/octの割り合いでプリ
エンフアシスされているので、この復調された差
信号L−Rがデイエンフアシス回路13に供給さ
れて平坦な周波数特性とされ、このデイエンフア
シスされた差信号L−Rがマトリツクス回路8に
供給される。
Further, the intermediate frequency signal from the intermediate frequency amplifier 5 is set to a constant amplitude by a limiter 11, and then supplied to the FM demodulation circuit 12, where the difference signal LR is demodulated. In this case, the difference signal L-R is transmitted at, for example, 4000 Hz (time constant τ
= 400 μsec) is pre-emphasized at a rate of 6 dB/oct, this demodulated difference signal L-R is supplied to the de-emphasis circuit 13 to have a flat frequency characteristic, and this de-emphasized difference signal LR is supplied to the matrix circuit 8.

従つて、マトリツクス回路8において、信号L
+R,L−Rがマトリツクスされるので、端子9
L,9Rに信号L,Rが取り出される。
Therefore, in the matrix circuit 8, the signal L
Since +R and LR are matrixed, terminal 9
Signals L and R are taken out to L and 9R.

こうして、第1図の受信機ではステレオ再生が
行われる。
In this way, the receiver shown in FIG. 1 performs stereo reproduction.

ところで、この場合、FM復調回路12として
は、一般にレシオ検波回路やPLLなどが使用され
るが、これらのFM復調回路では、S字特性のピ
ークセパレーシヨンが有限であること、及び復調
出力からキヤリア分を除去するためのローパスフ
イルタの時定数などのため、信号L−Rに時間遅
れを生じると共に、これが信号周波数とともに増
加してしまう。
By the way, in this case, a ratio detection circuit, a PLL, etc. are generally used as the FM demodulation circuit 12, but these FM demodulation circuits have a finite peak separation of S-shaped characteristics, and it is difficult to detect the carrier from the demodulated output. Due to the time constant of a low-pass filter for removing the signal, a time delay occurs in the signal L-R, and this time delay increases with the signal frequency.

このため、第1図の受信機では遅延回路7によ
り信号L+R,L−Rの時間差を補正しているわ
けであるが、必らずしも十分とは言えず、このた
め、信号L+RとL−Rとの間に位相差を生じ、
信号L,R間のチヤンネルセパレーシヨンが悪化
してしまう。
For this reason, in the receiver shown in Fig. 1, the delay circuit 7 corrects the time difference between the signals L+R and LR, but this is not necessarily sufficient, and for this reason, the delay circuit 7 corrects the time difference between the signals L+R and L-R. A phase difference is created between -R and
Channel separation between signals L and R deteriorates.

また、リミツタ11のAM抑圧度が小さいと、
過変調時や弱電界時に中間周波信号が途切れる現
象を生じ、このとき、リミツタノイズを生じて大
きなバースト音を発生してしまう。このバースト
音は、PLLを使用した場合でも、VCOのロツク
がはずれることにより同様に生じてしまう。
Also, if the AM suppression degree of limiter 11 is small,
A phenomenon occurs in which the intermediate frequency signal is interrupted during overmodulation or a weak electric field, and at this time, limiter noise is generated and a large burst sound is generated. This burst sound also occurs when the VCO loses lock even when a PLL is used.

この発明は、これらの問題点を解決しようとす
るものである。
This invention attempts to solve these problems.

このため、この発明においては、例えば第3図
に示すように、リミツタ11からの中間周波信号
をPLL20に供給し、その位相比較出力をマトリ
ツクス回路8に供給する。すなわち、リミツタ1
1からの中間周波信号を位相比較回路21に供給
すると共に、VCO22の発振出力を比較回路2
1に供給し、その比較出力Scをローパスフイル
タ23を通じてVCO22に制御信号として供給
してPLL20を構成する。
Therefore, in the present invention, for example, as shown in FIG. 3, the intermediate frequency signal from the limiter 11 is supplied to the PLL 20, and its phase comparison output is supplied to the matrix circuit 8. That is, limiter 1
1 is supplied to the phase comparator circuit 21, and the oscillation output of the VCO 22 is supplied to the comparator circuit 2.
1, and its comparison output Sc is supplied as a control signal to the VCO 22 through the low-pass filter 23 to configure the PLL 20.

そして、この場合、フイルタ23のカツトオフ
周波数を十分に低くし、これによりPLL20のダ
ンピングフアクタ(通常は0.7程度)を十分に大
きく、例えば10以上として一次ループ特性に近づ
け、高域側の極がプリエンフアシスの時定数τに
等しくなるようにする。
In this case, the cutoff frequency of the filter 23 is made sufficiently low, and the damping factor of the PLL 20 (usually about 0.7) is made sufficiently large, for example, 10 or more, so that it approaches the primary loop characteristic, and the pole on the high frequency side Make it equal to the pre-emphasis time constant τ.

そして、比較回路21の比較出力Scを差信号
L−Rとしてマトリツクス回路8に供給すると共
に、検波回路6からの和信号L+Rをそのままマ
トリツクス回路8に供給する。
Then, the comparison output Sc of the comparison circuit 21 is supplied as a difference signal LR to the matrix circuit 8, and the sum signal L+R from the detection circuit 6 is supplied to the matrix circuit 8 as it is.

このような構成によれば、PLL20のループゲ
インによりVCO22は、時定数τ以下の周波数
では中間周波信号に追従するが、時定数τ以上の
周波数では中間周波信号に追従しないので、信号
Scは差信号L−Rであると共に、第2図のプリ
エンフアシス特性に対応したデイエンフアシス特
性の信号となり、すなわち、信号Scはデイエン
フアシスの行われた差信号L−Rとなる。
According to this configuration, the loop gain of the PLL 20 causes the VCO 22 to follow the intermediate frequency signal at frequencies below the time constant τ, but not at frequencies above the time constant τ, so the signal
The signal Sc is a difference signal LR and also has a de-emphasis characteristic corresponding to the pre-emphasis characteristic shown in FIG. 2. In other words, the signal Sc is a difference signal LR subjected to de-emphasis.

従つて、端子9L,9Rに信号L,Rが取り出
される。
Therefore, signals L and R are taken out to terminals 9L and 9R.

そして、この場合、差信号L−Rは、周波数特
性を有する回路を通過していないので、差信号L
−Rに時間遅れを生じることがなく、従つて、信
号L+Rとの間に位相差を生じることがないの
で、信号L,R間のチヤンネルセパレーシヨンが
悪化することがない。また、和信号L+Rに対す
る遅延回路7も不要となる。
In this case, since the difference signal L-R has not passed through a circuit having frequency characteristics, the difference signal L
Since there is no time delay in -R and therefore no phase difference between signal L+R, channel separation between signals L and R will not deteriorate. Further, the delay circuit 7 for the sum signal L+R is also unnecessary.

さらに、PLL20の応答周波数が低くなるの
で、過変調や弱電界などにより中間周波信号が途
切れても、PLL20がロツクはずれを起こすこと
がなく、従つて、バースト音を生じることがな
い。しかし、そのための構成もきわめて簡単であ
り、コストアツプがない。
Furthermore, since the response frequency of the PLL 20 is low, even if the intermediate frequency signal is interrupted due to overmodulation or a weak electric field, the PLL 20 will not lose lock, and therefore no burst sound will occur. However, the configuration for this purpose is extremely simple and there is no cost increase.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図はこの発明を説明するための
図、第3図はこの発明の一例の系統図である。 6はAM検波回路、8はマトリツクス回路、2
0はPLLである。
1 and 2 are diagrams for explaining this invention, and FIG. 3 is a system diagram of an example of this invention. 6 is an AM detection circuit, 8 is a matrix circuit, 2
0 is PLL.

Claims (1)

【特許請求の範囲】[Claims] 1 ステレオの左チヤンネルの信号L及び右チヤ
ンネルの信号Rとの和信号L+Rでキヤリアが
AM変調されると共に、プリエンフアシスされた
上記信号L,Rの差信号L−Rにより上記キヤリ
アがFM変調された放送波を受信するAMステレ
オ受信機において、一定振幅とされた中間周波信
号とVCOの発振信号とを位相比較し、その位相
比較出力をローパスフイルタを通じて上記VCO
に制御信号として供給してPLLを構成すると共
に、このPLLの高域側の極を上記プリエンフアシ
スの時定数に対応させ、上記位相比較出力と中間
周波信号をAM検波して得られる和信号L+Rと
から上記信号L,Rを得るようにしたAMステレ
オ受信機。
1 The carrier is the sum signal L+R of the stereo left channel signal L and right channel signal R.
In an AM stereo receiver that receives a broadcast wave whose carrier is FM modulated by a difference signal L-R between the AM-modulated and pre-emphasized signals L and R, an intermediate frequency signal with a constant amplitude and a VCO are used. Compare the phase with the oscillation signal and send the phase comparison output to the above VCO through a low-pass filter.
is supplied as a control signal to form a PLL, and the high-frequency side pole of this PLL is made to correspond to the time constant of the pre-emphasis, and the sum signal L+R obtained by AM detection of the phase comparison output and the intermediate frequency signal is obtained. An AM stereo receiver that obtains the above signals L and R from.
JP4524281A 1981-03-26 1981-03-26 Am stereo receiver Granted JPS57159146A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4524281A JPS57159146A (en) 1981-03-26 1981-03-26 Am stereo receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4524281A JPS57159146A (en) 1981-03-26 1981-03-26 Am stereo receiver

Publications (2)

Publication Number Publication Date
JPS57159146A JPS57159146A (en) 1982-10-01
JPS6237855B2 true JPS6237855B2 (en) 1987-08-14

Family

ID=12713778

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4524281A Granted JPS57159146A (en) 1981-03-26 1981-03-26 Am stereo receiver

Country Status (1)

Country Link
JP (1) JPS57159146A (en)

Also Published As

Publication number Publication date
JPS57159146A (en) 1982-10-01

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