JPS6237873B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to balance adjustment of video signals of a television camera, and uses a so-called microcomputer to enable good adjustment with a simple configuration. For example, when adjusting the white balance of a television camera, a white subject is photographed, and the levels of the color difference signals (R-Y) and (B-Y) at that time match the level of the video signal during the blanking period. The level of the luminance signal Y in the color difference signal is adjusted as follows. In this case, the conventional procedure was as follows. That is, in FIG. 1, light from a subject 1 is supplied to an image pickup tube 3 through a lens 2. In FIG. Further, horizontal and vertical synchronization signals are supplied from the synchronization signal generator 4 to the image pickup tube 3. A video signal is then taken out from this image pickup tube 3. Further, this video signal is supplied to a decoder 5, where color difference signals (RY), (B-Y) and a luminance signal Y are formed. The color difference signals (R-Y) and (B-Y) are then supplied to mixing circuits 6R and 6B.
The output signal of B is the window comparator 7R, 7B.
supplied to Also, this comparator 7R, 7B
V _TL , where the threshold value has a predetermined width above and below the level of the video signal within the blanking period,
It is assumed to be V _TH . Then, in the comparators 7R and 7B, a signal indicating that the signal level is outside the threshold range and a signal indicating whether the signal level is off to the upper side or lower side are formed, and these signals are The signal is supplied to the count control terminal and up-down control terminal of counters 8R and 8B, respectively. In these counters 8R and 8B, when the level of the color difference signals (RY) and (B-Y) is greater than the threshold value V _TH , the counter 8
R, 8B is counted down, and when it is smaller than the threshold value _VTL , it is counted up. Further, a clock signal from a clock generator 9 is supplied to the counters 8R and 8B. The count values of the counters 8R and 8B are the DA converter circuit 10R,
10B, it becomes a DC voltage proportional to the size of the count value, and this voltage is supplied to the gain control circuit 11.
R, 11B, this gain control circuit 11
The luminance signal Y is sent to the mixing circuit 6R, 11B through R, 11B.
6B. Therefore, in this circuit, the color difference signal (R-
Y) and (B-Y) are out of the range of the threshold values V _TH and V _TL , the gains of the gain control circuits 11R and 11B are controlled, and the luminance signals ±△Y _r supplied to the mixing circuits 6R and 6B are , ±△Y _b level is adjusted,
The color difference signals (R-Y) and (B-Y) are the threshold value V _TH ,
Adjustments are made to stay within the range of V _TL . However, in this circuit, the threshold values V _TH , V
Since _{the TL} is obtained from another circuit system, there is a risk of drift errors due to changes over time. Furthermore, since the up-down counters 8R and 8B count one bit at a time, there is a drawback that it takes time to correct when the input error is large. In view of these points, the present invention is designed to enable good adjustment with a simple configuration using a microcomputer. An embodiment of the present invention will be described below with reference to the drawings. FIG. 2 is a configuration diagram of an example of the present invention. In the figure, 30 is a microcomputer, and this computer 30 has a central processing circuit (CPU) 3.
1, a read-only memory (ROM) 32 in which operating programs of this CPU 31 are written,
It is composed of a random access memory (RAM) 33 for storing data, an input/output circuit 34, and the like. The CPU 31, ROM 32, and RAM 33 are connected by an address bus line 35, a data bus line 36, and a control bus line 37, respectively. Further, the CPU 31 and the input/output circuit 34 are connected by a data bus line 36 and a control bus line 37. Note that these are composed of one-chip LSI. Further, signals from the mixing circuits 6R and 6B are supplied to two fixed contacts of the changeover switch 12, respectively. This switch 12 is switched by a signal from a computer 30. The signal selected by this switch 12 is supplied to a sampling hold circuit 13. Further, the signal from the synchronizing signal generator 4 is supplied to the sampling pulse forming circuit 14, and for the video signal shown in FIG. A sampling pulse corresponding to the period is formed. This sampling pulse is supplied to two fixed contacts of the changeover switch 15, respectively. This switch 15 is switched by a signal from the computer 30. The sampling pulse selected by this switch 15 is supplied to the sampling hold circuit 13. A signal from this sampling hold circuit 13 is supplied to a comparison circuit 16. Further, the contents of an arbitrary address in the RAM 33 of the computer 30 are supplied to the DA conversion circuit 17 to be converted into an analog signal, and this signal is supplied to the comparison circuit 16. This comparison output is supplied to the computer 30. Furthermore, the contents of an arbitrary address of the RAM 33 of the computer 30 are supplied to the sampling and holding circuits 18R and 18B through the DA conversion circuit 17, and the sampling pulse from the computer 30 is supplied to the sampling and holding circuits 18R and 18B.
8B to form a voltage according to the contents of each address. This voltage is supplied to gain control circuits 11R and 11B, respectively. Furthermore, the synchronization signal from the synchronization signal generator 4 is transmitted to the computer 30.
is supplied to Further, a signal from the manual switch 19 for starting white balance adjustment is supplied to the computer 30, and an error display signal and the like from the computer 30 are supplied to the display element 20. The following programs are stored in the ROM 32. The process will be explained below according to the flowchart shown in FIG. In this program, the R-Y color difference signal is first adjusted, and then the B-Y color difference signal is adjusted. In the figure, when the program starts, it is determined in step [1] whether the switch 19 is turned on or not, and as long as it is not turned on, step [1] is repeated. When the switch 19 is turned on, the process proceeds to step [2] and an auto white balance program is executed. That is, in step [2], switch 12
is switched to the R-Y system mixing circuit 6R side. Next, in step [3], the gain control circuit 11R
A digital value, such as "80" (numbers in parentheses indicate hexadecimal values), which makes the gain of 2 a reference value is output, and is set in the sampling hold circuit 18R through the DA conversion circuit 17. Furthermore, in step [4], the switch 15 is switched to the side of the sampling pulse corresponding to the blanking period. Then, the level sampled and held in step [5] is stored in the RAM of the computer 30.
33 first memory address. Note that this memory is such that the content of the first memory address is the DA converter circuit 17.
The output voltage and the input level are compared by the comparison circuit 16, and the contents of the first memory address are modified so that they match. Next, in step [6], the switch 15 is switched to the side of the sampling pulse corresponding to the image period. Then, the level sampled and held in step [7] is stored in the RAM of the computer 30.
33 second memory address. Therefore, the level of the video signal during the blanking period is stored in the first memory address of the computer 30,
The level of the video signal during the image period is stored in the second storage address. Then, in step [8], the following calculation is performed: (contents of the second memory address) - (contents of the first memory address). Further steps

In [9], if the result of the above calculation is positive, the second value is "80" minus the absolute value of the difference, and if negative, the second value is "80" plus the absolute value of the difference. The contents of the storage address are replaced. Then, in step [10], the contents of the second memory address are output and set in the sampling hold circuit 18R through the DA conversion circuit 17. Therefore, in the sampling hold circuit 18R,
A potential corrected according to the above calculation result is set, and ΔY _r is adjusted thereby to produce a color difference signal R-
The level of Y is brought closer to the level of the blanking period. Further, in step [11], it is determined whether the contents of the second memory address are within a predetermined controllable range. When it is out of range, that is, when the contents of the second memory address overflow and become "00" or "FF" (F=15), an error message is displayed on the display element 20 in step [12]. Then, the adjustment of the color difference signal RY is bypassed and the process proceeds to step [20] of adjusting the color difference signal B-Y. On the other hand, if it is within the range, step [13]
The contents of the first memory address are output at DA
The signal is supplied to the comparison circuit 16 through the conversion circuit 17 and compared with the level of the color difference signal RY. Then, in step [14], the comparison output is determined, and if the level of the color difference signal R-Y is large,
In step [15], the content of the second memory address is decremented by "1", and when the level of the color difference signal R-Y is low, the content of the second memory address is incremented by "1" in step [16]. . Further, in step [17], it is determined how many times the above-mentioned operation has been repeated, and if it is, for example, 15 times or less, the process returns to step [10]. When the 16th judgment is made in step [17], the process proceeds to step [20]. If the initial value is within the controllable range, the adjustment will be completed within 16 times. Further, in step [20], the switch 12 is first switched to the BY system mixing circuit 16B, and the first and third
The same adjustment as described above is performed using the memory address of . When the adjustment of the color difference signal B-Y is completed, the program is stopped. Therefore, in this circuit, when the switch 19 is turned on while photographing a white subject, white balance adjustment is performed. When the adjustment of the color difference signal B-Y is completed, the color difference signal R-Y is stored in the second and third memory addresses of the computer 30, respectively.
A correction signal for performing Y and B-Y white balance adjustment is stored as a digital value. These digital values are output alternately, for example, every time a vertical synchronization signal is generated, and the sampling and holding circuit 18
By setting R and 18B, it is possible to always obtain a correct white balance. White balance adjustment is performed in this way.According to the present invention, the level of the video signal in the reference blanking period and the level of the video signal in the image period are obtained from the same signal system, so drift errors can be avoided. There is no risk of such occurrence. Furthermore, since the difference between the two is calculated to perform a rough correction and then a more detailed correction is performed, the time required for adjustment is shortened. Furthermore, since a microcomputer is used, complex adjustments can be easily made using only a program, and the circuit configuration can be simplified. In the above example, the balance of color difference signal types was adjusted, but the present invention can also be applied to adjusting the G-R and G-B types in a three-tube camera. Auto black balance can also be performed with the same configuration by simply changing the program. Furthermore, you can also perform all three levels of adjustment automatically: auto white balance → auto black balance → auto white balance.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional device, FIG. 2 is a block diagram of an example of the present invention, and FIGS. 3 and 4 are diagrams for explaining the same. 1 is the object, 3 is the image pickup tube, 4 is the synchronizing signal generator, 6R, 6B is the mixing circuit, 11R, 11B is the gain control circuit, 13, 18R, 18B is the sampling hold circuit, 16 is the comparison circuit, 17 is the DA conversion The circuit 30 is a microcomputer.

Claims (1)

[Claims] 1. Sampling the level of the video signal during the blanking period, converting this level into AD and storing it in the first address of the microcomputer, sampling the level of the image period in the video signal,
This level is AD converted and stored in the second address of the microcomputer, the difference between these levels is calculated, a correction signal is formed based on the calculation result, and the video signal is converted to the video signal by the correction signal. DA converting the level of the video signal during the blanking period stored in the first address of the microcomputer and outputting it so as to correct it;
This output signal is compared with the level of the image period in the corrected video signal, and this comparison output is supplied to the microcomputer to correct the correction signal and adjust the balance of the video signal. TV camera.