JPS6239741B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a new driving method for an AC-driven self-shifting gas discharge panel that prevents accidental erroneous discharge and overwriting.

Self-shifting gas discharge panels that provide a discharge spot shifting function have a particular drawback in that as the shifting operations are repeated, accidental false discharges occur at both ends of the discharge cell array. The cause of this erroneous discharge is the uneven distribution of accumulated wall charges at both ends of the cell arrangement, that is, excessive accumulation of electrons in the cells on the information writing side and excessive accumulation of ions in the cells on the termination side, and these abnormal wall charges. It has been found that the reason for this is that by lowering the ignition potential of the corresponding cell below the normal potential, the cell in question can erroneously ignite even with a shift voltage that is not capable of igniting on its own. A complete write sequence that completely eliminates this erroneous discharge has also been proposed.

To put it simply, this entire write sequence is: prior to the operation to generate the discharge spot to be displayed in accordance with the input information, an operation is added to turn on all the discharge cells of the shift channel and then erase them. As a result of neutralizing the abnormal wall charge in the lighting state, erroneous discharge is prevented.

However, in such a full write sequence, there is an operational problem in that discharge spots during full lighting cause "flickering" and induce operator fatigue. Therefore, the present inventors conducted various experiments regarding the relationship between the effect of reducing the probability of occurrence of false discharge and the visual impact, and confirmed that 0.4 msec is optimal for the total lighting time. However, according to such a total lighting time, there is another new problem in that when writing the first information, unnecessary discharge, so-called overwrite, occurs in the discharge cell (picture element) closest to the write discharge cell. .

To explain this overwriting in a little more detail, the abnormal wall charge is completely eliminated (neutralized) by the total lighting time and the subsequent all cell erasing operation.
Moreover, in the lighting drive waveform, a unipolar shift voltage pulse (discharge sustaining voltage pulse) is continuously applied to the write discharge cell, and this causes the write cell to receive one pulse due to the pilot effect caused by the discharge of the neighboring shift discharge cell. This causes a discharge and accumulates wall charge.
This wall charge has the same polarity as the write voltage pulse based on the input information, and has the opposite polarity to the subsequent shift voltage pulse. In the case of a shift voltage pulse during a shift operation, the above-mentioned remaining wall charges and new wall charges do not cause erroneous discharge due to the voltage level. However, the voltage level of the write voltage pulse during a write operation is higher than that of the shift voltage, and since the accumulated wall charge is superimposed on this voltage, the intensity increases due to the high voltage applied to the write cell. A discharge occurs. The pilot effect caused by this write discharge is effectively imparted to neighboring shift cells, further lowering the ignition voltage of that cell. Therefore, the shift cell which is in phase with the write cell and adjacent to the write cell is caused to undergo undesired erroneous discharge, that is, overflow, at the same time as the write discharge due to the decrease in ignition voltage due to the synergistic effect of the residual wall charge and this pilot effect. This produces light.

Incidentally, results have already been obtained that such overwriting does not occur when the total lighting time is increased to 1 msec or more. This is because the accumulated wall charges are neutralized and stabilized by a large amount of space charge due to long-term discharge.

Figure 1 is an operating margin characteristic diagram with the shift voltage (maintenance voltage) as a parameter, the total lighting time on the horizontal axis, and the upper limit level of the write voltage on the vertical axis. This shows that the upper limit level of is changing. In the same figure, the lower limit level of the write voltage (Vwmin)
is about 100 to 110V in both curves, so the write operation margin determined by the difference from the upper limit level (Vwmax) is at its minimum when the total lighting time is 0.4 msec, making it easy for overwriting to occur. I can understand. Furthermore, it can be seen that if full lighting is not performed, the shift operation margin is small and accidental erroneous discharge is likely to occur, while the write operation margin is large and overwriting is completely eliminated.

In view of the above-mentioned situation, the present invention aims to provide a new driving method that can further prevent overwriting under driving conditions that eliminate "flickering" and accidental erroneous discharge. Briefly stated, the present invention further includes, in the full write sequence, after the full erase operation, an operation of lighting the write cell with pseudo write information while the shift channel is selected in the reverse shift operation mode. It is characterized by what it did. In short, this invention attempts to clean the surface of the dielectric layer near the write cell by intentionally causing an overwrite phenomenon before a normal write operation and sweeping the erroneous discharge information to the write cell side. It is.

Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the drawings.

FIG. 2 is a plan view showing the electrode arrangement of a self-shift panel with a 2×2-phase meander electrode structure already proposed in Japanese Patent Application Laid-Open No. 53-8053. In this case, two shift channels SC ₁ , SC ₂ is shown representatively. These shift channels consist of two Y (row) electrode groups y _1i and y _2i (i is a positive integer), and two X (column) electrode groups X 1j and X 2j are arranged alternately on the inner surface of the upper substrate so as to face these Y electrode groups, and are derived from common bus lines X1 and _{X2 ,} respectively. (j is a positive integer). X electrode group X _1j and X
Each electrode of _2j is placed in a position so as to straddle two adjacent electrodes of the opposing Y electrode group _y1i and _y2i , and the surface of each electrode is covered with a dielectric layer on the respective substrate. ing. Also, one X
Write electrodes W1 and W2 are provided for each channel adjacent to the rightmost electrode _X11 belonging to the electrode group and facing the rightmost electrode _Y11 of one Y electrode group. According to the combination of the four electrode groups, four groups and four phases (A phase to D phase) discharge cell ai,
bi, ci, and di are arranged regularly and periodically, and the discharge spots generated in the write discharge cells W can be sequentially shifted along the arrangement of these discharge cells.

Next, the drive sequence of the present invention for preventing accidental erroneous discharge and overwriting in the above panel configuration will be explained with reference to the drive voltage waveform diagram in FIG. In the same figure, A indicates the electrode voltage waveform applied to each electrode and write electrode of each shift channel SC ₁ and SC ₂ through the indicated bus line,
Further, B shows a cell voltage waveform applied to the discharge cell group between the electrodes.

First, the period t ₁ - t ₄ of the entire write sequence is t ₁
- Referring to t ₂ , at the timing when the Y-side buses Y1, Y2 are at ground potential, the shift voltage (sustaining voltage) pulse PS and lighting voltage pulse PR are superimposed on the X-side buses X1, X2 corresponding to all shift discharge cells. applied at the same time. Note that the pulse PR is supplied from an all-cell lighting drive circuit (not shown). Since this composite voltage pulse is set to the same level as the write voltage pulse, discharge spots occur simultaneously in all shift cells ai to di determined between all shift electrodes belonging to these bus lines. In short, all-cell lighting operation is performed.

At this time, since a unipolar shift voltage pulse PS as shown in FIG. 3B is applied to the write discharge cell Wi, the initial pulse of the pulse train is affected by the pilot effect caused by the discharge of the shift cell as described above. A discharge spot also occurs in the write cell when a pulse is input. Note that since the wall voltage caused by this discharge has the same polarity as the next shift pulse, another write discharge does not occur and is accumulated as it is on the surface of the dielectric layer on the write cell.

Following this operation, from t ₂ to t ₃ , when a shift voltage pulse PS is applied with a phase difference τe between each of the bus lines X1 and Y1, and between X2 and Y2, an erase pulse PE is applied to all shift cells. As a result, an erase discharge is generated in the shift cell for erasing the discharge spot.
This erases a large amount of wall charges accumulated on the cell. In short, an all-cell erase operation will be performed. Note that this erase discharge does not erase the accumulated wall charges on the dielectric layer corresponding to the write cell. Therefore, as described above, this wall charge is the main cause of causing intense write discharge and overwriting when input information is written.

However, in the present invention, during the next period t ₃ -t ₄ , an operation is added to erase the accumulated wall charges around the write cell by writing duplicate information while applying a reverse shift. That is, first, referring to the unit period TO', two write voltage pulses PW ₁ and PW ₂ based on pseudo write information generated with the operation of the write sequence are sequentially applied to the write electrodes W1 and W2, and the write cell W1 ，
A write voltage waveform as shown by wi in FIG. 3B is added to W2. Specifically, first, a write pulse with a wider width (approximately 12 μsec) and a higher level than the shift pulse PS indicated by PW ₁ is used to write the write pulse w.
The first discharge spot occurs. This spot is accompanied by a discharge power larger than usual due to the residual wall charge mentioned above.

At this time, the shift pulse PS as shown is applied to the group ai to which the first shift cell a1 of shift channels SC ₁ and SC ₂ belongs.
Due to the pilot effect of the write discharge spot, a discharge spot is simultaneously generated in the shift cell a1 adjacent to the write cell. Also, at this time, shift cell d1
Since the shift pulse PS is also applied to the cell, if there is a residual wall charge on the surface of the dielectric layer corresponding to the same cell, the pilot effect of the intense write discharge causes erroneous discharge, that is, overwriting.

Therefore, the discharge spot generated in the write cell w is caused by the shift pulse PS applied to the first shift electrode _y11 opposite to the subsequent write electrode and the narrow width (1
This is sustained by a write voltage pulse PW ₂ of ~2μsec), but since the latter write pulse has a short discharge time and corresponds to a so-called erase discharge, no wall charge is accumulated, and as a result, the write cell The corresponding dielectric layer surface is cleaned. Figure 3B
The dotted curve at wi shows the change in wall charge (wall voltage). During this time, the shift cell a1
The discharge spots generated at and d1 are sustained by shift pulses applied alternately to a pair of opposing shift electrodes y ₁₁ and x ₁₁ and y ₁₂ and x ₂₁ defining each cell, and ai and di in FIG. The polarity of the wall voltage is repeatedly reversed as shown by the dotted line.

In the subsequent unit period TI', as the application of the basic pulse train to each bus is switched, the erase pulse PE is applied to the A-phase and B-phase shift cells ai, bi, and the C-phase and D-phase shift cells ci, A shift pulse PS is added to each di. By this,
Discharge spots are generated simultaneously in the shift cell d1 and the adjacent shift cell c1. However, the discharge spot generated in the shift cell a1 is erased by applying an erase pulse at this timing.

Each discharge spot has the following unit period T2',
As the basic pulse train shown in the figure is applied at T3', two adjacent discharge cells b1, c1,
Shift channel in a manner that shares a1 and b1
It is sequentially shifted to the write cell side along SC _i .
In short, a shift operation in the opposite direction is performed. 1 in the above four unit periods T0' to T3'
A shift cycle, that is, a shift operation for one picture element is performed, and when this reverse shift operation is repeated further, the discharge spots are finally swept out to the write end and erased. Become. Note that the write pulse is not necessarily required in the second shift cycle and can be omitted. FIG. 4 is a diagram schematically showing the shift form of the discharge spot in the entire write sequence in association with the cell voltage waveform of FIG. 3B.

With the new all-write sequence as described above, a considerable amount of the abnormal wall charge on the surface of the dielectric layer corresponding to all shift cells is removed to the extent that it does not induce accidental erroneous discharge, and in addition, the accumulated wall charge on the write cell is removed. is also removed (erased).

Now, after completing such a complete write sequence, a write operation is performed on the input information as is well known, but in this case, the shift operation is switched to the original forward shift mode. As is clear from the four unit periods T0 to T3 shown in the third diagram, the forward shift is performed by alternately replacing each basic pulse train applied to the two-phase bus lines X1 and X2 on the X side. For example, if we refer to the unit period T0 in the same figure, the write pulse PW ₁ based on the input information
When PW ₂ is sequentially applied to the write electrodes W1 and W2 and a write voltage waveform as shown in FIG. 3B is applied to the write cell w, the first discharge spot is generated in the cell w at PW ₁ . At this time, the shift pulse PS is applied to the A-phase shift cell group ai, so
Due to the pilot effect of the write discharge, a discharge spot is simultaneously generated in the shift cell a1 adjacent to the write cell. Note that at this time, the shift pulse PS is also applied to the shift cell d1, but in this case, erroneous discharge, that is, overwriting does not occur for the reason described above. The write discharge spot is then erased by the next narrow write pulse _PW2 as described above. On the other hand, the discharge spot generated in the shift cell a1 is a shift consisting of sequential switching of the shift pulse train in a total of four unit periods, excluding this unit period T0 and including the remaining three unit periods T1 to T3 (partially not shown). As a result of the operation, two adjacent discharge cells a1, b1, b1, c as shown in FIG.
1, c1, d1... are sequentially shifted toward the other end along the shift channel in a shared manner.

Thus, write and shift operations result in
The input information will be displayed on the panel.

By the way, this type of self-shifting panel is mainly applied to displays for displaying characters, and in this case, a character display line is constructed by arranging a plurality of shift channels, for example, 9 shift channels, and a 7× 9
A configuration is adopted in which dot characters are displayed. In the case of such a panel, the pseudo write information in the entire write sequence may be selected from character information that enables all write cells in the display row to be activated in total.

As is clear from the above description, the driving method of the present invention involves intentionally causing an overwrite phenomenon after an all-cell erase operation in the entire write sequence, and then adding an operation to sweep the erroneous discharge spot to the write end. By doing so, it is possible to completely eliminate accidental erroneous discharge peculiar to self-shifting gas discharge panels under optimal visual conditions, and also to eliminate overwriting. Therefore, it is extremely advantageous in improving operability and panel quality.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing the operating margin characteristics when all cells are lit in a self-shifting gas discharge panel, Fig. 2 is an electrode arrangement diagram of the self-shifting gas discharge panel applied to this invention, and Fig. 3 is a driving voltage waveform diagram according to an embodiment of the present invention, No. 4
The figure is a diagram schematically showing the write form and shift form of the discharge spot using the drive waveform of FIG. 3. X1, X2, Y1 and Y2: bus bar, x _ij and y _ij : shift electrode, Wi: write electrode, ai~di:
Shift discharge cell, wi: write discharge cell, PS: shift voltage pulse, PW ₁ and PW ₂ : write voltage pulse, PE: erase pulse, PR: lighting pulse.

Claims (1)

[Claims] 1. Generating a discharge spot corresponding to input information in a write discharge cell of a self-shifting gas discharge panel, which is equipped with a shift channel consisting of a regular arrangement of shift discharge cells and a write discharge cell adjacent to one end of the channel. In the driving method, the shift discharge cell group is once set to a fully lit state and then subjected to a full write sequence in which the group is set to an erased state prior to the operation, wherein after the full erase operation, the shift channel is shifted in a reverse direction. 1. A method of driving a self-shifting gas discharge panel, comprising: adding an operation of lighting the write cell according to pseudo write information in a state where an operation mode is selected.