JPS6242279B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to an electronic musical instrument that realizes a glissando performance by automatically changing a note selected by pressing a key or the like to another note. Generally, a note selected on a keyboard is generated as a musical tone at the pitch corresponding to the key pressed. By the way, when it is necessary to automatically generate a sound different from the sound selected on the keyboard, conventional electronic musical instruments are equipped with many sound source oscillators and generate multiple sound source signals in predetermined combinations corresponding to key presses. A large number of gate circuits, etc. were used in combination so that a selection could be made. This invention generates a sound different from the sound of a pressed key by a completely different configuration from the conventional electronic musical instrument,
This is a device designed to perform a glitsando performance, in which a digital signal (key information) representing the note selected by pressing a key, etc. is processed using desired constant data, and the meaning of the key information (key name) is processed using desired constant data. The present invention provides an electronic musical instrument that realizes automatic Gritsando performance by changing the pitch name (or pitch name). The present invention is applied to an electronic musical instrument that supplies digital key information representing the selected tone in response to a tone selection by pressing a key on a keyboard, etc., and generates a musical tone corresponding to the content of this key information. Ru. The above key information is the name of each note (i.e. each key on the keyboard)
They each have different contents (values) corresponding to the .
Therefore, changing the content of the key information means changing the selected sound to another sound. According to this invention, the value of the constant data for changing key information can be changed over time. As a result, the value of the changed key information changes over time, and the generated sound (pitch) changes over time. In other words, since the key information is changed by calculating constant data, the key information can be easily changed over time simply by changing the value of the constant data. By giving the value of the constant data as a value corresponding to a desired pitch, and changing that value at a desired time interval, the difference between the notes that are sequentially realized by the changed key information can be changed. The desired pitch is produced. As a result, the pitch of the musical tone changes by a desired pitch at a desired time interval, making it possible to realize an automatic glissando performance. According to this invention, a plurality of different constant data are generated in a time-sharing manner, each constant data is operated on the same key information separately, and a plurality of changed key information having different values are generated. can do. With this, automatic glissando performance can be realized by simply selecting one note by pressing a key or the like. By setting each constant data to a value corresponding to a predetermined pitch, the sound generated based on the plurality of changed key information can be made into a chord sound. Hereinafter, in this specification, when a "chord" or "chord sound" is simply referred to, it means "chord". In addition, "conforming tone" refers to the note selected by pressing a key etc. as the root note, and a predetermined interval (for example, 1st, major 2nd, minor 3rd) relative to that root note.
degree, major third, perfect fifth, major sixth, minor seventh, etc.)
Indicates a sound with . In addition, in the following examples,
"Key information" is represented by the words "key code" or "key data." Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. FIG. 1 is a block diagram for explaining the basic concept of the present invention, in which a selection key information supply circuit 11 is a circuit that supplies key information representing a sound selected by a key press or the like to an arithmetic circuit 12. When selecting a tone using a keyboard, the keyboard includes a keyboard and key switch circuit, and a circuit that detects the operation of the key switch and generates digital key information. When selecting a sound by an operation other than pressing a key, key information shall be supplied in accordance with the operation. The constant generation circuit 13 generates constant data for changing the key information, and supplies the constant data to the arithmetic circuit 12. Depending on how this constant data is given, automatic bass performance, automatic chord performance, automatic gritzando performance, automatic portamento, etc.
Various automatic performances can be realized. The arithmetic circuit 12 is, for example, a circuit that performs addition, and adds constant data to key information to obtain changed key information. If the value of the constant data to be added is 0, the key information of the selected note is output, but if it is any other value, key information representing a different note than the selected note is output as a result of the calculation. Ru. The key information output from the arithmetic circuit 12 is supplied to the utilization circuit 14, and musical tones corresponding to the key information are generated. In the case of a compound instrument,
The utilization circuit 14 includes a circuit for allocating key information to appropriate sounding channels, a circuit for generating musical tones based on the key information assigned to each sounding channel, and the like. Detailed embodiments of the electronic musical instrument of the present invention are shown in the drawings starting from FIG. To facilitate understanding,
To roughly explain the correspondence between FIG. 1 and FIG. 2, the selection key information supply circuit 11
and the key coder 26, the arithmetic circuit 12
corresponds to the key code processing section 42, the constant generating circuit 13 corresponds to the chord detecting section 39, subtone forming data generating section 40, base pattern generating section 41, etc., and the utilization circuit 14 corresponds to the channel processor. 30 corresponds to parts such as a musical tone generation circuit 32. In the following embodiments, first, a case in which automatic bass performance is realized will be mainly described. Also, for examples of generating multiple sounds (chord sounds) at the same time,
This will be explained in the description of chord sound generation in the "single finger function" below. The implementation of the automatic grit sanding according to the invention will be explained later in this specification. The embodiment shown in FIG. 2 is an electronic system that generates a key code, which is a digital code signal that identifies the key, in response to a key press, and generates a musical tone based on this key code. This invention is applied to musical instruments. key coder 26
detects the operation of each key switch of an upper keyboard 27 for playing melody sounds, a lower keyboard 28 for playing chord sounds, and a pedal keyboard 29 for playing bass sounds, and generates a key code signal representing the pressed key. As the key coder 26, for example, Japanese Patent Application No. 50-100879
It is preferable to use the key coder described in the specification of Japanese Patent Application Laid-Open No. 52-24518 and the title of the invention is "Key Switch Detection Processing Device." The key coder 26 sequentially and repeatedly generates key codes KC corresponding to one or more keys being pressed. keyboard 2
In order to identify each key from 7 to 29, as shown in Table 1, the key code KC is the keyboard code K ₁ , K ₂ representing the keyboard type, the octave code B ₁ , B ₂ , B ₃ representing the octave range, and note codes N ₁ , N ₂ , N ₃ , and N ₄ representing 12 note names, a total of 9 bits of code signals.

[Table] The magnitude of the binary values of octave codes B ₁ , B ₂ , B ₃ and note codes N ₁ , N ₂ , N ₃ , N ₄ correspond to the pitch of the sound. For example, octave chord B ₁
~B ₃ 's range increases by one octave each time its binary value increases by one. Also note code N ₁
The higher the binary value of ~ _N4 , the higher the pitch, but the weight of the binary value does not exactly correspond to the pitch. As is clear from Table 1, “0011”, “0111”, “1011”, “1111”
The data is omitted from note codes N ₁ to _{N 4} , but this is to facilitate key code processing for forming subordinate notes, which will be described later. Normally, the 12-tone scale within one octave is in the order of C, C#, D...B, with C as the lowest note, but in the case of Table 1, the octave codes B ₁ to _{B 3} are constant. Then, the pitch order of C#, D...B, C is established. This means that if the octave codes B ₁ to B ₃ are the same, the C note octave range will be different from other notes C# to B3.
This indicates that it is above the octave range of the B note. For example, if the code B ₃ , B ₂ ,...N ₂ , N ₁ is "0001110", it will be a C ₂ note, and if it is "0010000", it will be a C 2 note.
C ₂ # represents the sound. Also, if the code B ₃ ...N ₁ is “1011101”, it is B ₆ notes, and if it is “1011110”, it is B 6 notes.
C represents _{the 7th} note. By the way, the key coder described in the specification of the above-mentioned Japanese Patent Application No. 100879/1987 is a key code that is
Extract only KC, 24μs per key code
Each extracted key code KC with a width of (microseconds)
Output in order. When a key from keys 27 to 29 is released, that key code is no longer output, but the channel processor 3 (described later) determines which key code is no longer output (whether the key has been released).
In order to detect at 0, a start code SC is generated from the key coder 26 almost regularly. The contents of the start code SC are as shown in Table 1 above. The generation time width of the start code SC is 24 μs, the same as that of the key code KC, and the generation period thereof is, for example, about 5 ms (milliseconds). start code
Key code KC is not generated when SC is occurring. In the channel processor 30, the key code generated up to now is the start code.
When SC is no longer generated once during one cycle, it is determined that the key associated with that key code has been released. The channel processor 30 receives key code data given from the key coder 26 (or via the automatic bass chord performance control device 31 described later), and controls the maximum number of simultaneous pronunciations of the notes corresponding to this key code data. (for example, 12 sounds) to one of the corresponding number of channels. The channel processor 30 has a memory location corresponding to each channel, stores key code data corresponding to a key in the memory location corresponding to the channel to which the sound of a certain key is assigned, and stores the key code data corresponding to the key. Data KC ^* is output in a time-division manner for each channel. The key code data KC ^* assigned to each channel is the musical tone generation circuit 32.
, and a sound corresponding to the content of the key code data KC ^* is produced. In addition, the channel processor 30 outputs an attack start signal AS indicating that sound should be produced in the channel to which the key code data KC ^* is assigned, and an attack start signal AS indicating that the key assigned to that channel is released (key A decay start signal DS indicating that the code is no longer being applied to the channel processor 30 is generated and applied to the envelope generation circuit 33. As the channel processor 30, a circuit as described in the above-mentioned Japanese Patent Application No. 100879/1980 may be used. The musical sound generation circuit 32 generates key code data KC ^*
A known circuit (for example, a circuit as disclosed in the specification of Japanese Patent Application No. 48-41964 and Japanese Unexamined Patent Publication No. 49-130213 entitled "Electronic Musical Instrument") can be used. Frequency information storage device 34
is the key code based on the key code data KC ^* given from the channel processor 30.
A numerical value F proportional to the musical tone frequency of the key represented by KC ^*
Read out. The accumulator 35 accumulates the numerical value F and creates address data qF for repeatedly reading out the sound source waveform signal from the waveform memory 36. The envelope generation circuit 33 is the channel processor 3
The amplitude envelope waveform of a musical tone is generated based on the data AS, DS representing key press or key release given from 0, and the maximum amplitude value of the sound source waveform signal repeatedly read from the waveform memory 36 is determined according to the amplitude of the envelope waveform. change over time. The timbre circuit 37 controls the timbre of the sound source waveform signal read out from the waveform memory 36 to obtain a musical tone signal of a desired timbre. This musical tone signal is generated via a sound system 38. The aforementioned musical tone generation operation in the musical tone generation circuit 32 is executed in a time-division manner for each channel in accordance with the tone generation assignment in the channel processor 30. Automatic bass chord performance control device 3 inserted between key coder 26 and channel processor 30
1 receives from the key coder 26 the key code KC of the key selected (pressed) on the lower keyboard 28 or the pedal keyboard 29, and generates a key code corresponding to the bass tone in automatic bass performance based on this key code KC. AKC is created, and a key code AKC that corresponds to the chord constituent notes in automatic chord performance is created. That is, based on the key code KC of the key pressed on the keyboard, the automatic bass chord performance control device 31 automatically generates the key code AKC of the key that is not actually pressed, as if it were pressed. and supplies it to the channel processor 30. The chord detection section 39 receives the key code KC related to the lower keyboard 28 and detects the chord name and chord type of the chord tone being pressed on the lower keyboard 28.
The subordinate tone forming data generating section 40 is the chord detecting section 39
According to the chord type detected in , follower tone forming data SD corresponding to a predetermined pitch is generated. This follower tone formation data SD is given as a numerical value corresponding to the pitch, and which pitch corresponds to the follower tone formation data SD.
The timing at which SD is generated is controlled by the output of the base pattern generator 41. The key code processing section 42 is a key coder 26
The value of the key code KC given from the key coder 26 is changed according to the value of the data SD for forming a subordinate note, and when the key code KC from the key coder 26 is taken as a root note, a subordinate note having a predetermined pitch with respect to this root note is created. Creates a key code AKC that corresponds to the sound. In this embodiment, the lower keyboard 28 is used as a keyboard for playing chord sounds, so the key codes KC related to the plurality of keys pressed in chord form on the lower keyboard 28 are not changed in the key code processing section 42. is supplied to the channel processor 30 as is.
These tones (chord constituent tones) of the lower keyboard 28 are assigned to respective required channels by a channel processor 30. Chord sound generation timing control section 4
3 generates a chord sound generation timing signal CG according to the rhythm selected by the performer. The chord sound generation timing signal CG is applied to an envelope generation circuit 33, which simultaneously generates an envelope waveform signal in the channel to which the lower keyboard sound (chord sound) is assigned. Therefore, every time the chord tone generation timing signal CG is generated, the notes pressed on the lower keyboard are simultaneously sounded (that is, they are sounded as a chord tone). On the other hand, the type of chord formed by one or more keys pressed on the lower keyboard 28 is detected by the chord detection section 39, and the chord type is detected by the chord detection section 39, and the chord type is detected by the chord detection section 39. The data SD for forming a follower tone of a predetermined pitch corresponding to the chord type detected by the detection unit 39 is sent to the key code processing unit 42.
given to. The key code processing unit 42 is a key code of a single key pressed on the pedal keyboard 29.
KC is received from the key coder 26, the key code KC of this pedal keyboard 29 is stored, and the stored key code KC is changed using the subordinate tone forming data SD. When the timing is to generate a note corresponding to the root note as a base note, the subordinate note formation data SD is not given, and the key code KC of the pedal keyboard stored in the key code processing section 42 is directly supplied to the channel processor 30. . In this way, the bass note is assigned to a predetermined channel (usually a specific channel dedicated to the pedal keyboard), and the note corresponding to the root note is produced as the bass note. Next, when it is time to generate a note having a predetermined interval (for example, a major third interval) with respect to the root note as a base note, the key code processing unit 42 generates subordinate tone formation data SD having a value corresponding to the predetermined interval. , and modulates the value of the key code KC pressed on the pedal keyboard 29 by a predetermined pitch to create a processed key code AKC. The sound of this processed key code AKC is assigned to a predetermined channel in the channel processor 30, for example, a channel dedicated to the pedal keyboard in place of the previously generated bass sound, and is output from the musical sound generation circuit 32 to a follower tone of the predetermined pitch. The sound that is played is pronounced as the bass sound. Normally, when a plurality of keys on the pedal keyboard 29 are pressed, the key coder 26 generates only a key code for a single key. Detailed examples of the automatic bass chord performance control device 31 are shown in FIGS. 3 through 7, respectively. A detailed example of the chord detecting section 39 is shown in FIG. 3, a detailed example of the subordinate tone forming data generating section 40 is shown in FIG. 4, a detailed example of the key code processing section 42 is shown in FIG. 5, and a detailed example of the base pattern generating section 41 is shown in FIG. A detailed example of the chord sound generation timing control section 43 in FIG. 6 and FIG. 7 is shown in FIG. In the circuits of FIGS. 3 to 7, various logic circuit elements and the like are illustrated in the manner shown in FIG. 8A shows an inverter, b and c in the same figure represent an AND circuit, d and e in the same figure an OR circuit, f in the same figure an exclusive OR circuit, and g in the same figure a 1-bit delay flip-flop, respectively. When the number of inputs in an AND circuit or OR circuit is small, the usual display diagrams as shown in b and d of the figure are adopted, and when the number of inputs is large, the diagrams shown in c and e of the figure are adopted. In Figures c and e, one input line is drawn on the input side of the circuit,
A plurality of signal lines are made to intersect with this input line, and the intersection point between the signal line of the signal to be input to the circuit and the input line is surrounded by a circle. Therefore, in the case of example c in the same figure, the logical formula is Q=A, B, D, and e in the figure
For the example, the logical formula is Q=A+B+C. Further, h in the figure shows a shift register, the number of the numerator of the fraction shown in parentheses in the block indicates the number of stages of the shift register, and the number of the denominator indicates the number of bits of input data to the shift register. Although shift clock pulses for the delay flip-flop and shift register are not particularly shown, they are all shifted by the same shift clock pulse (specifically, a two-phase clock pulse). The shift clock pulses used in the circuits of FIGS. 3 through 7 have the same period as the clock pulses used in the key coder 26 (for example, about 24 μs). Therefore,
The 24 μs wide key code KC supplied from the key coder 26 is reliably stored in a delay flip-flop or the like in the automatic bass chord performance control device 31.
Time for one cycle of shift clock pulse: 24 μs
will be referred to as 1 bit time below. A circuit illustrated in the manner shown in FIG. 8i represents a differentiating circuit. This differentiator circuit consists of a delay flip-flop DFF and an inverter, as shown in figure j.
It is equipped with INV and an AND circuit, and outputs a differential pulse with a width of 1 bit time (24 μs) at the rising edge of the input signal. The automatic bass chord performance control device 31 shown in detail in Figs. One function can be arbitrarily selected from a total of three automatic performance functions, including a function (hereinafter referred to as a custom function). These three functions are the above-mentioned "custom function" which is the purpose of this invention, the chord sound playing keyboard (lower keyboard), which allows you to press multiple keys in a chord format, automatically generate chord sounds, and A function that automatically sounds the corresponding bass note (hereinafter referred to as the "finger chord function"), a function that allows you to press a single key corresponding to the root note on the chord note playing keyboard, and change the chord type to a separate appropriate method. There are three functions for automatically playing chord tones made up of a plurality of chord constituent tones and automatically playing bass tones (hereinafter referred to as the "single finger function"). The "finger chord function" and the "single finger function" are conventionally known functions, and these functions are used to control the relationship between the automatically played chord sound and the bass sound (especially This uniquely determines the root note of the chord. In this embodiment, using one automatic bass chord performance control device 31, it is possible to perform selective automatic performance of the "custom function" according to the present invention and other "finger chord functions" and "single finger functions". It is becoming. The automatic performance function is selected by operating function switches 44, 45, and 46 (see FIG. 4). The function switch 44 is for selecting the "single finger function", the switch 45 is for selecting the "finger chord function", and the switch 46 is for selecting the "custom function".
This is for selecting. When each of the function switches 44 to 46 is closed, the corresponding signals FF ₁ , FF ₂ and FF ₃ become "1" and are applied to the function decoder 47 (FIG. 4). The function decoder 47 receives input signals FF ₁ , FF ₂ ,
Corresponding to the logical value of _FF3 , signals for selecting each function are output as shown in Table 2. In addition, switch 4
When all 4 to 46 are open, it is "off" and automatic bass chord performance is not performed.

[Table] When selecting a custom function, close only the switch 46, set the signal FF ₃ to "1", and turn the AND circuit 4
8 (Figure 4) to select the custom function selection signal.
Set CA to “1”. When selecting the finger code function, close only switch 45 and turn on signal FF _2.
is set to "1", and the AND circuit 49 is operated to set the finger code function selection signal FC to "1". When selecting the single finger function, the switch 44 is closed, the signal FF ₁ is set to "1", and the single finger function selection signal SF is set to "1" through the 1-input AND circuit 50. When the switch 44 for selecting the single finger function is closed, the chord type selection switch circuit 51 (FIG. 4) becomes operational, and information specifying the chord type in the single finger function is transmitted to the signal FF ₂ and FF ₃ lines. Supplied. However, at this time, switches 45 and 46 for selecting other functions are open. This is because the single finger function selects only a single key on the chord tone playing keyboard, so it is necessary to select the chord type using the chord type selection switch circuit 51. As shown in the second table, when the code type is "major", the signals FF2 and _FF3 given from the switch circuit 51 are both "0".
Therefore, a code type designation signal is not specially generated. In the case of “minor code”, signal FF ₂ is “1”,
When FF ₂ is "0", the output of the AND circuit 52 of the function decoder 47 becomes "1", and the minor code signal m is outputted to the line 54 via the OR circuit 53. Signal FF ₂ for "seventh chord"
is "0" and _FF3 is "1", the output of the AND circuit 55 becomes "1", and the seventh code signal ^7b is outputted to the line 57 via the OR circuit 56. In the case of a "minor seventh code", both signals FF ₂ and FF ₃ are "1", and the output of the AND circuit 58 is "1", thereby generating the minus seventh code signal m7.
This minus-seventh code signal m7 produces a signal "1" on lines 54 and 57. The code type selection switch (not shown) used in the code type selection switch circuit 51 includes:
It is preferable to use the white keys and black keys of the pedal keyboard 29.
Use the white key to select the "seventh chord",
It is best to use the black keys to select "minor chords". However, the present invention is not limited to this, and a switch for selecting the code type may be specially provided. Hereinafter, detailed operations of the automatic bass chord performance control device 31 shown in detail in FIGS. 3 to 7 will be explained, focusing on the "custom function." Chord Detection In FIG. 3, the AND circuit 59 detects information on the lower keyboard based on the keyboard codes K ₁ and K ₂ of the 9-bit key code signal KC given from the key coder 26 (FIG. 2). However, the AND circuit 60 detects information on the pedal keyboard. When the input key code KC is for the lower keyboard, the lower keyboard detection signal LK output from the AND circuit 59 becomes "1", and each AND circuit of the lower keyboard note decoder 61 is enabled. Lower keyboard note decoder 61
is the key code supplied from the key coder 26
Note codes N ₁ to _{N 4} of KC are input and decoded into one of 12 note names C, C#...B. This decoding operation is performed only when the note codes _N1 to _N4 are generated by pressing keys on the lower keyboard. Each of the 12 note names from the lower keyboard note decoder 61 C~
The 12 outputs corresponding to B are stored in storage locations for each note name in the lower keyboard note primary memory 62, respectively. In FIG. 3, only the memory circuit 62B for the B note is shown in detail, but the other memory locations 62A# for the A# to C notes are shown in detail.
62C also has the same configuration. At each storage location 62B to 62C of the primary memory 62, the note detection signal given from the note decoder 61 is sent to the OR circuit 6.
3 to the delay flip-flop 64, and passes through the AND circuit 65 to the delay flip-flop 64.
is self-maintained. When a start code SC is given from the key coder 26 in place of the key code KC, the AND circuit 66 detects that all bits of the note codes _N1 to _N4 have become "1", and responds to the start code SC. outputs a signal “1”. Start code detection signal SC from AND circuit 66
passes through an OR circuit 67 and an inverter 68, and disables AND circuits 65 at each storage location 62C to 62B. Therefore, the storage (self-retention) of the primary memory 62 is cleared every time the start code SC is generated. Note that the initial clear signal IC added to the OR circuit 67 or other circuits temporarily becomes a signal "1" only when the power is turned on, and is used to prohibit the operation of each circuit and clear the memory, and normally is the signal “0”. For example, assume that the keys G ₅ , E ₅ , and C ₅ are pressed on the lower keyboard 28, and the G ₂ note is pressed on the pedal keyboard 29. The start code SC is generated almost regularly as shown in Figure 9a, and the key code KC is generated for each pressed key (lower keyboard) as shown in Figure 9b.
Code signals representing G ₅ , E ₅ , C ₅ notes, and G ₂ notes on the pedal keyboard are sequentially supplied. Therefore, the AND circuit 59 outputs the 9th key code corresponding to the lower keyboard key code.
As shown in Figure c, the lower keyboard detection signal LK is generated,
The AND circuit 60 generates a pedal keyboard detection signal PK as shown in FIG. 9d in response to the key code of the pedal keyboard. The lower keyboard note decoder 61 decodes the note codes of G, E, and C notes respectively, and stores them in the lower keyboard note primary memory 62 at storage location 62G for G note, storage location 62E for E note, and storage location 62C for C note. A signal "1" is stored in each of them, and the stored signal is outputted as shown in FIG. 9e. Lower keyboard detection signal output from AND circuit 59
LK is also stored in a delay flip-flop 71 via an OR circuit 69 and an AND circuit 70. The memory of the delay flip-flop 71, like the lower keyboard note primary memory 62, is cleared every time the start code SC occurs. But the start code
When the output of the OR circuit 67 is "1" due to the occurrence of SC, the output of the delay flip-flop 71 is "1".
The output of the OR circuit 73 is "1", and the output of the AND circuit 74 becomes "1" at the timing of generation of the start code SC. The output "1" from the AND circuit 74 clears the old memory in the lower keyboard secondary memory 75 and causes the output of the primary memory 62 to be newly stored. That is, the lower keyboard note secondary memory 75 is
Storage positions 75A# to 75C having the same configuration as the memory location 75B for the B note whose details are illustrated are stored in other memory locations A# to 75C.
The output "1" of the AND circuit 74 enables the AND circuits 76 of each memory location 75B to 75C, and the primary memory 6
The storage signals of the storage locations 62B to 62C of 2 are stored in the corresponding storage locations 75B to 75C of the secondary memory 75.
respectively. The output "1" of the AND circuit 74 is inverted by the inverter 77, and the AND circuits 78 at each storage location 75B to 75C of the secondary memory 75 are rendered inoperable. Therefore, the old memory in the secondary memory 75 is cleared, and the memory signal of each pitch name in the primary memory 62 is newly stored in the delay flip-flop 80 via the AND circuit 76 and the OR circuit 79. When the start code SC disappears, the output of the AND circuit 74 becomes "0", so the AND circuit 78 of the secondary memory 75 becomes operational, and the memory of the delay flip-flop 80 is self-held. Therefore, in the example of FIG. 9, the lower keyboard note secondary memory storage locations 75G, 75 for G, E, and C notes
A signal "1" is stored in E and 75C at the timing of the start code SC. As shown in FIG. 9f, each storage location 75G, 75 of the secondary memory 75
Once the signal “1” is stored in E, 75C, the key code KC related to that note name becomes the start code.
The DC signal “1” is held until no signal is given during one period of SC (until the key is released). That is, in the secondary memory 75, the storage positions 75B to 75 of the note names pressed on the lower keyboard are
A signal "1" is always stored in C. Similarly to the above, the storage signal of the delay flip-flop 71, which is the primary memory of the lower keyboard detection signal LK, is input to the AND circuit 8 when the start code SC is generated.
1. The signal passes through an OR circuit 82 and is stored in a delay flip-flop 83, which is a secondary memory. Lower keyboard detection signal LK stored in delay flip-flop 83
is output after one bit time. At that time, the start code SC disappears, so the AND circuit 84 becomes operational, and the memory of the delay flip-flop 83 is self-held. Therefore, when a key is being pressed on the lower keyboard (keyboard for playing a chord tone), the output of the delay flip-flop 83 is a DC signal "1" and is used as the lower keyboard key press memory signal MLK. In addition, the output "1" of the delay flip-flop 83 passes through an OR circuit 85 and an AND circuit 86, and then passes through an OR circuit 85 and an AND circuit 86.
Used as a KO. In the lower keyboard note secondary memory 75, key press memory signals "1" are output from the memory positions (75C, 75E, and 75G in the example of FIG. 9) corresponding to the note names pressed on the lower keyboard, respectively. , the output from other storage locations is "0". This secondary memory 7
The memorized outputs of the five note names are read in parallel into twelve memory stages of the scanning circuit 87. A load pulse _SY12 having a width of 1 bit time is applied to the read control line 88 of the scanning circuit 87 from the shift register 89 shown in FIG. 5 every 12 bit times. The first storage stage 87-1, the second storage stage 87-2 and the final 12th storage stage 8 of the scanning circuit 87
7-12 is shown in detail, but the third to eleventh storage stages 87-3 to 87-11 are not shown.
also have the same configuration. The configuration is such that the output of the previous stage storage circuit, that is, the delay flip-flop 90, is stored in the next stage delay flip-flop 90 via the next stage data circulation AND circuit 91 and OR circuit 92. The output of flip-flop 90 is applied via circulation line 94 to data circulation AND circuit 91 of first stage 87-1. Furthermore, the memory output of each note name from the lower keyboard note secondary memory 75 is added to the data reading AND circuit 93 of each stage. That is, the scanning circuit 87 is a parallel input, serial shift type circular shift register, and the shift clock is a delay flip-flop 9.
This is a clock pulse with a period of 24 μs that drives 0. The AND circuit 93 for data reading in each stage of the scanning circuit 87 becomes operational when the load pulse SY ₁₂ on the reading control line 88 is "1", and the AND circuit 91 for data circulation operates when the load pulse SY 12 on the reading control line 88 is "_1" .
Operation is enabled by the output "1" of the inverter 95 when is "0". The number of stages of the scanning circuit 87 is 12.
It takes 12 bit times to circulate the data once. Also, load pulse
Since SY ₁₂ is generated every 12 bit times, one cycle (scan) is completed in scanning circuit 87 each time load pulse SY ₁₂ is generated. The scanning circuit 87 is connected to the lower keyboard note secondary memory 75.
It functions to scan the data of each pitch name C to B stored in each storage location 75C to 75B. Third
The table shows the scanning state of each pitch name data in the scanning circuit 87.

[Table] As shown in Table 3, 1 bit time after the load pulse SY ₁₂ is generated, the first stage 87-1 holds the data of the highest note B, and the data of the highest note B is stored thereafter in order of high note, A#,
Data of A...C# are held in stages 87-2 to 87-11, and data of the lowest note C is held in the final stage 87-12. Thereafter, the data on the high note side is transferred in order from the low note side to the high note side every 1 bit time, and after 12 bit times, the data of the highest note B is held in the final stage 87-12, and the data is transferred from the first stage 87-1 to the stage 87-11.
Until then, data from A# to C is held in pitch order.
The data of each note name C to B circulating in the scanning circuit 87 is a signal "1" for the note name whose key press is stored in the secondary memory 75, and a signal "0" for the other notes. It is. The intervals between each stage in the scanning circuit 87 correspond to pitches. If the note name whose data is held in the final stage 87-12 is a root note (interval of 1 degree), the note name held in the 10th stage 87-10 has an interval of a major second, and 9 The second stage 87-9 is a minor third interval,
The seventh stage 87-7 is a perfect fourth interval, the fifth stage 87-5 is a perfect fifth interval, the third stage 87-3 is a major sixth interval, and the second stage 87-2 is a minor seventh interval. Corresponds to pitch. The chord detection logic 96 receives a signal S corresponding to various pitches taken out from a predetermined stage of the scanning circuit 87.
1 to S7b, the chord name (root note name) of the chord formed by pressing the keys on the lower keyboard (chord tone playing keyboard) is detected in a time-division manner. The pitch signal used by the chord detection logic 96 is transmitted to the scanning circuit 87.
1st interval signal S1 taken out from the final stage 87-12, major 2nd interval signal S indicating that no major 2nd interval signal is held in stage 87-10.
2. Minor third interval signal S3b taken from stage 87-9; perfect fourth interval absent signal S4 representing that stage 87-7 does not hold a perfect fourth interval signal S4 taken from stage 87-5; A perfect fifth interval signal S5 is issued, and a major sixth interval signal S indicating that no major sixth interval signal is held in stage 87-3.
6, and the minor seventh interval signal S7b taken out from stage 87-2. AND circuit 9 in code detection logic 96
7 is for detecting a chord (major chord or minor chord) that includes a pitch of a perfect fifth. The basic logical formulas in the AND circuit 97 are S1.S2. S4. S5.S6 ......Logical formula (1) shows that when the keys of the 1st interval (root note) and the perfect 5th interval are pressed at the same time, the major 2nd interval, perfect 4th interval, and major 6th interval The condition for detection is that the key is not pressed. The AND circuit 98 is for detecting a chord (seventh chord or minor seventh chord) including a minor seventh pitch. AND circuit 9
The basic logical formulas in 8 are S1.S2. S4. S6. S7b ... is the logical formula (2), and when the keys of the first interval (root note) and the minor seventh interval are pressed at the same time, the keys of the major second interval, perfect fourth interval, and major sixth interval are held down. The condition for detection is that the key is not pressed. Note that when the "custom function" or "finger code function" is selected, the custom function selection signal CA or finger code function selection signal FC from the function decoder 47 (FIG. 4) is output to the OR circuit 99 ( Figure 4) summarizes the results. The combined signal FC+CA is applied to the AND circuits 97 and 98 via line 100, so that the circuits 97 and 98 are capable of code detection operation only in the case of the "custom function" or the "finger code function". In addition, the load pulse SY ₁₂
When this occurs, the AND circuit 105 becomes inoperable due to the output "0" of the inverter 95, and the memory of the delay flip-flop 103 is cleared. When the memory of delay flip-flop 103 is cleared, the output of inverter 104 becomes "1" and AND circuits 97 and 98 become operational. When the code detection conditions (logical formula (1) or (2)) and operating conditions described above are satisfied, the AND circuit 97 or 98 performs scanning in the scanning circuit 87 when the logical formula (1) or (2) is satisfied. A signal "1" with a 1-bit time width is output in accordance with the timing. These outputs are put together by an OR circuit 101, and the code detection signal is
It becomes a CD. Further, the output of the OR circuit 101 is passed through the OR circuit 102 to the delay flip-flop 103.
is memorized. The signal "1" stored in the delay flip-flop 103 is self-held via the AND circuit 105 until the next load pulse SY ₁₂ is applied. Therefore, if a code detection signal is generated from either AND circuit 97 or 98 first, delay flip-flop 103 is set, so that the signal is output from AND circuit 97 via inverter 104.
and 98 become inoperative. Therefore, the load pulse
Even if the above logical formula (1) or (2) is satisfied many times during one period of SY ₁₂ (that is, during one scan), the logical formula (1) or (2) is satisfied for the first time. Only when satisfied is the code detection signal CD generated. The fact that formula (1) or (2) is satisfied many times means that multiple codes are detected, and in such a case, the presence of delay flip-flop 103 causes the first code detected to be Only the code preferentially produces the code detection signal CD. This priority depends on the scanning order of each note name in the scanning circuit 87. As is clear from Table 3, the scanning circuit storage stage 87-12 corresponding to the 1st interval (root note)
initially contains the data of C note, then C#,
Scanning proceeds in order from the bass side, such as D, D#...B. Therefore, in this embodiment, chords on the lower note side of the 12-note scale are preferentially detected. Now, since the generation timing of the chord detection signal CD is synchronized with the scanning timing of the scanning circuit 87, the root note name of the chord detected by the chord detection logic 96 is determined based on the generation timing of the chord detection signal CD. The pitch names of the data held in the final stage 87-12 of the scanning circuit corresponding to the root note are shown in relation to the load pulse _SY12 as shown in FIGS. 10a and 10b.
As shown in the _figure , C, C#,
The root note names sequentially move from the bass side to the treble side in the order of D...B. Therefore, the root note name can be determined based on how many bit times the chord detection signal CD is generated after the load pulse _SY12 is generated. The shift register 89 (FIG. 5) that generates the load pulse _SY12 shifts a single signal "1" in synchronization with the scanning of the scanning circuit 87, and the signal "1" is transferred to the 12th stage of the shift register 89. 1'', a load pulse SY ₁₂ is provided via line 88. At the same time, since all stages from the first stage to the 11th stage are "0", the output of the NOR circuit 106 (FIG. 5) becomes "1", and "1" is read into the shift register 89. At the 1st bit time after the load pulse SY ₁₂ is generated, the signal "1" is held in the first stage of the shift register 89, and the note name encoder 107 consisting of four OR circuits outputs the note code "1110" representing the C note. Data _N〓1 to _N〓4 are output. At the next bit time, the signal "1" moves to the second stage of the shift register 89, and the note name encoder 107 outputs the note code data N of the C# note as "0000".
Outputs ₁ to N= ₄ . Thereafter, as the bit time advances, note codes are generated in order from the lowest note, such as D, D#...B. FIG. 10c shows the generation timing of note codes N〓 ₁ to N〓 ₄ corresponding to each note name from the note name encoder 107, and the timing of each note name is formed in a time-division manner. . The pitch name encoder 107 is synchronized with the scanning in the scanning circuit 87, and the root note name of the chord detected by the chord detection logic 96 matches the note name of the output note code of the note name encoder 107. In other words, the code detection signal CD is OR circuit 1
08 (FIG. 3) and is made available for use as the root note detection signal RT. At the same timing as the generation timing of this root note detection signal RT, the note name encoder 10
The note name of the note chord output from 7 matches the root note name of the chord detected by the chord detection logic 96. As described above, the scanning circuit 87 and chord detection logic 96 are used to detect a chord formed by pressing a key on the lower keyboard, and a chord detection signal with a width of 1 bit time is generated at a timing corresponding to the root note name of the detected chord. Generate CD and root note detection signal RT. In this embodiment, there are four types of chords that can be detected: "major", "minor", "seventh", and "minor seventh". The type of chord depends on whether the chord detection signal CD satisfies either the above logical formula (1) or (2), and the data of the minor third interval when the chord detection signal CD is generated. is the stage 8 corresponding to the minor third interval of the scanning circuit 87.
This can be determined by whether it is included in 7-9. In the case of the finger code function or custom function, the code type detection circuit 109 in FIG.
0 and 111 become operational, and the code type is detected based on the signal provided from the code detection logic 96. The AND circuit 110 is supplied with a minor third interval signal S3 ^b outputted from the stage 87-9 corresponding to the minor third interval of the scanning circuit 87 via a line 112, and is further supplied with a chord detection signal CD line 11.
3. Therefore, the above logical formula (1) or
Short 3 after the code is established according to either (2)
When the degree pitch signal S3 ^b is detected, the AND circuit 11
The output of 0 becomes "1", and the minor detection signal Dm becomes "1" through the OR circuit 114. When the minor detection signal Dm is "1", it is a "minor" or "minor seventh" code. Furthermore, when the above logical formula (2) is satisfied, the AND circuit 98 (third
7th detection signal D via line 115 from
7 is given to the AND circuit 111, and the OR circuit 11
Output from 6. Minor detection signal Dm and seventh detection signal D7
are stored in delay flip-flops 117 and 118, AND circuits 119 and 120 and OR circuit 1
14 and 116, this memory is self-maintained. The delay flip-flop 83 (FIG. 3) outputs the lower keyboard key press memory signal MLK, and the OR circuit 108 (FIG. 3) outputs the root note detection signal RT.
A signal inverted by an inverter 121 is applied to AND circuits 119 and 120. Therefore, each time the root note detection signal RT is generated, the self-holding of the flip-flops 117 and 118 is released, and if the chord detection signal CD is generated at the same time, a new memory is written. Also, when all keys on the lower keyboard are released, the lower keyboard key press memory signal MLK becomes “0”.
Therefore, the delay flip-flops 117, 11
8's memory will be cleared. In this way, the minor detection signal Dm or the seventh detection signal D7 is stored and held depending on the type of the detected chord. When only the minor detection signal Dm is generated, it is a minor chord (minor triad), and when only the seventh detection signal D7 is generated, it is a seventh chord. When the minor detection signal Dm and the seventh detection signal D7 are both occurring, it is a minor seventh chord, and when both the detection signals Dm and D7 are not occurring, but the chord detection signal CD is occurring, it is a major chord. The minor detection signal Dm passes through the line 122, and the signal m+7, which is a combination of the minor detection signal Dm and the seventh detection signal D7 by the OR circuit 123, passes through the line 1.
24, the signal m.7 which is a combination of the minor detection signal Dm and the anti-seventh detection signal 7 inverted by the inverter 125 in the AND circuit 126 passes through the line 127, and the seventh detection signal D7 passes through the line 128 to the base. System follower selection gate section 12
9 respectively. When the single finger function is selected, the AND circuits 130 and 131 of the code type detection circuit 109 are activated by the single finger function selection signal SF from the AND circuit 50 of the function decoder 47 (FIG. 4). It becomes operational. As described above, the minor selection signal is applied from the OR circuit 53 to the AND circuit 130 via the line 54, and the seventh selection signal is applied from the OR circuit 56 to the AND circuit 131 via the line 57. The output of the AND circuit 130 or 131 passes through the OR circuit 114 or 116, becomes a minor detection signal Dm or a seventh detection signal D7, and is supplied to the subordinate tone selection gate section 129. Root note detection when chord detection is not possible or when the single finger function is used If the above logical formulas (1) and (2) are not satisfied in the chord detection logic 96 (Figure 3) or when the single finger function is used, the lower keyboard The name of the note on the bass side pressed in is regarded as the root note, and a root note detection signal RT is generated. The output of the scanning circuit final stage 87-12 corresponding to the 1 degree interval is applied to the AND circuit 132, and is stored in the delay flip-flop 134 via the AND circuit 132 and the OR circuit 133. The memory of the delay flip-flop 134 is an AND circuit 1.
35. Scanning circuit stage 87-1 during one scanning period (12 bit time)
The signal "1" first outputted from the inverter 136 is stored in the delay flip-flop 134 via the AND circuit 132, and once stored, the output of the inverter 136 becomes "0", so the AND circuit 132 becomes inactive. . When the load pulse _SY12 becomes "1" at the beginning of the scanning period, the AND circuit 135 becomes inactive via the inverter 95, and the delay flip-flop 134 is cleared. The pitch name data held in the final stage 87-12 of the scanning circuit is C→C.
Since the bass note precedes as #→D→...A#→B, an output "1" is generated from the AND circuit 132 corresponding to the timing of the note name of the lowest note being pressed. The output of AND circuit 132 is applied to AND circuit 137. The AND circuit 137 becomes operable when no chord is established on the lower keyboard, and the low-pitched tone signal preferentially selected by the AND circuit 132 is output as a non-chord signal NC. This non-chord signal NC is combined with the chord detection signal CD in an OR circuit 108 to become a root detection signal RT. Therefore, even when the chord detection signal CD is not generated (no chord is detected), the root note detection signal RT is generated by the non-chord signal NC. Note that this root note detection signal RT is used in the "finger chord function" and the "single finger function", but is not used in the "custom function". This is because in the case of the "custom function", the root note of the bass note is specified by the pedal keyboard rather than the lower keyboard. Of course, when the root detection signal RT is generated by the non-chord signal NC, the chord detection signal CD and the seventh detection signal D7 are not generated, so the AND circuits 110 and 11 of the chord type detection circuit 109 (FIG. 4) are not generated.
1 does not work. Memory of chord detection signal The delay flip-flop 138 in FIG. 3 is a circuit that memorizes that a chord has been established. Once a chord is established, the memory continues until another key is pressed. In other words, the code detection logic 96
When the code detection signal CD is generated from the OR circuit 101, a signal "1" is stored in the delay flip-flop 138 via the OR circuits 139 and 140, and the storage is self-held via the AND circuit 141. When a key is pressed on the lower keyboard, the AND circuit 86
(FIG. 3), a key press signal KO is generated (KO rises to "1"), and when the key is released, the signal KO falls to "0". This key press signal KO is the differential circuit 1
42, and one pulse with a one bit time width is generated at the rising edge of the signal KO. This one pulse is inverted by the inverter 143 and becomes "0", making the AND circuit 141 inoperable. During key depression and key release (when KO falls from "1" to "0"), the output of the differentiating circuit 142 remains "0", so the output of the inverter 143 is "1", and the AND The circuit 141 is enabled and the code detection signal CD stored in the delay flip-flop 138 is self-held. Therefore, the delay flip-flop 138 is cleared only at the beginning of a key press (the beginning of a key press from the viewpoint of the entire keyboard), but is not cleared when the key is released. The storage output of delay flip-flop 138 is inverted by inverter 144 and then applied to AND circuit 137 to control the generation of non-code signal NC. That is, once it is detected that the code is established and the code detection signal CD is stored in the delay flip-flop 138, the AND circuit 137
becomes inactive and non-code signal NC is not generated. An example of operation related to delay flip-flop 138 for storing code detection signals is shown in FIG. The time relationships among the signals shown in FIG. 11 are not precisely shown in units of system clocks (in units of bit time). The diagrams are schematically shown to the extent that the temporal relationship between the rise and fall of each signal can be understood. When a key is pressed to form a chord on the lower keyboard, the key press signal KO rises (see FIG. 11a), the differentiator circuit 142 operates, and the inverter 14
3 generates a "0" pulse for memory clearing (FIG. 11b). Therefore, delay flip-flop 1
38 memory is cleared (FIG. 11c). In the scanning circuit 87, data corresponding to one pitch is scanned from the bass side (starting from the C note), so the first one
During the scanning period (12 bit time), the non-code signal NC may occur only once before the code detection signal CD occurs (see FIG. 11d).
However, if a chord is established, the chord detection signal CD is always generated during the first scanning period, so the chord detection signal CD is generated at the timing corresponding to the note name of the root note of the chord (see Figure 10 b). CD is generated and stored in delay flip-flop 138 (see Figures 11c, e). Thereafter, the memory of the delay flip-flop 138 is self-held, and the code detection signal CD is generated every 12 bit times as shown in FIG. 11e. As will be described later, only when the root detection signal RT corresponding to the non-chord detection signal NC or the chord detection signal CD is given twice for the same note name, it is treated as a true root detection signal RT, and is not used for musical tone generation. I am trying to use it, so
Non-code signal NC only once as shown in Figure 11d
There is no problem even if this occurs. Figure 11 f shows keys C, E, pressed in chord form.
This is a somewhat exaggerated illustration of the state in which the three notes of G are released.As human finger movements vary, it is normal for the timing of the release of the three notes to be off when viewed microscopically. be. Suppose that the delay flip-flop 138 for storing the chord detection signal is cleared when the C note is first released and the chord is no longer established. No code signal by key
NC may occur, which may result in undesired strange sounds.
To prevent such inconvenience from occurring,
Code detection signal storage delay flip-flop 138
The self-maintenance clearing is performed at the start of a key press. Key press memory for pedal keyboard In FIG. 3, when a key code related to the pedal keyboard is supplied from the key coder 26, the AND circuit 6
The output of 0 becomes “1” and the pedal keyboard detection signal
PK occurs. When the custom function is selected, the AND circuit 313 is enabled,
Delay flip-flop 3 via OR circuit 314
At step 15, key presses on the pedal keyboard are stored. When the custom function selection signal CA is "1", the output of the OR circuit 316 in FIG. 4 becomes "1", and the line 317
The pedal keyboard memorizable signal CAO is applied to the AND circuit 313 via the . Memorable signal CAO is
Even when automatic bass chord performance is turned off, it is generated from the AND circuit 318 in the function decoder 47 via the OR circuit 316. The memory of delay flip-flop 315 is self-maintained via AND circuit 319. Like the delay flip-flop 71 for the lower keyboard, the delay flip-flop 315 serves as a primary memory, and when a star chord SC occurs, the memory is transferred to the delay flip-flop 320, which serves as a secondary memory. The delay flip-flop 320 converts the pedal keyboard detection signal PK into a direct current, and continuously outputs a signal "1" (key press memory) while the pedal keyboard keys are being pressed. The pedal keyboard key press signal stored in delay flip-flop 320 is applied to OR circuit 85. Storing the key code data of the pedal keyboard corresponding to the root note of the bass note in the custom function In the case of the custom function, the pedal keyboard 29 (second
Data processing is performed in the key code processing section 42 based on the key code of the single note selected in the figure), and the data is processed to have a predetermined pitch with respect to the note corresponding to the root note selected with the pedal keyboard 29. A key code of a sound corresponding to a subordinate note is created for bass note performance. In the key code processing unit 42 shown in FIG. 5, first, key code data (note codes N ₁ to _{N 4} and octave codes B ₁ to _{B 3} ) regarding the pedal keyboard 29 supplied from the key coder 26 is stored. Create key code data for subtone by changing the data. The memorized key code data for the root note is used as is. The root sound here,
The subtone refers to the pitch relationship of the bass notes that are played in a distributed manner. The key code related to the pedal keyboard is Keycoder 2.
6, the output of the AND circuit 60 (FIG. 3) becomes "1", and the pedal keyboard detection signal PK is applied to the AND circuit 146 of FIG. 5 via the line 145. A custom function selection signal CA is applied to the other input of the AND circuit 146 via a line 147 from an AND circuit 48 of a function decoder 47 (FIG. 4). The output "1" of AND circuit 146 enables AND circuits 148, 149, 150, and 151, respectively, and also enables lines 152, 150, and 151, respectively.
The AND circuits 157 for reading data in the octave code memories 154, 155, and 156 are enabled through the OR circuit 153, respectively. Although only the octave code memory 154 is shown in detail, the other memories 155 and 156 also have the same configuration as the memory 154. Data N ₁ , N ₂ , N ₃ , and N ₄ of each bit of the note code given from the key coder 26 are added to the other inputs of the AND circuits 148, 149, 150, and 151, respectively, and this output is sent to the note code memory. The husband and husband are stored in 158, 159, 160 and 161. Although only the note code memory 158 is shown in detail, the other memories 159, 160, and 161 have the same configuration. Note code memory 158-16
1 is the data of each bit of the note code given via the AND circuit 148 or 149 to 151.
N ₁ to _{N 4} are stored in a delay flip-flop 163 via an OR circuit 162, and the memory is self-held via an AND circuit 164. Said AND circuit 1
The output of 46 becomes "1", and the AND circuit 148~
When data for reading is given from 151,
A signal “0” is supplied to the self-holding clear line 167 via the OR circuit 165 and the inverter 166,
The self-holding AND circuit 164 is made inactive and the memories in each of the memories 158 to 161 are rewritten. The octave code memories 154, 155, and 156 are for storing data B ₁ , B ₂ , and B ₃ of each bit of the octave code given from the key coder 26, respectively.
Each bit of data B ₁ , B ₂ , and B ₃ is added to the other inputs of the AND circuit 157 for reading data. Data output from the data reading AND circuit 157 in each memory 145 to 156
B ₁ , B ₂ , and B ₃ are stored in a delay flip-flop 169 via an OR circuit 168, and the memory is self-held via a self-holding AND circuit 170. When the data reading AND circuit 157 becomes operational, the output "1" of the OR circuit 153 is inverted by the inverter 171, and the self-holding clear line 172
The self-holding AND circuit 170
is made inoperable and the memories in each of the memories 154 to 156 are rewritten. AND circuits 148 to 151 and 157 for reading data from each note code memory 158 to 161 and each octave code memory 154 to 156
is the pedal keyboard detection signal when the custom function is selected.
Since operation is possible only when PK occurs, the note code N ₁ of the note pressed on the pedal keyboard 29
~ _N4 and data of octave codes _B1 ~ _B3 are stored in the memories 158~161, 154~156, respectively. That is, in the custom function, data of a note to be the root note of the bass note selected with the pedal keyboard 29 is stored in the note code memories 158-161 and the octave code memories 154-156. Bass Sound (Pedal Keyboard Sound) Generation Command Each of the note code memories 158 to 161 is provided with an exclusive OR circuit 173 for detecting a match between previously stored data and next read data. This is because only when the same data is stored in the note code memories 158 to 161 twice or more consecutively, that data is used as data of a note corresponding to a true root note. Match signal if the same data is stored twice in a row
EQ is generated, and based on this matching signal EQ, generation of a bass sound (pedal keyboard sound) is instructed. If the data is stored only once, match signal EQ
is not generated, and the generation of sounds associated with that data is canceled. In each note code memory 158 to 161, the exclusive OR circuit 173 receives the previous root note data (output of the flip-flop 163) stored in the delay flip-flop 163 and the data from the OR circuit 162 that is about to be stored in the delay flip-flop 163. New root note data (input to flip-flop 163) are respectively input. When data with the same note name is stored in the memories 158 to 161 twice in a row, the input and output data of the delay flip-flop 163 match, so that each memory 158 to 1
The outputs of the 61 exclusive OR circuits 173 are all "0". The output “0” of the exclusive OR circuit 173 of each of these memories 158 to 161 is output to the NOR circuit 17.
4 and generates a coincidence signal EQ, the operating condition of the NOR circuit 174 is established when the output of the inverter 166 (self-holding clear line 167) and the system off signal OFF are "0". When the system off signal OFF is "0", it means that the system is not turned off, that is, one of the custom function, single finger function, or finger code function is selected. The system off signal OFF becomes "1" when the conditions of the AND circuit 175 of the function decoder 47 shown in FIG. 4 are satisfied. When the output of the inverter 166 is "0", it means that the memory in the note code memories 158 to 161 is rewritten, and the data to be newly stored, which is the target of match detection in the exclusive OR circuit 173, is It means given. In this way, when all the inputs of the NOR circuit 174 become "0", the output "1" is output from the line 1 as the match signal EQ.
76 and is applied to a delay flip-flop 178 via an OR circuit 177. Match signal delayed by one bit time in delay flip-flop 178
EQ ₁ is stored in a delay flip-flop 181 via an AND circuit 179 and an OR circuit 180, and its memory is self-held via an AND circuit 182.
An anti-start code signal is applied to the AND circuits 179 and 182, and when the start code SC is supplied from the key coder 26 at predetermined intervals, the AND circuit 183 in FIG. 3 detects this start code, and the inverter 184, An anti-start code signal of signal "0" is supplied via line 185 to disable AND circuits 179 and 182. Therefore, when the star code SC is applied, the self-holding of the delay flip-flop 181 is released. The generation of the coincidence signal EQ will be explained by taking as an example the case where the pedal keyboard detection signal PK is generated in response to the _G2 tone of the pedal keyboard, as shown in FIG. 9d. Corresponding to the first pedal keyboard detection signal PK, data representing the G note is stored in the note code memories 158 to 161 (Fig. 9g), and data representing the G note is also stored at the time of the next pedal keyboard detection signal PK. Therefore, as shown in Fig. 9h, the coincidence signal
EQ is generated. When the match signal EQ ₁ delayed by one bit time is stored in the delayed flip-flop 181 as shown in FIG.
rises after one bit time of signal EQ ₁ , as shown in FIG. 9j. A signal obtained by inverting the memory match signal EQM by an inverter 186 is applied to an AND circuit 187. The coincidence signal EQ ₁ is also applied to the AND circuit 187 . A bass sound generation timing signal BT is applied to the remaining inputs of the AND circuit 187 from the circuit shown in FIG. 4 via a line 188. Bass sound generation timing signal BT
The signal becomes "1" at the timing at which a bass tone should be automatically generated, regardless of its pitch (regardless of whether it is a root tone or a subordinate tone). Therefore, as shown in FIG. 9k, for example, the AND circuit 187 is enabled to operate while the bass sound generation timing signal BT is being generated, and at this time, the delayed match signal EQ ₁ and the memory match signal EQM are inverted. When the condition with the signal is satisfied, the output of the AND circuit 187 becomes "1" as shown in FIG. 9l. The output "1" of this AND circuit 187 is the bass sound (pedal keyboard sound) generation command signal PE. The stored match signal EQM, which becomes "1" after one bit time of the delayed match signal _EQ1 , is self-held until the start code SC is generated. Therefore, the start code SC
The conditions for the signal EQ _{1 and the inverted signal are satisfied only when the delayed match signal EQ 1 is} generated for the first time in one generation period. Therefore, while the bass sound generation timing signal BT is being generated, the start code is
Only one base sound generation command signal PE is generated in one generation section of SC. The base sound generation command signal PE is delayed by one bit time from the generation of the coincidence signal EQ. Further, the note codes N ₁ to _{N 4} that generated the coincidence signal EQ are output after being delayed by one bit time in the delay flip-flops 163 of the memories 158 to 161, and at the same time, the octave codes B ₁ corresponding to these note codes N ₁ to N ₄ are output.
~ _B3 is also output after being delayed by one bit time in the delay flip-flop 169 of the memories 154-156. Therefore, the note code memories 158 to 161 and the octave code memories 154 to 156 store the sound data corresponding to the root note of the bass note (the key code data of the notes pressed on the pedal keyboard 29) to the memories 158 to 161. and 154-156
The timing output from the base sound generation command signal PE coincides with the timing output from the base sound generation command signal PE. Key code processing Data representing notes and octaves of notes corresponding to root notes stored in note code memories 158 to 161 and octave code memories 154 to 156 are on lines 189, 190, 191, 19.
Adder 1 via 2, 193, 194 and 195
95,196,197,198,199,200
and 201, respectively. Adder 195-1
99 is a 1-bit full adder, adders 200, 20
1 is a 1-bit half adder, and the carry signal CR of the adder 1 bit below is input to the adder 1 bit above, making the adder 7 bits as a whole. In addition, octave code memories 154, 15
5,156 output lines 193, 194, 195
The signals are input to adders 199, 200, and 201 via AND circuits 202, 203, and 204. AND circuits 202 to 204 output a custom function selection signal CA and the bass sound generation timing signal.
When the AND circuit 205 operates on the condition that both PEs are "1", the output "1" from the AND circuit 205 provided via the OR circuit 206 enables the operation. Adders 195 to 201 include note code memories 158 to 161 and octave code memory 15.
For the key code data N ₁ -B ₃ corresponding to the root notes supplied from keys 4 to 156, the subordinate tone forming data SD 1 to _{SD 5 supplied} from the subordinate tone forming data generating section 40 shown in FIG. are added to create key code data corresponding to the subtone. The least significant bit SD ₁ of the subordinate tone forming data is added to the adder 195 corresponding to the least significant bit N ₁ of the note code, and the bit above it is added to the adder 195 corresponding to the least significant bit N 1 of the note code.
SD ₂ to SD ₄ are added to adders 196 to 198 corresponding to the upper bits N ₂ to _{N 4} of the note code, respectively, and the most significant bit SD ₅ is added to adder 199 corresponding to the least significant bit B ₁ of the octave code. . The subordinate sound formation data SD ₁ to _{SD 5} are the data
This value corresponds to the pitch that the secondary tone that is to be created using SD ₁ to _{SD 5} has relative to the root note. This data SD ₁ to _{SD 5} is added to the lower bit data N ₁ to B ₁ of the key code corresponding to the root note to create key code data corresponding to the subordinate note. note code
_N1 to _N4 are not set so that the difference in note code of each note name directly corresponds to the pitch between each note name. This is because note code _N1 to _N4 data is 4 bits and can take 16 values from "0000" to "1111", while the number of note names in one octave is 12 notes. It is from. Said first
As you can see from the table, the note code
In N ₁ to _{N 4} , the four data “0011”, “0111”, “1011”, and “1111” where bits N ₁ and N ₂ are both “1” are not used, and the remaining 12 data are Data is assigned to 12 sounds. Since the number of semitone intervals in one octave is 12, the values of subordinate tone formation data SD ₁ to SD ₄ (excluding bit SD ₅ corresponding to one octave interval) are also the same as the note codes N ₁ to _{N 4} above. It is convenient to set it corresponding to the value. In other words, without using the four data “0011”, “0111”, “1011”, and “1111” corresponding to decimal numbers “3”, “7”, “11”, and “15”, the remaining The 12 types of data are assigned according to the pitch size as shown in Table 4 below.

[Table] Next, note codes N ₁ to _{N 4} are extracted again and shown in Table 5.

[Table] In Table ₅ , each note name can be divided into _four groups, . Then, the sounds in each group can be divided into different groups such as "a", "b", and "c" in order from the lowest value (lowest sound). Here, each note code N ₁ to _{N 4} shown in Table 5
Data for subordinate tone formation shown in Table 4 for SD ₁ ~
Let's assume that SD ₄ is added. Then, the note codes N ₁ to _{N 4} of the notes of group “a” (C#, E, G, A#) are all data for forming subordinate notes.
It can be seen that the values for SD ₁ to _{SD 4} are such that it is possible to obtain note code data of a predetermined follower tone having the expected pitch. Therefore, if any of the notes in group "a" is the root note, the note code memory 158 is sent via lines 189 to 192 in adders 195 to 198.
Data for forming subordinate notes for the note codes N ₁ to _{N 4} of the notes of the group “a” supplied from ~161
By simply adding SD ₁ to SD ₄ , note code data AN ₁ to _{AN 4} corresponding to the desired subtone can be created. Also, the sounds of group “b” (D, F, G#,
When adding subordinate tone formation data SD ₁ to _{SD 4} corresponding to the intervals of major 2nd, perfect 4th, minor 6th, or major 7th to note codes N ₁ to N ₄ in B),
The addition result is data that is not used for note codes N ₁ to _{N 4} (decimal numbers 3, 7, 11, or
15) When adding subordinate tone formation data SD ₁ to _{SD 4} corresponding to pitches other than those listed above,
It is possible to obtain note code data of a predetermined subtone having a predetermined pitch. For example, if you add the numerical value "4" of the minor third interval data to the numerical value "1" corresponding to the D note, the addition result will be "5", which means that the F note has an interval of a minor third with respect to the D note. You can get the note code data of the sound. However, when the numerical value "2" of the major second interval data is added to the numerical value "1", the addition result becomes "3", which is data that is not used for note codes _N1 to _N4 . The note that has a major second interval to the note D is E.
Since it is a sound, the addition result must be the number "4". This can be done by adding "1" to the above addition result "3". Therefore, if the note of group "b" becomes the root note, it is necessary to perform numerical correction of the data as necessary when performing addition in adders 195-198. This numerical correction is performed by adding the numerical value "1" from the numerical value correction circuit 207 of FIG. 5 to the adder 195 via line 208. In other words, for the note chords N ₁ to _{N 4} of the notes in group “b”, major 2nd, perfect 4th, etc.
Adders 195 to 198 add subordinate tone forming data SD ₁ to _{SD 4} corresponding to intervals of degrees, minor 6ths, or major 7ths.
In the case of just adding, the addition result is the number "3" that is not used in note codes N ₁ to N ₄ ,
It becomes "7", "11" or "15". However, by adding the numerical value "1" for correction via line 208, the above addition result becomes the numerical value "4",
Correct note code data is created for notes that are corrected to “8”, “12” or “0 (16)” and have an interval of a major 2nd, perfect 4th, minor 6th or major 7th relative to the root note. It will be done. As is clear from Table 5, the notes in group “b” above are based on the lowest bit data N ₁ of the note code.
The logical value of is "1". Therefore, the signal on the output line 189 of the note code memory 158 corresponding to bit _N1 is applied to the AND circuit 209 of the numerical correction circuit 207, and if the root note belongs to the group "b", the AND circuit 209 is applied. Make it operational. In addition, as shown in Table 4, the second bit from the bottom of the subordinate tone formation data for the intervals of the major 2nd, perfect 4th, minor 6th, and major 7th, SD ₂ , has a logical value of "1". Therefore, the data SD ₂ is added to the other input of the AND circuit 209. The AND circuit 20
When the operating condition 9 is satisfied, a signal “1” is output, and a numerical value “1” for numerical correction is added to the adder 195 via the OR circuit 210 and the line 208. Next, for note codes N ₁ to _{N 4} of group “c” notes (D#, F#, A, C) shown in Table 5 above, the minor 2nd and major 3rd shown in Table 4 above are applied. , complete 5
When adding the subordinate tone forming data SD ₁ to _{SD 4} corresponding to the interval of a degree or a minor seventh, the result of the addition is the data not used for note codes N ₁ to N ₄ (decimal value 3 , 7, 11 or 15). Similarly to the above, for the note codes N ₁ to _{N 4} of the notes in group "c", data SD for forming subordinate notes for the intervals of the major 2nd, perfect 4th, minor 6th, or major 7th shown in Table 4 above. When ₁ to SD ₄ are added, the result of their addition is the original relationship above (length 2
This causes the inconvenience that the tone will be a semitone lower than the note in the 4th degree, perfect 4th, etc.). Therefore, as in the case of group "b", the adder 195 is connected from the numerical value correction circuit 207 via the line 208.
It is necessary to perform numerical correction by adding the numerical value "1" to However, it is not necessary to perform numerical correction on data for forming subordinate notes for intervals other than the above (1st, minor 3rd, diminished 5th, and major 6th). As shown in Table 5 above, the data of the second bit from the bottom of the note code of group “c”
Since the logical value of _N2 is "1", the signal of the output line 190 of the note code memory 159 is added to the AND circuits 211 and 212 of the numerical correction circuit 207, and the note belonging to the above group "c" corresponds to the root note. If so, the AND circuits 211 and 212 are enabled. In addition, as shown in Table 4 above, the least significant bit data of the subordinate tone formation data corresponding to the intervals of the minor 2nd, major 3rd, perfect 5th, or minor 7th.
The logical value of SD ₁ is “1”, major second, perfect fourth
The logic value of the second bit data _SD2 of the subordinate tone forming data corresponding to the interval of a degree, a minor 6th, or a minor 7th is "1". Therefore, the least significant bit data SD ₁ of the data for forming the subordinate tone is sent to the AND circuit 211 and 2
The bit data SD ₂ are respectively applied to the AND circuit 212. As a result, when the operating conditions of the AND circuit 211 or 212 are satisfied, the OR circuit 21
A signal “1” is applied to the line 208 via the signal “1”, and a value “1” for numerical correction is added to the adder 195. For example, if the root note is D#, and data corresponding to the interval of a major third is given as subordinate tone forming data SD ₁ to SD ₄ , the data on line 190
Since both N ₂ and data SD ₁ are “1”, the operating conditions for the AND circuit 211 are satisfied, and a signal “1” is supplied via the line 208. Therefore, adder 1
Expressing the addition from 95 to 198 in decimal notation is:
"2+5+1=8", and the note code data of the G note, which is a major third interval higher than the D# note, is obtained as the addition result. Adder 195 corresponding to note codes N ₁ to _{N 4}
When the addition result in steps 198 to 198 exceeds the decimal number "16", a carry signal CR is output from the adder 198 and is applied to the adder 199 corresponding to one octave pitch. Adder 199 for octave code processing
In 201, octave code memory 15
For the octave codes B ₁ to _{B 3} of notes corresponding to the root notes stored in 4 to 156, the adder 19
The carry signal CR from No. 8 and the follower tone forming data SD ₅ (see the lower column of Table 4 above) corresponding to one octave pitch are added. Generation of data for forming subordinate notes The data for forming subordinate notes SD ₁ to _{SD 5} are transferred from the interval numerical value memory 213 in FIG. 4 to the delay flip-flop 21.
4 to adders 195 to 199 in FIG. The pitch numerical value memory 213 stores data SD ₁ , for example.
It is an encoder consisting of 5 OR circuits corresponding to each bit of SD ₅ , and it is a base-based follower sound selection gate section 129 or a base-system follower sound selection gate section 21.
In response to the output of 5, subordinate tone forming data SD ₁ to _{SD 5} having values as shown in Table 4 are read out. The bass follower tone selection gate section 129 includes a plurality of AND circuits corresponding to various pitches. In response to the base pattern pulses T ₁ to T ₁₇ supplied from the base pattern generation unit 41 in FIG.
Data for subordinate tone formation SD ₁ from pitch numerical memory 213
~SD ₅ is read. The NOR circuit 216 normally supplies a signal "1" to each AND circuit in the selection gate section ₁₂₉ to which the base pattern pulses T ₃ to T ₁₇ are applied.
~Allows selection of subtone corresponding to T ₁₇ . Line 122 from code type detection circuit 109,
The minor detection signal Dm, the seventh detection signal D7, the signal m+7, or the signal m/7, which is applied to the bass-based follower tone selection gate section 129 via 124, 127 or 128, determines the length of the pitch of the third, sixth or seventh. used to select. The bass-based subordinate tone selection gate section 129 selects the bass pattern pulses T ₃ to T ₁₇ and the lines 122 and 12.
Signals 2, 3 ^b , 3, ... 7, oct, oct for selecting subordinate tones of various pitches according to the chord type detection signals from 4, 127, 128 in the relationship shown below.
+3 ^b , generates oct+3. In the following, the logical formulas of each AND circuit of the bass subtone selection gate section 129 will be described and an explanation thereof will be added. Note that, for the sake of simplification of explanation, the output signal of the NOR circuit 216 is excluded from the logical expression conditions. Selection gate section 12 in FIG.
The AND circuit 217 on the left side of 9 will be explained in order. 2=T ₃ (AND circuit 217) The base pattern pulse T ₃ generates the subordinate tone selection signal 2 of the major second interval. 3 ^b = T ₅ · Dm ...... (AND circuit 218) When the minor detection signal Dm (minor third pitch signal S3 ^b ) is generated, the base pattern pulse
T ₅ generates a subordinate tone selection signal 3 ^b of a minor third interval. 3=T ₅ ·Dm (AND circuit 219) When the minor detection signal Dm is not generated, the base pattern pulse T ₅ generates the subordinate tone selection signal 3 of the major third interval. 4=T ₆ The base pattern pulse T ₆ generates a subordinate tone selection signal 4 of a perfect fourth interval. 5 ^b =T ₇ The base pattern pulse T ₇ generates a subordinate tone selection signal 5 ^b of the diminished fifth interval. 5=T ₈ Pulse T ₈ generates a follower selection signal 5 of a perfect fifth interval. 6=T ₁₀ The pulse T ₁₀ generates the subordinate tone selection signal 6 of the major sixth interval. 6 ^b = T ₁₀ ′・(m・7)
...... (AND circuit 220) When the seventh detection signal D7 is not generated and the minor detection signal Dm is generated (that is, 5
When the degree interval minor chord detection signal m·7 is "1"), the pulse T ₁₀ ' generates the minor sixth interval minor chord selection signal 6 ^b . 6=T ₁₀ ′・(m・7)
...... (AND circuit 221) In cases other than the case where the seventh detection signal D7 is not generated and the minor detection signal Dm is generated (that is, the minor chord detection signal m・
7 is "0" (that is, in the case of a major chord, a seventh chord, or a minor seventh chord), the base pattern pulse T ₁₀ ' generates the subordinate tone selection signal 6 of the major sixth interval. 7 ^b =T ₁₁ The base pattern pulse T ₁₁ generates a subordinate tone selection signal 7 ^b of a minor seventh interval. 7 ^b = T ₁₂・(m+7)
......(AND circuit 222) Minor detection signal Dm or seventh detection signal D
7 is occurring (that is, when the detection signal m+7 of the minor chord, the seventh chord, or the minor seventh chord is “1”), the base pattern pulse T ₁₂ is a minor seventh pitch follower selection. Generate signal ^7b . 7=T ₁₂・(+7)
......(AND circuit 223) Minor detection signal Dm or seventh detection signal D
7 is not occurring (that is, the above signal m+7 is “0”), the pulse
T ₁₂ generates the subordinate tone selection signal 7 of the major seventh interval. 7 ^b = T ₁₂ ′・D7 (AND circuit 224) When the seventh detection signal D7 is generated, the pulse T ₁₂ ′ is the subordinate tone selection signal 7 of the minor seventh interval.
generate ^b . 7=T ₁₂ ′·7 (AND circuit 225) When the seventh detection signal D7 is not generated, the pulse T ₁₂ ′ generates the subordinate tone selection signal 7 of the major seventh interval. oct=T ₁₃ The base pattern pulse T ₁₃ generates a subordinate tone selection signal oct at a pitch one octave above the root note. oct + 3 ^b = T ₁₇ · Dm ... (AND circuit 226) When the minor detection signal Dm is generated, the base pattern pulse T ₁₇ generates the subordinate tone selection signal oct + 3 ^b of the minor third interval one octave higher. let oct+3=T ₁₇ (AND circuit 227) When the minor detection signal Dm is not generated, the pulse T ₁₇ generates a subordinate tone selection signal oct+3 of a major third interval one octave higher. As described above, the following tone selection signals 2, ₃ ^b , ₃ . , subordinate sound formation data SD ₁ to predetermined values as shown in Table 4 above
Pitch numerical memory 21 with combinations to obtain SD ₅
It is input to each OR circuit of 3. As _is clear from _the connection of _the interval numerical _{memory 213} in FIG. 00010”
Therefore, (see Table 3 above), AND circuit 21
The subordinate tone selection signal 2 of the major second interval outputted from 7 is inputted only to the OR circuit corresponding to data SD ₂ ,
It is not input to other OR circuits. Note that the base pattern pulse T ₁ corresponds to the root note, and is not directly used in the subordinate note selection gate section 129. This pulse T ₁
is generated (and other pulses T ₃ to _{T 17} are not generated), the following tone forming data SD ₁ to
SD ₅ is “00000” and the adder 195 in FIG.
-201, the root note and octave chord data given from lines 189-195 are output as they are without being changed. Outline of Bass Pattern Generation The bass pattern pulses T ₁ to _{T 17 corresponding to the pitch (total pitch relative to the root note) of the sound (root or subordinate) generated as a bass note are generated by predetermined pulses (T 1 to T 17 )} in each bass pattern. T ₁₇ ) is generated at a predetermined timing and with a predetermined length. The performer selects a desired bass pattern according to the desired rhythm, etc., and generates a bass pattern pulse (T ₁ ~
T ₁₇ ) is generated from the base pattern generating section 41 in FIG. Not only one bass pattern corresponds to one rhythm, but also multiple bass patterns are prepared corresponding to one rhythm.
They are selectable. For example, if it is possible to select 6 types of bass patterns for one rhythm, and 14 types of rhythms can be selected, then 14 × 6 = 84 types of bass patterns can be selected. The base pattern generating section 41 is configured so as to be as follows. Figures 12 and 13 show an example of a bass pattern using notes on a staff notation, assuming that the position of the lower first line (position of C ₄ note) is the root note (1st interval), and each This is a representation of the pitch relationship of subordinate tones on a staff. The length of the note corresponds to the length of the bass note, which corresponds to the interval between the bass pattern pulses (T ₁ to _{T 17} ) generated corresponding to the pitch. Figure 12 shows one of the bass patterns that can be selected when "swing" is selected as the rhythm, and Figure 13 shows one of the bass patterns that can be selected when the rhythm of "march" is selected. It is something. When the bass pattern shown in FIG. 12 is selected by the player, the bass pattern generator 41 in FIG. 6 generates pattern pulses T ₁ , T ₅ , T ₈ , T ₁₀ as shown in FIG. 12a. , T ₁₁ , T ₁₀ , T ₈ , T ₅ are generated sequentially and repeatedly. In the base system follower tone selection gate section 129 (Fig. 4), each pulse
Following tone selection signal 1~ of a predetermined pitch according to _T1 ~ _T11
7 ^b are output in order. In the case of a major or seventh chord, the order is 1→3→5→6→7 ^b →6→5→3 as shown in Figure 12b, and in the case of a minor or minor seventh chord, the order is 1→3→5→6→7 as shown in Figure 12b. As shown in c, 1→3 ^b →5→6→7 ^b →
6→5→3 ^b . The base pattern pulse T ₅ is used to select the interval of the third, and the interval changes to a major third or a minor third depending on the chord type. In the case of a minor chord or a minor seventh chord, the AND circuit 218 of the selection gate section 129 is enabled by the minor detection signal Dm on the line 122 (Fig. 4), and a minor third interval minor chord is generated in response to the pulse _T5. The selection signal 3 ^b is supplied to the pitch numerical value memory 213 . In the case of a major chord or a seventh chord, the minor detection signal Dm is "0", so the AND circuit 219 of the follower selection gate section 129 becomes operational, and the follower selection signal 3 of the major third interval is activated in response to the pulse _T5 . is memory 21
3 is input. The base pattern pulse T ₁₂ ' is used to select a 7th interval that changes depending on whether it is a 7th chord or not. That is, in the case of a seventh chord, the AND circuit 224 of the follower selection gate section 129 is enabled by the seventh detection signal D7 on the line 128, and the follower selection signal ^7b of the minor seventh interval is activated in response to the pulse _T12 '. generated. In the case of a chord other than the seventh chord, the seventh detection signal D7 becomes "0", so the AND circuit 225 of the subordinate tone selection gate section 129 becomes operable and selects the subordinate tone of the major seventh interval according to the pulse _T12 '. A signal 7 is generated. The base pattern pulse _T11 is used when selecting a minor seventh interval regardless of the chord type (see Fig. 12). The base pattern pulse _T12 is used to select a 7th rhyme interval that changes depending on whether it is a major chord or not. That is, in the case of a minor, minor seventh, or seventh chord, the minor detection signal Dm or the seventh detection signal D7 is "1", and the output signal of the OR circuit 123 (m+
7) becomes "1", and the AND circuit 222 of the bass-based follower tone selection gate section 129 becomes operable, thereby generating the follower tone selection signal ^7b of the minor seventh interval in response to the pulse _T12 . . In the case of a major chord, since the output signal (m+7) of the OR circuit 123 is "0", the AND circuit 223 becomes operational, and the subordinate tone selection signal 7 of the major seventh interval is generated in response to the pulse _T12 . The base pattern pulse T ₁₀ ' is used to select the minor sixth interval only in the case of a minor chord.
That is, the fifth-degree interval minor chord detection signal (m·7) output from the AND circuit 126 is "1".
At this time, the AND circuit 220 becomes operable and outputs the following tone selection signal 6 ^b of the minor sixth interval in response to the pulse T ₁₀ '.
is generated. In the case of a major, seventh, or minor seventh chord, the above signal (m・7) is "0", and the AND circuit 221 becomes operable and outputs the following tone selection signal 6 of the major sixth interval in response to the pulse _T10 '. is generated. The base pattern pulse T ₁₀ is used when selecting a major sixth interval regardless of the chord type. The base pattern pulse _T17 is used to select a third interval one octave higher that changes depending on the type of chord. The AND circuit 226 is enabled to operate by the minor detection signal Dm, and the pulse T ₁₇
In response to this, a subordinate tone selection signal oct+ ^3b of a minor third interval one octave higher is generated. Minor detection signal Dm
is "0", the AND circuit 227 becomes operational, and the length 3, which is one octave higher, is activated in response to the pulse _T17 .
A subordinate tone selection signal oct+3 of the degree interval is generated. The bass pattern pulses used in this device not only cover most of the necessary pitches within one octave, but also those corresponding to pitches one octave higher can be used. Moreover, as mentioned above, even when generating follower tone selection signals of the same pitch, different pulses (for example, T ₁₀ and
T ₁₀ ′, T ₁₁ and T ₁₂ , and T ₁₂ ′) can be used as needed, and these pulses can change the pitch according to the chord type, so the bass pattern It is possible to use it in a complex manner depending on the situation. Therefore, it is possible to automatically perform a bass performance in which the pitch changes in a complex manner, such as a "walking bass" performance. The base pattern in Figures 12 and 13 is "Walking".
It is in the form of "Based". By the way, conventional automatic bass performance devices can only play intervals of 1st, 3rd, 5th, and 7th, but only 2nd, 4th, and 6th.
Unable to produce notes such as degrees, he could only perform monotonous bass performances. Figure 13 shows an example of a bass pattern that allows complex bass performances using pulses T ₁₀ ′, T ₁₂ , T ₁₂ ′, etc. whose selected pitch changes depending on the chord type. As shown in FIG. 13a, the pattern pulses T ₁₃ , T ₁₂ , T ₁₀ ', T ₈ , T ₁₀ ,
T ₁₂ ′, T ₁₃ , T ₈ , T ₁₃ , T ₈ , T ₁₀ , T ₁₂ ′ are generated sequentially and repeatedly. In the bass system follower tone selection gate section 129, follower tone selection signals of predetermined pitches are sequentially generated in response to each of the pulses _T13 to _T12 ', and the follower tone selection signals are generated as shown in FIGS. 13b to 13e depending on the chord type. Data for forming subordinate tones SD ₁ to _{SD 5} whose pitch changes as follows are output from the pitch numerical memory 213. In the case of a major code, the pulses T ₁₀ ′, T ₁₂ ,
Since the subordinate tone selection signals 6 and 7 of the major 6th and major 7th intervals are selected by T ₁₂ ', the subordinate tone selection signals are oct→7→6→5 as shown in FIG. 13b. →6→
They are generated in the order of 7 → oct → 5 → oct → 5 → 6 → 7 → ..., and the subordinate sound formation data SD ₅ is generated accordingly.
~SD ₁ is “10000” → “01110” → “01100” →
"01001" → ..., and therefore the bass is played in the following order: a note one octave above the root note → a note a major 7th above the root note → a note a major 6th above the root note → ... progresses. In the case of a seventh chord or a minor seventh chord, a flat symbol is attached to the notes of the seventh interval corresponding to pulses T ₁₂ and T ₁₂ ′, and the minor seventh interval 7 ^b is selected, and the bass is changed as shown in Figure 13 d and e. The performance progresses. For minor chord, short 7 by pulse T ₁₂
The degree interval 7 ^b is selected and the pulse T ₁₀ ' causes the minor 6
The degree interval 6 ^{b is} selected, the major 6th interval 6 is selected by the pulse T ₁₀ , and the major 7th interval is selected by the pulse T ₁₂ '.
Therefore, as shown in Figure 13c, when the pitch falls, a flat symbol is added to the notes between the seventh and sixth, resulting in a minor seventh and a minor sixth, but the pitch rises. In this case, a natural symbol is added and the pitch returns to the original major 7th and major 6th intervals. As mentioned above, when the bass note of a minor chord is progressing, a flat symbol is attached to the note between the 7th and 6th while the pitch is falling, and the note is lowered by a semitone, and the note between the 7th and 6th is lowered by a semitone when the pitch is rising. The bass progression of returning to the original major 7th and major 6th interval is extremely effective for certain rhythmic bass performances, and is extremely useful for making bass performances rich in sensation. This is an important operation. The device of this embodiment uses pattern pulses T 12 and T 10' to select the 7th and 6th intervals when the pitch is falling, and pattern pulses T ₁₂ and T ₁₀ ' to select the 7th and 6th intervals when the pitch is rising. pulse to
By using T ₁₂ ′ and T ₁₀ , it is possible to automatically perform a complex bass progression as described above. As illustrated in FIGS. 12 and 13, the intervals between the occurrences of the base pattern pulses T ₁ to _{T 17} correspond to the note length of the tone of the pitch in the base pattern. In other words, the time corresponds to the interval between each key press when the player actually plays a bass tone by pressing the keys. Furthermore, the generation time width of one pulse (T ₁ to _{T 17} ) is much longer than the cycle of the system clock of the automatic bass chord performance control device 31, and is sufficiently longer than the cycle of the start code SC. . Bass sound key code data transmission The bass pattern pulses T ₁ to T ₁₇ are added to the OR circuit 228 in FIG. 4 and combined into one line 188 to become the bass sound generation timing signal BT. A delay flip-flop 229 inserted in the line 188 and a delay flip-flop group 214 for delaying the subtone forming data SD ₁ to _{SD 5} are connected to the root note in the note code memories 158 to 161 and the octave code memories 154 to 156 in FIG. This is to synchronize with the delay of 1 bit time in the key code data. As described above, the bass sound generation timing signal BT enables the AND circuit 187 shown in FIG. 5 to be in a state where it can generate the bass sound generation command signal PE. The bass sound generation command signal PE (see FIG. 9l) generated from the AND circuit 187 is applied to the AND circuit 231 via the OR circuit 230 in FIG. The signal applied from the inverter 232 to the other input of the AND circuit 231 is normally "1";
31 is operational. Therefore, a signal "1" is output from the AND circuit 231 in response to the bass sound generation command signal PE, and the key data selection gate section 2
A signal “1” is supplied to the processed data selectable line 234 of 33. The key data selection gate section 233 includes a plurality of AND circuits and OR circuits, and adders 195 to 2.
The AND circuit inputting the output of 01 is enabled by the signal "1" on the processed data selectable line 234, and the processed key code data is selected. Further, key code data N 1 to ₁ according to the key presses on the keyboard supplied from the key coder 26
The AND circuit in the gate section 233 to which N ₄ , B ₁ to B ₃ , K ₁ , and K ₂ are input via lines 266 to 274 can be operated by the signal “1” on the raw data selectable line 235. At that time, the key code data N ₁ to _{K 2} corresponding to the key presses are selected. The base sound generation command signal PE is applied to the NOR circuit 236 via the OR circuit 230.
The raw data selectable line 235 connected to the output of the key coder 26 is set to a signal "0" to prohibit the selection of data _N1 to _K2 according to the key presses from the key coder 26.
Since the processed data selectable line 234 becomes a signal “1”, the processed key code data AN ₁ to AN ₄ , AB ₁ which is the addition result in the adders 195 to 201
~AB ₃ is selected. Furthermore, the bass sound generation command signal PE is sent to the AND circuit 237 of the selection gate section 233.
In addition, data AK ₁ of the first bit of the keyboard code is created in response to the signal "1" on the processed data selectable line 234. That is, when the signal PE is "1", the data _AK1 becomes "1". Also,
The signal on the processed data selectable line 234 passes through the OR circuit 238 of the selection gate section 233 and becomes data _AK2 of the second bit of the keyboard code. Therefore, when the line 234 is a signal "1", the data _AK2 also becomes "1". Therefore, when the bass sound generation command signal PE is generated, the processed keyboard code data AK ₂ and AK ₁ become "11", and data representing the sound of the pedal keyboard, that is, the bass sound, is created. This results in
The processed key code data _AN1 to _AB3 obtained by the adders 195 to 201 are handled as bass sound data in subsequent circuits (channel processor 30, etc.). The selection output of the key data selection gate section 233 is synchronized with the system clock by a delay flip-flop group 239 and then supplied to the channel processor 30. As described above, key code data AN ₁ to AK ₂ corresponding to the root note and subordinate note are created as if a predetermined key was actually pressed at a predetermined timing according to a predetermined bass pattern, and the channel program It is sent to the setter 30. For example, when the custom function is selected, the _C2 note key is pressed on the pedal keyboard 29, a major chord is formed on the lower keyboard 28, and the base pattern is as shown in Figure 12. Assuming that a pattern is selected, processed key code data AN ₁ to _{AK 2} are sequentially generated as shown in Table 6 below.

【table】

[Table] In Table 6, if the pulse width of the pattern pulse is approximately 100 ms, then as already explained in relation to Figure 9 l, the base sound generation command signal PE
is generated only once during one generation interval of the start code SC, so if the generation interval of the start code SC is approximately 5 ms, the pattern pulse (T ₁ ,
T ₅ , T ₈ . . . ) is generated, while processed key code data AN ₁ to AK ₂ of the same value are continuously generated approximately 20 times at approximately 5 ms intervals. As already explained, channel processor 3
0, if key code data is supplied even once during one generation interval of the start code SC, it is determined that the key associated with that key code data is being pressed. Therefore, start code SC 1
Processed key code data AN ₁ to _{AK 2} of bass notes generated only once during the generation interval are received by the channel processor 30 in order, assigned to a predetermined sound generation channel, and stored. Note that the keyboard codes K ₁ and K ₂ of the key codes supplied from the key coder 26 are input to the AND circuit 2 in FIG.
40, and if it is a pedal keyboard key code, a pedal keyboard detection signal is sent from the AND circuit 240.
Output PKE (="1"). This pedal keyboard detection signal PKE is supplied to an AND circuit 241 in FIG. 4. Other inputs of this AND circuit 241 include
AND circuit 17 of the function decoder 47
A signal inverted by an inverter 242 from the automatic performance off signal OFF, which is the output of No. 5, is added. The output “1” of the AND circuit 241 is the OR circuit 2
43, becomes the raw key data block signal INH, and is applied to the NOR circuit 236 in FIG. As a result, the output of the NOR circuit 236 becomes "0", so the raw data selectable line 235 of the key data selection gate section 233 becomes a signal "0", and the key coder 26
The selection of data N ₁ to K ₂ according to key presses is prohibited. This allows automatic bass chord play, such as Custom, Finger Chord or Single Finger functions (signal
OFF is “0”), the key code N ₁ to _{K 2} of the key actually pressed on the pedal keyboard 29 is the key coder 26
When the raw key data blocking signal INH is supplied from the raw key data selection gate section 233, the raw key codes N ₁ to K ₂ are prevented from being selected according to the key presses. That is, only the processed key data (AN ₁ to _{AK 2} ) of the bass sound is supplied to the channel processor 30 . Generation of chord sounds in the custom function Chord sounds, that is, key code data N ₁ to K ₂ of the notes pressed on the lower keyboard 28, are generated by this automatic bass chord performance control device in the case of the custom function (and finger chord function). 31 (see Figure 2), no changes are made, and the raw data selectable line 23 is changed in the key data selection gate section 233 (see Figure 5).
5 is selected by the signal "1" and is sent to the channel processor 30 as it is. That is,
Key codes N ₁ to _{K 2} on the lower keyboard 28 are key coder 2.
This is because at the timing supplied from 6, both the output of the OR circuit 230 (FIG. 5) and the raw key data blocking signal INH are "0", and the output of the NOR circuit 236 is "1". However, if the single finger function is selected as described later, the raw key data blocking signal INH is generated in accordance with the key code data of the lower keyboard. In the channel processor 30, each tone pressed on the lower keyboard, that is, each chord component tone, is assigned to an appropriate sounding channel. The musical tone signal of each chord component tone is generated by the musical tone generation circuit 32 (Fig. 2).
occurs in A chord tone is generated by simultaneously and similarly controlling the amplitude envelopes of each chord constituent tone according to an envelope waveform signal generated from the envelope generation circuit 33 at each timing of chopping the chord tone. The chord tone generation timing control section 4 determines the timing of chord tone generation.
Chord sound generation timing signal supplied from 3
Set by CG. About the finger chord function The method of producing chord sounds in the finger chord function is the same as in the case of the custom function described above. In the finger chord function, only the lower keyboard 28 is used and the pedal keyboard 29 is not used.
The way the bass sound is produced is slightly different from the custom function described above. When the finger code function is selected, the finger code function selection signal FC becomes “1”,
Since the signal FC+CA on line 100 also becomes "1", AND circuits 97 and 98 of code detection logic 96 (FIG. 3) become operational. As described above, the root note detection signal RT is generated at a timing corresponding to the root note name of the detected chord. The root detection signal RT output from the OR circuit 108 in FIG. 3 is applied to the OR circuit 244 in FIG. 5 and read into the shift register 245 for storing root note timing.
The shift register 245 stores the root note name by timing, and the timing of each of the 12 notes is time-divisionally allocated by 1 bit time, so the input root note detection signal RT is delayed by 12 bit times, and the 12th note is delayed by 12 bit times. The output of the stage is added to the AND circuit 246 and sent to the shift register 2 via the OR circuit 244.
45 cycles. In this way, the root note name is stored at time-sharing timing. Root detection signal output from OR circuit 244
RT is provided via line 247 to AND circuit 248. A signal obtained by inverting the custom function selection signal CA using an inverter is added to the other input of the AND circuit 248. Therefore, in the case of the "finger code function" or the "single finger function", the AND circuit 248 becomes operational. The signal "1" outputted from the AND circuit 248 in accordance with the generation timing of the root note detection signal RT is transmitted to the OR circuit 165 and the AND circuits 249, 250, 251,
Join 252. The least significant bit data N ₁ ^* of _each ^note code generated from the note name encoder 107 in a time-divisional manner as shown in FIG. ₃ ^* is applied to an AND circuit 251, and data _N4 ^* is applied to an AND circuit 252, respectively. Therefore, the root sound detection signal
Note code data N ₁ ^* to _{N 4} ^* corresponding to the root note name is sent to AND circuit 2 according to the RT generation timing.
Selected from 49 to 252, note code memory 1
58 to 161, respectively. That is, the old data stored in the delay flip-flop 163 of the note code memory is cleared by the output "1" of the OR circuit 165 via the clear line 167 and the AND circuit 164, and the data is cleared by the AND circuits 249 to 249.
The data N ₁ ^* to N ₄ ^* selected at 252 are sent to the delay flip-flops 163 of each memory 158 to 161.
is memorized. Note that the root note timing storage shift register 24
The outputs of the 1st stage to 11th stage of 5 are added to the NOR circuit 253, and when two or more root note detection signals RT are generated, the outputs of the 1st stage to the 11th stage of 5 are applied to the root note detection signal generated later.
RT sets the output of the NOR circuit 253 to "0", disables the AND circuit 246, and the root note detection signal of a different note name generated before reaching the 12th stage is fed back to the 1st stage. prevent something. Therefore, the shift register 245 preferentially stores the generation timing of the root note detection signal RT generated later. Note that the key press signal KO is applied from the AND circuit 86 in FIG. 3 to the NOR circuit 253 via the inverter 254, but this is to clear the memory of the shift register 245 when the key is released. The case where two root note detection signals RT with different note names are generated is as follows. For example, assume that the three keys D ₄ , A ₄ , and C ₅ are pressed on the lower keyboard 28 to form the chord of "D seventh."
At the first timing of scanning by the scanning circuit 87 (FIG. 3), data for pitch name C is stored in the final stage 87-12, data for pitch name D is stored in stage 87-10, and data for pitch name A is stored in stage 87-3. It is held. At this time, note name C
With the data, the conditions of the AND circuit 132 (FIG. 3) are satisfied, a non-code signal NC is generated, and the root note detection signal RT is generated via the OR circuit 108 at the timing of the C note. Two bit times later, data for pitch name D enters scanning circuit stage 87-12, and data for pitch name C enters stage 87-2. Therefore, the conditions of the AND circuit 98 are satisfied, and the code detection signal
CD is generated, and as a result, the root note detection signal RT is generated at the timing of the D note. The root detection signal RT generated earlier at the timing of the C note is a false root detection signal, and the signal RT generated later at the timing of the D note is the true root detection signal. Therefore, the root note timing storage shift register 245 is designed to clear the memory of the previously generated false root note detection signal. In addition, although note code data of a false root note is stored in the note code memories 158 to 161 in accordance with the false root note detection signal RT generated earlier, the true root note detection signal RT generated later That memory is immediately rewritten by RT. Also, the match signal
Since EQ is not generated unless the same note code data is given twice in a row, a false root note detection signal is generated.
No match signal EQ is generated in response to RT. In the finger chord function, only note code memories 158-161 are used, and octave code memories 154-156 are not used.
Further, the output of the OR circuit 206 in FIG.
AND circuits 202 to 204 to lead to ~201
doesn't work. The OR circuit 206 outputs "1" when the custom function described above is selected or when the key code data of the chord sound is processed in the single finger function described later. When processing the key code data for the base sound, the output is "0". The output “0” of the OR circuit 206 is inverted by the inverter and becomes “1”.
The AND circuit 255 is enabled. In the finger chord function or single finger function, the range of the root note of the automatic bass note is limited to a one-octave range from _C2 to _B2 . Therefore, the AND circuit 255
are provided to create octave data B ₁ to _{B 3} of key code data corresponding to the root note. Upper 3 bits of note code data N ₂ ,
The output of note code memories 159 to 161 storing N ₃ , N ₄ (N ₂ ^* , N ₃ ^* , N ₄ ^* ) is on line 190.
~192 to a NAND circuit 256, and the output of the AND circuit 256 is applied to the other input of the AND circuit 255. As mentioned above, the note codes N ₄ , N ₃ , N ₂ , and N ₁ of the C note are "1110", and the data of the upper three bits are all "1". Therefore, the NAND circuit 256 is connected to the note code memories 158 to 16.
If the note code data corresponding to the root note added from 1 to adders 195 to 198 is of C note, the operating condition is satisfied and a signal "0" is output. For sounds other than C, use NAND circuit 2
The output of 56 is "1". The output of the NAND circuit 256 passes through the AND circuit 255 to the lowest bit _B1 of the octave code.
(AB ₁ ) is added to the adder 199 corresponding to (AB 1 ). Adder 20 corresponding to upper bits B ₂ , B ₃ (AB ₂ , AB ₃ )
No data is input to 0 and 201. Therefore,
In the case of the C note, the input to the adder 199 is "0" and the inputs to the adders 200 and 201 are also "0", so the octave code data B ₃ , B ₂ , B ₁ are "000" and the key The code data B ₃ to _{N 1} is _C2 note data “0001110”. Also C
In the case of #~B notes, the signal "1" is added to the adder 199, so the octave codes _B3 , _B2 , _B1 become "001", and the 7-bit data _B3 ~ _N1 becomes
C ₂ # note to B ₂ note. Therefore, the range of the root note is set to a one-octave range from _C2 to _B2 . Subtone data AN ₁ to AB ₃ are subtone processing data SD ₁ to _{SD 5} for the key data of the root note in the above range.
Since it is created by adding the carry signal CR to the adder 199 or 200, it is possible that the range will be one octave higher than the above range. By the way, as already explained, in the case of the custom function, the key code data N ₁ of the key pressed on the pedal keyboard 29 is stored in the note code memories 158 to 161 and the octave code memories 154 to 156.
~ _B2 is stored and used as root note data in adders 195-201. Therefore, in the custom function, the range of the root note of the automatic bass sound covers the entire key range of the pedal keyboard 29. Generally, the entire keyboard range of the pedal keyboard 29 is two or more octaves (for example, _C2 to _C4 ), so the range of the automatic bass sound is wider than in the case of the finger chord function or single finger chord function. In some cases, the key data AN ₁ to AB ₃ of the subordinate tone created by adding the data for subordinate tone processing SD ₁ to SD ₅ may be added to the pedal keyboard 29.
It can be a high pitched sound that doesn't actually exist. About the single finger function In the single finger function, not only the bass note but also the key code data of the chord note are converted into follower note formation data SD ₁ ~ in the key code processing section 42.
Created by adding SD ₅ . For single finger function, signal FC+
Since CA is “0”, the code detection logic 96
AND circuits 97 and 98 (FIG. 3) do not operate. Since the code detection signal CD is not generated, the memory in the delay flip-flop 138 is "0", and the AND circuit 137 is always operable. The note name data corresponding to a single key (usually only a single key is pressed in the single finger function) among the keys pressed on the lower keyboard 28 is sent to the AND circuit 132 in a bass priority manner. A non-code signal NC is output from the AND circuit 137 in accordance with the timing of the note name. The non-code signal NC passes through the OR circuit 108 and is added to the OR circuit 244 in FIG. make it operational. Then, the note code data N ₁ ^* to _{N 4} ^* of the note name corresponding to the generation timing of the root note detection signal RT is transferred from the note name encoder 107 to the note code memory 158.
~161. When key codes N ₁ to K ₂ relating to the lower keyboard are supplied from the key coder 26 in response to a key depression on the lower keyboard 28, a lower keyboard detection signal LK is generated from the AND circuit 59 (FIG. 3). This lower keyboard detection signal LK
passes through line 257 to NAND circuit 258 in FIG.
join. A single finger function selection signal SF is added to the other input of the NAND circuit 258 from the AND circuit 50 of the function decoder 47, and in the single finger function, the key codes N ₁ to K ₂ of the lower keyboard are selected based on this automatic base. When supplied to the chord performance control device 31, the NAND circuit 25
The output signal .8 becomes "0". This signal is inverted by an inverter and becomes "1", and passes through an OR circuit 243 to generate a raw key data blocking signal INH. This signal INH sets the raw data selectable line 235 of the key data selection gate section 233 in FIG. Block codes _N1 to _K2 . Therefore, in the single finger function, the lower keyboard 28 generated from the key coder 26
The key codes N ₁ to _{K 2} that are pressed in step 1 are not sent to the channel processor 30 . The signal generated from the NAND circuit 258 is applied via line 259 to the NOR circuit 260 of FIG. Other inputs of the NOR circuit 260 include the outputs of exclusive OR circuits 261 to 264 and a delay flip-flop 265. The exclusive OR circuits 261 to 264 are connected to the note code memory 158.
Note code data corresponding to the root note name stored in ~161 and lines 266~2 from the key coder 26
Note code data N ₁ ~ supplied via 69
_N4 is compared, and only when the two match, all outputs become "0". delay flip-flop 2
The output of 65 is initially "0". Therefore, in the case of the single finger function, the note code data of the root note stored in the note code memories 158 to 161 and the note code N ₁ to _{N 4} of the note pressed on the lower keyboard supplied from the key coder 26 are used. When they match, the output of the NOR circuit 260 becomes "1". The output “1” of the NOR circuit 260 is the OR circuit 153
The AND circuits 157 for reading data in the octave code memories 154-156 are enabled, and the octave codes _B1 - _B3 supplied from the key coder 26 via lines 270-272 are stored in the memories 154-156. thus,
The note code and octave code data of the note corresponding to the root note are stored in memories 158 to 161 and 154.
~156. Also, the output “1” of the NOR circuit 260 is the line 2
75 and is stored in the delay flip-flop 265 via the OR circuit 276. After one bit time, the output of the delay flip-flop 265 becomes "1", and the operating condition of the NOR circuit 260 is no longer satisfied.
The memory of the delay flip-flop 265 is self-held via the AND circuit 277, but at the timing of the start code SC (see FIG. 14a),
When the start code inversion signal becomes "0", the AND circuit 277 becomes inactive and the memory is cleared. 14g shows an example of the output of the NOR circuit 260, and FIG. 14h shows an example of the output of the delay flip-flop 265. The output of delay flip-flop 265 is applied to AND circuit 278 and also to AND circuit 280 via OR circuit 279. A delayed match signal EQ ₁ from an AND circuit 179 and a stored match signal EQM stored in a delayed flip-flop 181 are applied to AND circuits 278 and 280, respectively. When one root detection signal RT is generated as shown in FIG. 14c during one generation period of the load pulse SY ₁₂ (see FIG. 14b), a coincidence signal EQ is generated as shown in FIG. 14d. Therefore, the delayed match signal _EQ1 and the stored match signal EQM are generated as shown in FIG. 14e and f. When the conditions of the AND circuit 278 match, a signal "1" is stored in the delay flip-flop 281 (see FIG. 14i). The AND circuit 280 connects the output of the delay flip-flop 281 to an inverter 282.
Since the inverted signal (see FIG. 14 j) is added, when the condition of the AND circuit 278 is satisfied for the first time during one generation period of the start code SC, the condition of the AND circuit 280 is satisfied, and as shown in FIG. As shown in k, one chord sound generation command signal LE is generated. Once the signal "1" is stored in the delay flip-flop 281, the memory is not cleared until the self-holding AND circuit 283 becomes inactive at the timing of the start code SC generation. Therefore, the code sound generation command signal LE is the start code.
It is generated only once during one SC generation cycle. The chord sound generation command signal LE output from the AND circuit 280 is sent to the three-stage shift register 28.
4, and are sequentially delayed by 1 bit time from the first stage, second stage, and third stage of the shift register 284 to generate chord tone data generation timing signals LE ₁ , LE ₂ , LE ₃ (FIG. 14 l, m). , n). The shift register 284 is provided to time-divisionally generate key code data corresponding to each constituent note of a chord tone, and the timing signal LE ₁ once determines the timing for generating key code data corresponding to the pitch, that is, the root note. The signals LE ₂ and LE ₃ indicate the timing of generating key code data for secondary tones. Output of each stage of shift register 284
LE ₁ , LE ₂ , and LE ₃ are combined by an OR circuit 285, and its output LKE (see o in FIG. 14) is applied to an OR circuit 206 and an AND circuit 286. Therefore, the chord tone data generation timing signal LKE
AND circuits 202, 20 according to (LE ₁ to _{LE 3} )
3,204 becomes operational, and octave codes B ₁ -B ₃ stored in octave code memories 154 - 156 are supplied to adders 199 - 201 . In addition, the chord sound data generation timing signal
In response to LKE (LE ₁ to _{LE 3} ), the AND circuit 286 becomes an output “1”, and the processed data selectable line 234 of the key data selection gate section 233 becomes a signal “1” via the OR circuit 230 and the AND circuit 231. Then, the outputs of the adders 195 to 201 are selected by the gate section 233. First, when the root note data generation timing signal LE ₁ is output from the shift register 284, the root note note code data and octave code data stored in the note code memories 158 to 161 and octave code memories 154 to 156 are It is added to adders 195-201. At this time, since the subordinate tone forming data SD ₁ to SD ₅ are all "0", the adders 195 to 201 are stored in the memories 158 to 16.
The key code data corresponding to the root notes from 1,154 to 156 is output as is, and the selection gate section 23
3. The signal is supplied to the channel processor 30 via the delay flip-flop group 239. Also, the signal LE ₁ output from the first stage of the shift register 284 passes through the line 287 to the fourth stage.
In addition to the chord system subtone selection gate section 215 shown in the figure,
AND circuits 288 and 289 are enabled.
As described above, in the case of the single finger function, the code type is specified by the minor code signal m or seventh code signal ^7b output from the function decoder 47 via line 54 or line 57. The minor code signal m on the line 54 is applied to the AND circuit 288 of the chord system subordinate tone selection gate section 215, and the signal inverted by the inverter 290 is applied to the AND circuit 289. Therefore, if the minor code is selected, the signal
The AND circuit 288 operates at the timing of LE ₁ ,
A minor third pitch selection signal 3 ^b is added to the pitch numerical value memory 213 . If a minor chord is not selected, the AND circuit 289 operates at the timing of the signal LE ₁ and adds a major third interval selection signal 3 to the interval value memory 213. In response to the pitch selection signal 3 ^b or 3, the pitch numerical memory 213 stores subordinate tone formation data SD ₅ to SD ₁ of the value corresponding to the minor third interval (00100) or the value corresponding to the major third interval (00101). Output. The data SD ₅ to _{SD 1} are delayed by one bit time in the delay flip-flop group 214, and are sent to the adders 195 to 199 in synchronization with the timing at which the secondary data generation timing signal LE ₂ is output from the second stage of the shift register 284. is input. Therefore, at the generation timing of the signal LE ₂ , data SD ₁ to _{SD 5} for forming a minor third or major third are added to the key code data of the root note, and the minor third or major third note formation data SD 1 to SD 5 are added to the key code data of the root note. Key code data for subordinate tone with third interval
AN ₁ to AB ₃ are produced. Adders 195-20
The output of 1 is selected by the selection gate section 233 at the timing of the signal LE ₂ and is supplied to the channel processor 30. Also, the signal LE ₂ output from the second stage of the shift register 284 passes through the line 291 to the fourth stage.
In addition to the chord system subtone selection gate section 215 shown in the figure,
AND circuits 292 and 293 are enabled.
Line 5 if seventh chord is selected
When the seventh chord signal 7 ^b of 7 becomes “1”, the AND circuit 293 operates, and the minor seventh pitch selection signal 7 ^b is input to the pitch numerical value memory 213 . When the seventh code signal 7 ^b is “0”, its inverted signal 7 ^b becomes “1”, and the AND circuit 29
2 is activated, and a perfect fifth interval selection signal 5 is input to the interval value memory 213. In response to the pitch selection signal 5 or 7 ^b, the pitch value memory 213 outputs subordinate tone formation data SD ₅ to SD ₁ of a value corresponding to a perfect fifth interval (01001) or a value corresponding to a minor seventh interval (01101). is output. The output of the memory 213 is delayed by one bit time by a delay flip-flop group 214, and is input to adders 195 to 199 in synchronization with the timing at which the follower data generation timing signal LE ₃ is output from the third stage of the shift register 284. . Therefore, the key code data AN ₁ to AB ₃ of the perfect fifth or minor seventh are generated in synchronization with the signal LE ₃ . In addition, the chord sound data generation timing signal
Processing data can be selected according to LKE line 234
When the signal becomes "1", the output of the OR circuit 238 of the key data selection gate section 233 becomes "1",
Data AK ₂ becomes “1”. At this time data AK ₁
is “0”, so the keyboard code data AK ₂ ,
AK ₁ becomes “0” and a lower keyboard chord is created.
In this way, the key code data AN ₁ to _{AK 2} of the lower keyboard, that is, the chord tones are generated. In addition, the chord sound data generation timing signal
The output of the NAND circuit 294 is added to the other input of the AND circuit 286 to which LKE is added. The upper limit value of the octave codes B ₃ to B ₁ is “101” as shown in Table 1.
It may happen that the output of 00,199 becomes "110". If the value of the octave code exceeds the upper limit, there is a possibility that the musical tone generation circuit 32 will not produce any sound, or that the sound will be like a click sound.
It is wasteful to allocate one pronunciation channel for such sounds. Therefore, the inverted output of the adder 199 and the outputs of the adders 200 and 201 are added to the NAND circuit 294, and when the value becomes "110", the signal becomes "0".
is output to disable the AND circuit 286. This prevents the processing key codes AN ₁ to AK ₂ from being supplied to the channel processor 30. In the single finger function, the key code data of the bass note is processed in the same way as in the finger code function. By the way, as shown in FIG. 14 p, the AND circuit 187 (fifth
The bass sound generation command signal PE generated from the diagram) occurs at the same timing as the delayed match signal EQ ₁ , whereas the chord sound data generation timing signal LKE
occurs one bit time after the delayed match signal _EQ1 . Therefore, the key code data for the bass note and the chord note will not be generated overlappingly. The chord sound generation command signal LE output from the AND circuit 280 and the chord sound data generation timing signal LKE from the OR circuit 285 are output from the OR circuit 29.
5 and their output LM is applied to the NOR circuit 216 via line 296 in FIG. Therefore,
While the key code data of the chord sound is being created by the key code processing unit 42, the output of the NOR circuit 216 is “0”, and the bass-based follower tone selection gate unit 217
Each AND circuit becomes inoperative. As a result, formation of data for forming subordinate notes of the bass note is prohibited. About changing the bass progression If the chord detection logic 96 (Fig. 3) cannot detect a chord, the output line 1 of the chord type detection circuit 109 (Fig. 4)
22, 124, 127, and 128 are all "0", and are treated as major chords in the bass-based follower tone selection gate section 129. In other words, the bass pattern progresses in the form of a major chord, but the chord notes (lower keyboard notes) are not major chords, so the chords of the bass note and the chord note are different. In the case of the custom function, it is assumed that the chords of the bass note and the chord note may be different, so there is no problem at all, but in the case of the finger chord function, it is necessary to create a certain degree of harmony between the bass note and the chord note. It is preferable to let it stand. Therefore, when the finger chord function is selected, if the chord detection logic 96 cannot detect a chord, the bass system follower tone selection gate section 129 is deactivated and various types are activated in response to the bass pattern pulses _T3 to _T17 . The follower tone selection signals 2 to oct+ ^3b are not generated, and instead, the first beat of the base pattern is generated at every generation timing of the base pattern pulse. Code detection signal if no code is detected
Delay flip-flop 13 for storing CDs
8 (FIG. 3) is "0", and the output of inverter 144 is "1". Inverter 144
The output "1" enables the AND circuit 137 to generate the non-code signal NC, and also outputs the line 2 as the base progression change signal BMD.
97 to the AND circuit 298 in FIG. A finger code function selection signal FC is applied from the function decoder 47 to the other input of the AND circuit 298, and when the operating condition is satisfied, a signal "1" is applied to the NOR circuit 216 and the OR circuit 299. The output of the NOR circuit 216 becomes “0”, and each AND circuit (21
7, 218, etc.) become inoperative. On the other hand, the output of the OR circuit 299 becomes "1", and the AND circuit 300 becomes operational. Since the base-based follower tone selection gate section 129 is inactive, the follower tone formation data SD ₁ to _{SD 5} of various pitches are all “0”, but the base pattern pulses T ₁ to _{T 17}
The bass sound generation timing signal BT is supplied to the AND circuit 187 in FIG. 5 via the OR circuit 228 and line 188 in accordance with the generation timing.
Therefore, the bass sound generation command signal PE is generated according to the bass pattern selected by the selected bass pattern generator 41. However, since the subordinate tone forming data SD ₁ to _{SD 5} are all "0", only the key code data corresponding to the root note is reflected in the signal.
It is repeatedly supplied to the channel processor 30 in response to the occurrence of PE. Since the root note is the sound of the first beat of the bass pattern, only the sound that is originally produced on the first beat will also be produced at the sound generation timing after the second beat of the bass pattern. That is,
The pitch of the bass note does not change, and only the timing of its production follows the selected desired bass pattern. By the way, in Figures 12 and 13, 1
As shown in the example, the note used as the first beat of the bass pattern is not limited to the root note, but a note one octave above the root note may also be used. Therefore, as described above, note code memories 158 to
161 (and octave code memory 154-1
The key code data of the root note stored in step 56) is repeatedly generated from the key code processing unit 42 only in the case of a base pattern in which the first beat is the root note. The base pattern shown in FIG. 12 is an example. That is, the base pattern generation unit 41 generates base pattern pulses T ₁ ,
T ₅ , T ₈ , T ₁₀ , T ₁₁ , . . . are repeatedly supplied, but these pulses are blocked by the subordinate sound selection gate section 129 and cannot be used to generate the subordinate sound forming data SD ₁ to _{SD 5} . These pulses, T ₁ , T ₅ , T ₈ ,
Only the key coder data AN ₁ to AK ₂ of the root note (one degree interval) is repeatedly generated at the timing of occurrence of . If the note on the first beat is one octave above the root note as in the bass pattern shown in Fig. 13, the bass pattern pulses T ₁₃ , T ₁₂ , T ₁₀ ', T ₈ ...
Separately from the octave pitch signal _T0 (see Figure a), the octave pitch signal T
The signal is supplied to the AND circuit 300 shown in the figure. This octave pitch signal T ₀ is OR circuit 2
It is used only when the AND circuit 300 is enabled to operate due to the output "1" of 99, but is not used in other cases. If the first beat is a root note base pattern, the signal T ₀ is not generated. When the operating conditions of the AND circuit 300 are satisfied, the octave pitch selection signal oct is transferred to the pitch numerical memory 21.
3, and the following sound formation data SD ₅ to _{SD 1} are input to 1.
The value is "10000", which represents the pitch of an octave.
As a result, the adders 195-201 in FIG. 5 constantly change the key code data of the root note given from the memories 158-161 (and 154-156) to data one octave above the key code data. Therefore,
As shown in FIG. 13a, the bass sound generation command signal PE is repeatedly generated in response to the sequentially generated base pattern pulses T ₁₃ , T ₁₂ , T ₁₀ ', T ₈ , T ₁₀ , . Key code processing section 4 according to signal PE
The key code data AN ₁ to AK 2 output from the key code data AN 1 to AK ₂ are always data of a note one octave above the root note. As described above, when the base-based follower selection gate section 129 becomes inoperable due to the output "0" of the NOR circuit 216, and the AND circuit 300 becomes operable due to the output "1" of the OR circuit 299. In this case, the first beat of the bass pattern selected at that time (the root note or a note one octave above the root note) is repeatedly generated in accordance with the bass note generation timing of the bass pattern. This prevents the chord tones and bass tones from becoming completely different and maintains harmony. Moreover, only the pitch of the bass pattern is changed, and the original timing of the bass pattern is utilized, so the sensation of the bass sound is not impaired. Processing when changing the root note (chord change) of a bass note It is common for chord changes (root note changes) to be made in the middle of a measure, but in such cases, the bass pattern that has been progressing until now must be stopped. , it is desirable to make the first beat (root note) of the bass pattern sound as a modified chord. By doing so, you can better convey the feeling that the chord changes in the middle of a measure. For example, assume that one bass pattern is selected that corresponds to a swing rhythm as shown in FIG. 15a (in which pitch relations are expressed on a staff with the lower first line as the root note). As shown in figure b, bass pattern pulses T ₁ and T ₈ are generated, and normally, as shown in figure c, in a measure of a chord with C note as the root note, C note and G note are sounded in order, In a measure of a chord with A as the root note, A
The sound and the E sound are pronounced in order. As shown in figure d, a chord with the C note as the root note is A in the middle of the measure.
When the chord is changed to a chord with the root note, if the bass note is played as the bass pattern progresses, the "A major chord" will be generated at the timing of the pattern pulse T ₈ of the perfect fifth interval, as shown in figure e. The E sound, which is the subordinate tone of the fifth, is generated. In this case, it gives the impression that the chord has changed to a chord with the E note as the root note, which is not desirable. Therefore, in this embodiment, as shown in Figure 15f, the first bass note played when the chord (root note) changes is the note on the first beat of the bass pattern (the note on the first beat of the new chord). I decided to do this. In Figure f, the chord progression changes to "A major" because the first beat, that is, the root note A, is sounded at the timing of pulse _T8 , which is the first time the chord changes to "A major." Ivy is appropriately expressed in bass performance. In this embodiment, changing the root note of the automatic bass note (that is, changing the chord progression) means changing the keys pressed on the pedal keyboard 29 in the case of the custom function, and changing the root note of the automatic bass note (that is, changing the chord progression). In this case, the chord being pressed on the lower keyboard 28 is changed to a different chord, and in the case of a single finger function, the chord formed on the lower keyboard 28 is changed to a different chord.
The key pressed at 8 (usually a single key) is replaced by another key. In the case of either function, the fact that the root note of the bass note has been changed in this way is determined by the AND circuit 146 or 24.
8 (Figure 5) to “Note code memory 158~
When the command "Rewrite the memory of memory 161" is given, it is determined that the content of the note code previously stored in the memories 158 to 161 and the content of the note code to be newly stored do not match. Can be detected as a condition. It is determined in the AND circuit 301 of FIG. 4 whether this condition is satisfied. The root note rewriting signal KCH applied to one input of the AND circuit 301 is the AND circuit 14.
OR circuit 165 from 6 and 248, inverter 1
66, line 167, inverter 302 (fifth
(Figure). The anti-match signal applied to the other input of AND circuit 301 is an inversion of the match signal EQ on line 176 (FIG. 5). Therefore, when the coincidence signal EQ is "0"(="1") and the root note rewriting signal KCH is "1", the above conditions are satisfied, and the output of the AND circuit 301 becomes "1". The output "1" of the AND circuit 301 is stored in the delay flip-flop 303 and self-held via the AND circuit 304. The output “1” of the delay flip-flop 303 is applied to the NOR circuit 216 and the OR circuit 299, and is applied to each AND circuit (2
17, 218, . . . ) are inoperative, and the AND circuit 300 to which the octave pitch signal T ₀ is applied is enabled. If this situation occurs,
The note on the first beat of the bass pattern (the root note, or the note one octave above the root note depending on the signal T ₀ ) will be generated, which means that the note in the previous section "About changing the bass progression" As already mentioned. For example, at time CHT in Figure 15, AND circuit 30
If the condition 1 is satisfied, the output of the delay flip-flop 303 becomes "1" as shown in FIG. 15g, and the sound of the first beat of the bass pattern can be produced. When a bass pattern pulse is first applied after the output of the delay flip-flop 303 becomes "1" (first after the chord changes) (pulse T ₈ in the example of FIG. 15), the first beat of the bass pattern is applied. Key code data AN ₁ to _{AK 2} of the notes (root note or notes an octave above the root note) are supplied to the channel processor 30. A signal BT (see FIG. 15h) obtained by combining each base pattern pulse T ₁ to _{T 17} by an OR circuit 228 is sent via a line 188 to a delay flip-flop 3 for timing adjustment.
05, and after being inverted by an inverter, it is applied to a differentiating circuit 306. The differentiating circuit 306 differentiates the rising edge of the pulse, and after inverting the signal BT (base pattern pulse train), the differentiating circuit 306 differentiates the rising edge of the pulse.
6, it is essentially differentiating the falling edge of the base pattern pulse. Therefore, the output of the differentiating circuit 306 is as shown in FIG. 15i. The output differential pulse of the differential circuit 306 is inverted by an inverter and then applied to the AND circuit 304 to disable the AND circuit 304 and release the self-holding state of the delay flip-flop 303. Therefore, when changing the chord (root note change), the first beat of the bass pattern is output only once, and from then on, the NOR circuit 216 outputs "1", the OR circuit 299 outputs "0", and the bass system follows. Sound selection gate section 129
becomes operable, so the bass sound progresses according to the bass pattern. About the memory function Generally, automatic bass chord performance stops when a key on the lower keyboard 28 or pedal keyboard 29 is released. The "memory function" referred to here is a function that allows automatic bass chord performance to continue even if a key is released on the lower keyboard or pedal keyboard by storing the information on the key pressed immediately before that key. . To activate the memory function, turn on the memory switch 307 in FIG. When the switch 307 is turned on, the signal becomes “1” via the inverter 308.
is added to the AND circuit 309. When automatic bass chord performance is selected, the automatic performance off signal OFF of the function decoder 47 is "0", so a signal obtained by inverting this signal OFF is applied to the AND circuit 309. The remaining input MCON of the AND circuit 309 will be described below as "1". Memory signal M output from AND circuit 309
is applied to AND circuit 310 in FIG. 3, inverted by inverter 311, and applied to OR circuits 73 and 312 of storage control section 72. As mentioned above, the output of the OR circuit 73 is sent to the lower keyboard note secondary memory 75.
It also controls the rewriting of the memory of the delay flip-flop 83, which is a secondary memory for storing lower keyboard key presses.If the output of the OR circuit 73 is "1", the memory is rewritten at the timing of the start code SC. Ru. When a key is being pressed on the lower keyboard 28, the output "1" from the delay flip-flop 71, which is the primary memory, is applied to the OR circuit 73, so that the memories in the secondary memories 75 and 83 are rewritten. but,
When all keys on the lower keyboard 28 are released, the output of the delay flip-flop 71 becomes "0". At this time, if the memory function does not work, the memory signal M is "0" and the output "1" of the inverter 311 is applied to the OR circuit 73, so the secondary memories 75 and 8
3 memory rewriting is performed. However, since all data supplied from the primary memories 62 and 71 to the secondary memories 75 and 83 is "0" (by key release), the note name memory and key press memory in the secondary memories 75 and 83 are cleared. be done. However, when the memory function is activated, the memory signal M becomes "1" and the output of the inverter 311 becomes "0". Therefore, when the output of the delay flip-flop 71 in the primary memory becomes "0" due to key release, the start code signal SC is output to the AND circuit 7.
4, the output of the OR circuit 73 is "0" and the output of the AND circuit 74 remains "0". Therefore, the output of the inverter 77 remains "1" and the secondary memories 75 and 83 maintain their self-retention. Therefore, 2
The next memory 75 stores the note name data of the note pressed on the lower keyboard 28 immediately before the key was released. Thereby, chord detection and root note detection are possible even after the key is released, and a chord detection signal CD and a root note detection signal RT are generated. In the finger chord function and single finger function, the start code N ₁ ^* ~ is output from the note encoder 107 (Fig. 5) by the root note detection signal RT, which is generated even after the lower keyboard key is released, as described above.
Since N ₄ ^* is stored in the note code memory,
Automatic bass sound continues to be generated. In addition, in the single finger function, when all keys on the lower keyboard 28 are released, the signal applied to the NOR circuit 260 in FIG. 5 becomes "1", so the NOR circuit 260 becomes inactive, and the octave code memory The signals of the self-holding clear lines 172 of 154 to 156 remain at "1". Therefore, the octave codes _B1 to _B3 stored in the octave code memories 154 to 156 are retained even after the key is released. Memory signal M output from AND circuit 309 in FIG. 4 is applied to AND circuit 280 via OR circuit 279 in FIG. Therefore, even if the delay flip-flops 265 and 281 are cleared after the lower keyboard key is released, the AND circuit 280 is made operable by the memory signal M, and the chord sound generation command signal LE is generated. Therefore, when the memory function is activated in the single finger function, chord tones continue to be generated even after the lower keyboard key is released. In the custom function, the custom function selection signal CA on the line 147 is inverted by the inverter 321, and the OR circuit 312 of the storage control section 72 in FIG.
A signal “0” is added to. When the memory signal M is set to "1", all inputs of the OR circuit 312 become "0" when the pedal keyboard is released (the initial clear signal IC is also "0"), and the AND circuit 322 becomes inactive. . Since the output of the AND circuit 322 is for controlling the memory rewriting of the secondary memory (delay flip-flop) 320 of the pedal keyboard, the output of the secondary memory (delay flip-flop) of the lower keyboard described above is
Just like in the case of 83, since the AND circuit 322 becomes inactive, the storage of key press data "1" is self-maintained in the delay flip-flop 320 even after the pedal keyboard is released. As mentioned above, even when automatic bass chord play is off, the signal CAO on line 317 allows the memory of the keys pressed on the pedal keyboard to be stored in the primary memory (delayed flip-flop) 315 and secondary memory (delayed flip-flop). 320, but in this case, since the custom function selection signal CA is "0", even if the memory signal M becomes "1", the OR circuit 31
Since the output of 2 becomes "1" and the AND circuit 322 operates, the memory function does not work. Therefore, the key depression memory of the pedal keyboard is retained even after the key is released only when the memory signal M becomes "1" when the custom function is selected. By the way, in the case of the custom function, the note code data N ₁ - 4 supplied from the key coder 26 is stored in the note code memories 158 - 1 without using the output N ₁ ^* - N ₄ ^* of the note name encoder 107 (FIG. ₅₎ .
61. Therefore, after the key is released, note code data related to the pedal keyboard N ₁ ~
Since _N4 is no longer supplied, the coincidence signal EQ necessary to generate the bass sound generation command signal PE is no longer generated. However, note code memory 158
Since notes 161 to 161 are not cleared, the note code data immediately before the key is released is held in the memories 158 to 161. Therefore, if you want to activate the "memory function" when selecting a custom function, the AND circuit 310 (third
A pseudo match signal PEQ is generated from the circuit shown in FIG. 5, and is input to the OR circuit 177 in FIG. The AND circuit 310 (Fig. 3) detects that the delay flip-flop 320, which is a secondary memory for storing key presses of the pedal keyboard, the custom function selection signal CA, and the memory signal M are all "1". Conditionally, when a start code signal SC is provided from AND circuit 66 via line 324, an output "1" is produced. The output "1" of this AND circuit 310 is a pseudo match signal PEQ. Therefore,
Pseudo match signal even after the pedal keyboard is released
PEQ is generated every time the start code SC is generated, and accordingly, after one bit time, the delayed match signal EQ ₁ is supplied from the AND circuit 179 in FIG. 5 to the AND circuit 187, so that the base sound generation command signal PE is generated. Therefore, even in the case of a custom function, the "memory function" can be activated, and automatic bass performance continues even after the pedal keyboard is released. When the memory continuation signal MCON applied to the AND circuit 309 in FIG. 4 becomes "0" as described later, the memory signal M becomes "0" and the various data self-held after the key is released are cleared. Therefore, the automatic bass tone or chord tone that continues to be played even after the key is released is automatically stopped. Regarding Generation of Bass Patterns In the bass pattern generating section 41 shown in FIG. 6, the selected rhythm detecting section 325 detects the rhythm selected by the player. Since the rhythm selection signals MP ₂ to _{MP 6} are time-division multiplexed and supplied, the multiplexed signal detection circuit 32
6, the multiplexed signals _MP2 to _MP6 are decoded into lines corresponding to individual rhythms. The storage section 327 is for converting the multiplexed rhythm selection signal into a direct current. Details of the multiple signal detection circuit 326 are shown in FIG. When the performer closes a switch corresponding to a desired rhythm in the rhythm selection switch matrix 328, rhythm selection signals MP ₂ to _{MP 6} corresponding to the selected rhythm are output. Time division clock added to matrix 328
R ₁ , R ₂ , R ₃ , and R ₄ occur sequentially as shown in FIG. 17a. In the switch matrix 328, switches corresponding to each rhythm are arranged as shown in Table 7 below.

[Table] In the above table, MAM is Mambo, BEG is Begin, BOL is Bolero, TAN is Tango, SR is Slow Rock, WAL is Waltz, BAL is Ballad, JR
1, JR2 is Jyazrotsuk, SAM is Samba, RHU
is Roomba, BOS is Bossa Nova, SW is Swing,
MAR means march. 14R means the above
This represents a function that allows you to select all 14 types of rhythms. When the switch corresponding to 14R is off, only eight predetermined rhythms can be selected. In this embodiment, either the normal mode bass pattern NB or the variation mode bass pattern VB can be selected for each rhythm, and in each case, 3 modes can be selected.
Two variation base patterns BV ₁ , BV ₂ ,
It is now possible to select BV ₃ .
Therefore, there are six types of bass patterns that can be selected for one rhythm. For example, in the rhythm of a march,
If you select the first variation base pattern BV ₁ of the normal base pattern NB, the seventh
Switch MAR in the table is on, switch VB is off,
Switch BV ₁ is on. Therefore, the rhythm selection signals _MP2 to _MP6 are "00001" at the timing of pulse _R1 , and "00010" at the timing of pulse _R4 . The multiple signal detection circuit 326 outputs the rhythm selection signal in synchronization with the time division clock pulses _R1 to _R4 .
Decode MP ₂ to MP ₆ and switch matrix 3
At step 28, it is detected which switch is turned on. Although pulses R ₁ to _{R 4} may be used in the circuit 326, 4 pulses may be used due to the number of pins of the integrated circuit.
If it is not possible to input one pulse _R1 to _R4 , a synchronized clock pulse SYNC (FIG. 17b) is used. The synchronized clock pulse SYNC is synchronized with the falling edge of clock pulse _R4 , and the synchronized clock pulse SYNC
sets the ^binary counter 329 to "11" and is delayed by the shift register 330. pulse
When SYNC is shifted to the sixth stage of the shift register 330, a count pulse is applied to the counter 329 and a pulse is applied from the NOR circuit 331.
TC is generated, and the signal “1” is applied to the shift register 330 again via the OR circuit 332. pulse
In response to the occurrence of TC (Fig. 17c), the counter 32
The contents Q ₁ and Q ₂ of 9 change (Fig. 17d). The contents Q ₁ and Q ₂ of this counter 329 are designed to change in accordance with the timing of the time division clock pulses R ₁ to R ₄ . Therefore, the timing of the time-division decoding operation of the multiplexed rhythm selection signals MP ₂ to _{MP 6} is controlled by the output of the counter 329. The storage unit 327 has a rhythm selection matrix 328
It consists of a plurality of set-reset type flip-flops corresponding to each switch (see Table 7). The reason why the rhythm selection information and the base pattern variation selection information are processed in a time-sharing manner as described above is that when the device of this embodiment is integrated into an integrated circuit, the number of pins is limited. If there is no limit on the number of pins, the troublesome switch matrix 328 and selection rhythm detection section 325 are not necessary.
The outputs of the selection switches corresponding to various rhythms, variation bass patterns, etc. can be directly applied to the bass pattern generating section 41 (bass pattern generating read-only memory 333 in FIG. 6). The bass pattern generation read-only memory 333 in FIG. 6 is a circuit that outputs bass pattern pulses T ₁ to _{T 17} (T ₀ ) according to the selected rhythm and bass pattern variation. Base pattern designation circuit 334 selection rhythm detection section 325
The selected rhythm and bass pattern variation signals supplied from
produces an output corresponding to one base pattern. The base pattern designation circuit 334 receives three types of signals:
In other words, it is a circuit consisting of a group of AND circuits that detect combinations of rhythm types MAR to SAM, variation types BV ₁ to BV ₃ , and modes NB and VB.There are 14 rhythm types, 3 variations, and 2 modes.
Since it is a seed, it has 84 output lines (84 AND circuits) corresponding to a total of 14 x 3 x 2 = 84 seed base patterns. The outputs of the bass pattern specifying circuit 334 that individually correspond to each bass pattern are a timing pattern memory 335 and a pitch pattern memory 336.
is supplied as an address signal to. The timing pattern memory 335 is a circuit that uses the output of the 5-bit binary counter 337 to form the pattern pulse generation timing (bass sound generation timing) of each bass pattern. Select and output pattern timing pulses (TP ₁ to _{TP 32} ). The pitch pattern memory 336 distributes the timing pulses (TP ₁ to TP ₃₂ ) output from the timing pattern memory 335 into predetermined pitches according to the bass pattern specified by the output of the bass pattern specifying circuit 334, and generates the bass pattern pulse T ₁ . ~T ₁₇ (T ₀ ) is generated. Counter 337 is the basic tempo clock pulse
TCL is counted and the counting output is supplied to the timing pattern memory 335. The basic tempo clock pulse TCL is a delay flip-flop 338,
It passes through an OR circuit 339, a differentiation circuit 340, and a delay flip-flop 341 and is added to the count input of a counter 337. Since the basic tempo clock pulse TCL sets the basic tempo of the rhythm, the tempo can be adjusted freely, but this point is not particularly illustrated.
Since it is better to match the tempo of the automatic bass chord performance and the automatic rhythm performance, the same basic tempo clock pulse TCL is used in the automatic rhythm performance device 342 (see FIG. 2). The counter 337 has a frequency division ratio (modulo) that can be switched depending on the type of rhythm.
It is controlled by frequency division ratio switching signals FD ₁ and FD ₃ supplied from timing pattern memory 335.
The signal FD ₁ is input to the first stage (weight of 2 ⁰ ) of the counter 337, and the signal FD ₃ is input to the counter 337.
It is input to the third stage of 7 (weight of 2 ² ). When the signals FD ₁ and FD ₃ become "1", the value "1" is forcibly added to the corresponding stage of the counter 337. Signal FD ₁
and FD ₃ are both “0”, counter 337
operates as a modulo 2 ⁵ = 32-decimal counter.
When the signal FD ₁ is "1" and the signal FD ₃ is "0", the counter 337 operates as a 24-base counter. When the signals FD ₁ and FD ₃ are both "1", it operates as a hexadecimal counter. FIG. 18 shows some details of the timing pattern memory 335, and the AND circuit 343 that generates the signal FD ₁ is connected to the counter
The AND circuit 344 that generates the signal FD ₃ becomes operable when _the lower two bits of data Q ₂ and _{Q 1 of} the counter 337 are “01”. Become. AND circuit 343
A signal for selecting a predetermined base pattern (a base pattern corresponding to a 24-decimal or 18-decimal rhythm) from the base pattern designation circuit 334 is added to the other input via the OR circuit 345. AND circuit 34
A signal for selecting a bass pattern corresponding to the hexadecimal rhythm is applied from the bass pattern designating circuit 334 to the other input of the numeral 4 via the OR circuit 346. Therefore, in the case of 24-decimal notation, when the lower bit data Q ₂ and Q ₁ of the counter 337 become "01", the signal
FD ₁ immediately becomes "1", the bit of data Q ₁ is incremented by 1, and data Q ₂ and Q ₁ become "10". Data Q ₂ and Q ₁ become “11” at the timing of the next pulse TCL. In this way, data Q ₂ and Q ₁ are “10”
The timing (decimal 3, 7, 11, 15,
19, 23, 27, 31) are skipped, and the counter 337 of the modulus 32 performs substantially 24-base operation. 18
In the case of digits, when the data Q ₂ and Q ₁ of the counter 337 become “01” and when the data Q ₄ and Q ₃ become “01”, the signal FD ₁ or FD ₃ immediately becomes “1”. “1” in bit of data Q ₁ or data Q ₃
is added. Therefore, data Q ₄ and Q ₃ are “10”
and the timing when data Q ₂ and Q ₁ become “10” (decimal numbers 3, 7, 9, 10, 11,
12, 15, 19, 23, 25, 26, 27, 28, 31) are skipped, and the counter 337 of modulo 32 is effectively
Performs hexadecimal operation. Rhythms that cause the counter 337 to operate as a 32-decimal counter include, for example, march, jazz rock, tango, begin, rumba, mambo, bossa nova, and samba. Rhythms that cause the counter 337 to operate as a 24-digit counter include waltz, ballad, swing, slow rock, and bolero. Also,
The rhythm that operates the counter 337 in hexadecimal notation is the waltz variation mode VB. In this example, the base pattern consists of 2 measures, so if the counter 337 is set to 32 notation, 2 measures will be divided into 32 timings, and if it is set to 24 notation, 2 measures will be divided into 24 timings. become. If you divide one measure using quarter note triplets, it will be divided into 12 timings. Therefore, in a rhythm using triplets, the counter 3
37 is expressed in base 24, and for rhythms that do not use triplets, it is expressed in base 32 or hexadecimal. FIG. 18 shows a detailed example of the base pattern generation read-only memory 333 by extracting only the path that generates the base pattern shown in FIG. Assuming that the base pattern shown in FIG. 12 is the base pattern of the third variation of the swing normal base pattern mode, the base pattern designation circuit 334 uses the swing selection signal SW, the normal mode selection signal
A signal SW _{3 for selecting the base pattern shown in FIG. 12 is output from the AND circuit 347 to which NB and the third variation selection signal BV 3 are} input. The swing base pattern selection signal _SW3 passes through the OR circuit 345, enables the AND circuit 343, and switches the frequency division ratio of the counter 337 to 24 base. The outputs Q ₁ to _{Q 5} of the counter 337 are added to an AND circuit group 348 of the timing pattern memory 335 so that the counted values can be decoded and timing pulses TP ₁ to _{TP 32} corresponding to each counted value can be generated. . The signal SW ₃ for selecting the base pattern in FIG. 12 passes through a predetermined OR circuit of the OR circuit group 349 and enables a predetermined AND circuit of the AND circuit group 348, and the timing pulses TP ₁ , TP ₅ ,
TP ₉ , TP ₁₃ , TP ₁₇ , TP ₂₁ , TP ₂₅ , and TP ₂₉ are generated sequentially at equal time intervals. That is, the pattern shown in FIG. 12 uses only quarter notes. Further, the signal SW ₃ is sent to predetermined AND circuits 350, 351, 352, 35 of the pitch pattern memory 336.
3,354 operational. These AND circuits 350 to 354 correspond to the intervals of the root and subordinate notes (1st, 3rd, perfect 5th, major 6th, and minor 7th) used in the pattern of FIG. 12. Then, predetermined timing pulses TP ₁ , TP ₅ ,...
TP ₂₉ is added to predetermined AND circuits 350 to 354, and the outputs of these AND circuits 350 to 354 are combined by OR circuits corresponding to each pitch to generate base pattern pulses T ₁ , T ₅ , T ₈ , T ₁₀ , T ₁₁ , ... are generated at predetermined timing. Although Fig. 18 shows only the path for generating one bass pattern, the circuits for other bass patterns are constructed based on the same idea as above depending on their timing and pitch, so details are shown here. Before long, the entirety of the base pattern generation read-only memory 333 will have become clear. In addition, the operation enable signal EN applied to the AND circuits 350, 351, etc. in the pitch pattern memory 336 is the basic tempo clock pulse TCL.
This signal is generated from the AND circuit 355 in FIG. 6 in synchronization with . This is because if adjacent timing pulses TP ₁ to _{TP 32} obtained by decoding the output of the counter 337 are combined using an OR circuit, they will become DC and there will be no separation, so the clock pulse TCL (for example, duty 1/2) This is because they are separated by . Mutual reset control of automatic performance devices The automatic bass chord performance control device 31, automatic rhythm performance device 342, and other automatic performance devices (not shown) can now control the start or stop of a performance in relation to each other. ing. This control is enabled by turning on a synchro start switch (not shown) of the rhythm selection switch matrix 328 (FIG. 16). When the synchro start switch is turned on, a synchro start signal SSW is output from the selected rhythm detecting section 325 (FIG. 6), and the synchro start signal SSW is output from the line 35.
6, the AND circuit 357 is enabled. Other inputs of the AND circuit 357 include an inverted signal of the automatic performance off signal OFF supplied from the function decoder 47 in FIG. 4 via a line 358, and a key depression signal KO from the AND circuit 86 in FIG.
A signal inverted by an inverter 359 is added. Therefore, in the case of synchronized start (SSW=
“1”), when automatic bass chord performance is selected (="1"), when all keys on the lower keyboard and pedal keyboard are released (KO="0"), the AND circuit 357 The condition is met and a signal “1” is provided on line 360. The signal "1" on line 360 turns on field effect transistor 361, making the reset signal "0". The reset signal that has become “0” is the automatic rhythm playing device 34.
2 (Fig. 2) and other automatic performance devices, and stops the automatic rhythm performance. When the key is pressed and the key press signal KO becomes “1”, the AND circuit 35
The output of transistor 361 becomes "0" and transistor 361 is turned off. As a result, the reset signal rises from "0" to "1". The automatic rhythm performance device 342 and other automatic performance devices (for example, automatic arpeggio devices) detect that the reset signal rises from "0" to "1", and start their own automatic performance in time with the start of automatic bass chord performance. Starts the performance, or if it is in the middle of a performance, returns to the beginning and performs automatic performance. This is a synchronized start. The reset signal is sent to the automatic rhythm playing device 342.
and other automatic performance devices are also supplied to the automatic bass chord performance control device 31 via the same line. For example, when automatic rhythm performance is stopped in the automatic rhythm performance device 342, the reset signal becomes "0", and when automatic rhythm performance is started, the reset signal changes from "0" to "1".
stand up. In the automatic bass chord performance control device 31, when the reset signal becomes "0", automatic performance based on the bass pattern is stopped, and progression of the bass pattern is started in synchronization with the rise of the reset signal. In FIG. 6, the reset signal is appropriately delayed by a shift register 362 for timing adjustment, inverted by an inverter 363, and supplied to all data set lines 365 of the counter 337 via an OR circuit 364. When the reset signal is “0”, the signal on the all data set line 365 becomes “1”, and the count value of the counter 337
Q ₁ to _{Q 5} are all “1”. Therefore, even if the clock pulse TCL is supplied, the contents _Q1 to _Q5 of the counter 337 do not change, and the base pattern does not move. The reset signal is also on line 366.
The output signal EN is connected to the AND circuit 355, and its output signal EN is set to "0". Therefore, the bass pattern pulses T ₁ to _{T 17} are also no longer generated, and automatic performance based on the bass pattern is stopped. When the signal rises from "0" to "1", one differential pulse is generated from the differentiating circuit 388, passes through the OR circuit 339, and becomes the counting input of the counter 337. At this time, the signal on the line 365 becomes "0", so the contents of the counter 337 overflow and become all "0". Therefore, the base pattern starts from the first timing (timing of the first beat) in synchronization with the rise of the reset signal. The signal CS applied to the other inputs of the OR circuit 364 is generated when the contents of a counter (not shown) that counts basic tempo clock pulses TCL in the automatic rhythm performance device 342 are all "1". This is a signal for synchronizing the automatic bass chord performance counter 337 with the above counter. Note that when the operation enable signal EN becomes "0", the pulse T ₁
~T ₁₇ is blocked, direct current octave pitch signal
T ₀ is not blocked. A reset signal ₁ taken out from a stage in the middle of the shift register 362 to a line 367 is inverted by an inverter and then applied to an AND circuit 368. Therefore, when the reset signal becomes "0", the AND circuit 368 becomes operational. If a key is pressed on the lower keyboard or pedal keyboard, the output of the AND circuit 357 is "0", and the signal "1" inverted via the delay flip-flop 369 and inverter for timing adjustment is output to the AND circuit 368. are joining. Therefore, when the reset signal becomes "0" while the key is being pressed, the AND circuit 368 produces an output "1", which passes through the OR circuit 370 and generates the sustained tone signal Y. The sustained sound signal Y is the fourth
It is added to OR circuits 228 and 299 in the figure. Therefore, the sustained sound signal Y is continuously (DC-wise) “1”
Then, the bass sound generation timing signal BT also becomes "1" continuously, and the AND circuit 187 in FIG.
The bass sound generation command signal PE is repeatedly generated at the same cycle as the start code SC as long as a key is pressed on the pedal keyboard (or as long as the memory function is activated). Further, the sustained tone signal Y passes through the OR circuit 299 and enables the AND circuit 300 (FIG. 4) to pass the octave pitch signal _T0 . Therefore, as described above, if the note on the first beat of the bass pattern has a pitch one octave higher than the root note, a note one octave higher is generated as a sustained note. In other words, when sustained sound signal Y occurs,
The sound of the first beat of the bass pattern selected at that time is continuously generated as a bass sound (pedal keyboard sound). Further, the sustained tone signal Y is output from the OR circuit 371 in FIG.
After that, it is output as a sustained sound gate signal NG.
Sustaining sound gate signal NG is chord sound (lower keyboard sound)
This signal is used to generate the sound as a sustained tone, and is applied to the envelope generating circuit 33 in the same manner as the chord tone generation timing signal CG, and causes the lower keyboard tone to be generated as a sustained tone. Since the signal is inverted by the inverter and applied to the OR circuit 371, the sustained tone gate signal NG is generated even when automatic bass chord performance is turned off (="0"). This is because when automatic bass chord performance is not performed, the lower keyboard notes (chord notes) are made into sustained notes, so that the rhythm will not be automatically interrupted. Note that when the lower keyboard note is generated as a sustained note using the sustained note gate signal NG, the volume level may be set appropriately lower than when the chord note is torn using the chord note generation timing signal CG. This will correct the auditory senses, allowing you to hear sustained tones and intermittent chord tones at the same level of volume. Further, in this embodiment, the envelope generation circuit 33 is controlled by the chord sound generation timing signal CG and the sustained sound gate signal NG, but the present invention is not limited to this.
An analog gate may be provided between the sound system 38 and the sound system 38, and the analog gate may be controlled by the chord sound generation timing signal CG and the sustained sound gate signal NG only in the case of lower keyboard sounds. When the key press signal KO becomes "0" due to key release, the output of the AND circuit 357 becomes "1" (provided that the synchro start signal SSW is "1" and the signal is also "1"), and the AND circuit 368 becomes "1". It becomes inactive. Therefore, the sustained sound signal Y disappears. Therefore, if the reset signal becomes "0" when automatic bass chords are being played during synchronized start, automatic bass playing based on the bass pattern will stop, but as long as keys are being pressed, a sustained note will be generated. . The reset signal is also applied via line 366 to AND circuit 372 of FIG. A signal is applied to the other inputs of the AND circuit 372, which becomes operable only when automatic bass chord performance is selected. When the reset signal is "0", the output of the AND circuit 372 is also "0",
The output of inverter 373 is "1". Therefore, AND circuit 374, delay flip-flop 3
75, and the delay flip-flop 3 through the AND circuit 376 and the delay flip-flop 377.
75 and 377 hold the signal "1". In this case, the condition of the AND circuit 378 is satisfied, and the signal RSC becomes "0" after passing through the inverter 379.
The signal RSC is the key data selection gate section 2 in Fig. 5.
It is added to an AND circuit 380 for controlling 33. When the signal RSC is “0”, the AND circuit 38
Since the output of 0 is also “0”, the inverter 232
The output becomes "1", and the AND circuit 231 becomes operational. Therefore, the base sound generation command signal PE
Or chord sound data generation timing signal
A signal “1” output from the OR circuit 230 in response to LKE is guided to the processed data selectable line 234. When the reset signal rises from "0" to "1", the output of the AND circuit 372 in FIG. 4 becomes "1", and at the time of this rise, one pulse is generated from the differentiating circuit 381. Only during this one pulse, the output of the inverter 373 becomes "0", and the memories in the delay flip-flops 375 and 377 become "0". Therefore, the AND circuit 378 becomes inactive and the signal RSC becomes "1". When the signal RSC becomes "1", the AND circuit 380 in FIG. 5 becomes operational, and the AND circuit 187 outputs a bass sound generation command signal.
When PE is added to the AND circuit 380, the output of the AND circuit 380 becomes "1", and the AND circuit 2
31 becomes inoperative. As a result, the key code data AN ₁ to _{AK 2} of the bass sound are no longer supplied to the channel processor 30 . When the first start code signal SC counting from the time when the memory of delay flip-flop 375 in FIG. 4 becomes "0" is supplied from AND circuit 66 in FIG. 3 to OR circuit 382 via line 324,
The AND circuit 374 is operated by the output "1" of the OR circuit 382 (the differential pulse has already disappeared, so the output of the inverter 373 is "1"), and a signal "1" is sent to the delay flip-flop 375.
is input. After one bit time, the output of the delay flip-flop 375 becomes "1",
"1" is added to one input of the AND circuit 376, but since the start code signal SC has already fallen to "0", the condition of the AND circuit 326 is not satisfied, and the memory of the delay flip-flop 377 is "0".
It remains as it is. When the next start code is generated and the signal SC becomes "1", "1" is added to the AND circuit 376 via the OR circuit 383, and the output "1" of the AND circuit 376 is transferred to the delay flip-flop 3.
77 is stored. In this way, when the memories of both delay flip-flops 375 and 377 both become "1", the condition of AND circuit 378 is satisfied and the signal
RSC becomes “0”. Therefore, AND circuit 380 in FIG. 5 becomes inoperable, and AND circuit 231 becomes operable. Therefore, the reset signal changes from “0” to “1”.
Generation of automatic bass sound is suppressed from the time when the start code SC is generated until the start code SC is generated twice. That is, the bass sound that was being produced as a sustained sound when the reset signal became "0" is erased in synchronization with the rising edge of the reset signal (by the signal Y becoming "0"),
When this signal becomes "1", it becomes possible to perform automatic bass chords according to the bass pattern, but the automatic bass chord is played for a predetermined period of time (the time when the start code SC occurs twice) from the rise of this signal. Prevents sound generation. This makes it clear that the sustained sound has been erased. As already explained, when the same key code data is not supplied even once during one generation interval of the start code SC, the channel processor 30 determines that the key associated with the key code has been released. Therefore, while the start code SC occurs twice, the bass tone key code data AN ₁ ~
If the generation of AK ₂ is suppressed, the channel processor 30 will naturally process it as if the pedal keyboard has been released, and no bass sound will be generated. As described above, when the synchronized start signal SSW is "1", other automatic performances such as automatic rhythm or automatic arpeggio and automatic bass chord performance mutually send and receive reset signals to synchronize the start or stop of the performance. Regarding the generation of sustained sounds: The constant signal CON applied to the OR circuit 385 via line 384 in Figure 6 suppresses the performance of the bass pattern during automatic bass chord playing, and generates the bass sound (pedal keyboard sound) as a sustained sound. The value is “1” in this case. This constant signal CON is generated in response to a switch operation or the like by the performer. When the signal CON becomes “1”, the continuous tone signal Y is output through the OR circuits 385 and 370.
is generated, so a sustained tone is generated as described above. If any rhythm or variation bass pattern (BV ₁ to BV ₃ ) is selected, at least one output line of the bass pattern designation circuit 334 becomes a signal “1”. In the base pattern designation circuit 334, as shown in FIG. 18, the signals of all output lines are applied to an OR circuit 386 to obtain a base pattern selection display signal SE. This base pattern selection display signal SE is inverted by an inverter 387 in FIG.
join. Therefore, if no bass pattern is selected at all, the signal SE is "0" and the output "1" of the inverter 387 is applied to the OR circuit 385 to generate the sustained tone signal Y. Therefore, when a bass pattern is not selected by the player during automatic bass performance, a sustained tone is generated. Further, when the sustained tone signal Y is generated by the output "1" of the OR circuit 385, the signal MCON generated via the OR circuit 389 becomes "1".
Signal MCON is applied to AND circuit 309 in FIG. A reset signal is also input to the OR circuit 389 via line 366. Therefore, when the reset signal is "1", the signal MCON is also "1", and one of the operating conditions for the AND circuit 309 is satisfied. When the reset signal becomes “0”, the signal
Since MCON becomes “0”, the AND circuit 309
becomes inactive, and the memory signal M becomes "0".
This will stop the memory function. Note that when only the rhythm type is selected and the bass pattern variations (BV ₁ to _{BV 3} ) are not selected, the first variation BV ₁ is automatically designated. Variation selection signals BV ₁ to BV ₃ output from the selected rhythm detection section 325 in FIG. 6 are applied to a NOR circuit 398. If variation is not selected, all signals BV ₁ to _{BV 3} are “0” and the NOR circuit 3
The output XX of 98 becomes "1". This Noah circuit 3
The output “1” of 98 is passed through the OR circuit 399 to the first
It is applied to the base pattern designation circuit 334 as a variation selection signal _BV1 . Therefore, the base pattern (pattern pulses T ₁ to T ₁₇ , T ₀ ) of the first variation (BV ₁ ) of the selected rhythm is generated from the base pattern generating section 41 . The output signal XX of the NOR circuit 398 is the output signal of the NOR circuit 216 in FIG.
and the OR circuit 299, and each AND circuit (217, 218
etc.) are made inoperative and the AND circuit 300 is enabled. Therefore, according to the bass sound generation timing in the bass pattern of the first variation (BV ₁ ), the sound of the first beat of the bass pattern (the root note or the note one octave above it) will be repeatedly sounded. . About chord sound generation timing control Chord sound generation timing control section 4 shown in FIG.
3 has a configuration substantially similar to the base pattern generating section 41 shown in FIG. In Figure 7, numbers 329' and 33 with dash symbols are shown.
0', 331', 332', 337', 338', 3
39', 340', 341', 355', 362',
364', 365', 384', 385', 388'
The circuits indicated by are the same numbers 329 to 33 without the dart signal in FIGS. 6 and 16.
2,337-341,355,362,364,
Since the circuits 365, 384, 385, and 388 operate in the same manner as the circuits indicated by them, a description thereof will be omitted. The selected rhythm detecting section 390 is configured almost similarly to the selected rhythm detecting section 325 (FIG. 16) of the base pattern generating section 41, except that the chord pattern includes variations BV ₁ to BV like the base pattern. ₃ , so no related circuit is provided. Variation BV ₁
~The data regarding BV ₃ is the bit of the rhythm selection signal.
Since this is included in MP ₆ (see Table 7 above) and is not used in the chord pattern, only data MP ₂ to _{MP 5} are input as rhythm selection signals. Code pattern generation read-only memory 39
1 also base pattern generation read only memory 3
33 (FIGS. 6 and 18), except that the code pattern generation read-only memory 391 only has a timing pattern memory 392 and a code pattern designation circuit 393.
It does not have pitch pattern memory. That is,
Since the chord pattern only needs to indicate the timing to strike the chord, there is no need to distinguish between pitches as in the case of a bass pattern. The concept of configuring the timing pattern memory 392 and code pattern designation circuit 393 is exactly the same as that of the base pattern timing pattern memory 335 and the base pattern designation circuit 334, but the program contents of the memory 392 and memory 335 are completely different. different. This is because the sounding timing of the chord pattern and the sounding timing of the bass pattern are different. code pattern memory 392
The chord patterns (timings at which the chord sounds are played) corresponding to each rhythm are stored in the . As an example, the swing chord pattern is the 19th chord pattern.
As shown in the figure. In the same figure, a is the code pattern of normal mode NB, and b is the code pattern of variation mode VB.
This is the code pattern. In this way, in general, each rhythm has a normal
It is now possible to select either the NB or variation VB pattern. When the swing rhythm is selected, AND circuits 394 and 395 of the chord pattern designation circuit 393 are enabled, the AND circuit 394 is activated by the normal mode selection signal NB, and the AND circuit 394 is activated by the variation mode selection signal VB. Then, the AND circuit 395 operates. Also, since the swing rhythm includes triplets (see Figure 19b), the AND circuit 3
Based on the output “1” of 94 or 395, the frequency division ratio switching signal FD ₁ becomes “1”, and the counter 33
7' operates as a 24-decimal counter. In the case of the pattern shown in FIG. 19a, the AND circuit 39
Based on the output "1" of 4, the counter 337'
When the count value becomes 5, 13, 21, and 29 in decimal, a pulse is generated, and is applied to an AND circuit 397 via an OR circuit 396. When it becomes a 24-decimal counter, the count value of counter 337' is 3, 7, 11,
Since 15, 19, 23, 27, and 31 are skipped, the above-mentioned pulses are generated at the timing when 4, 10, 16, and 22 pulses TCL are counted. In the case of the pattern shown in FIG. 19b, the AND circuit 39
Based on the output "1" of the counter 337'
The count value is decimal 1, 5, 9, 12, 16, 20, 24,
28, a pulse is generated from the OR circuit 396. In terms of timing, 1, 4, 7, 9,
When 12, 15, 18, and 21 pulses TCL are counted, the OR circuit 396 generates a pulse, respectively. The code pattern pulse generated from the OR circuit 396 passes through the AND circuit 397 and is used as a chord sound generation timing signal CG. The other input of the AND circuit 397 is the AND circuit 3 in FIG.
Signal LKM from 98 and initial clear signal
A signal obtained by inverting the IC, an operable signal EN from the AND circuit 355', and a signal obtained by inverting the output of the OR circuit 385' by an inverter are added. The signal LKM is a delay flip-flop 83.
This is established when the AND condition between the lower keyboard key press memory signal MLK stored in FIG. 3 and the inverted signal of the off signal OFF is satisfied. That is, when key presses on the lower keyboard (chord keyboard) are stored during automatic bass chord performance, the signal LKM becomes "1". The signal obtained by inverting the output of the OR circuit 385' becomes "0" when a sustained tone is generated, and prevents generation of the chord tone generation timing signal CG. Instead, as described above, the sustained tone gate signal NG is generated in order to produce the lower keyboard tone (chord tone) as a sustained tone. Operation enable signal
As mentioned above, EN is a signal for dividing the chord sound generation timing signal CG by basic tempo pulses TCL (for example, duty 1/2). For example, in the case of the chord pattern shown in FIG. 19b, the chord sound generation timing signal as shown in FIG.
CG is generated. In the above embodiment, the lower keyboard 28 is used as a keyboard for playing chord sounds, and the pedal keyboard 29 is used as a keyboard for playing bass sounds. Any other appropriate keyboard may be used for automatic bass chord performance. Regarding automatic glitsando A circuit for automatic glitsando performance can be constructed based on almost the same idea as in the case of automatic bass performance described above. That is, the pattern pulses T ₁ to _{T 17} for generating the subordinate tone forming data SD ₁ to _{SD 5} correspond to the bass pattern selected by the bass pattern generating section 41 (FIG. 6) in the case of bass performance. However, in the case of a glitsando performance, it is sufficient to generate the glitsando pattern in accordance with the glitsando pattern. Gritsand has the effect of sequentially changing the pitch by semitones (rising or falling), so in other words, the pitches represented by the subordinate tone formation data SD ₁ to _{SD 5} are shifted sequentially by semitones at predetermined intervals. , a glitsand pattern is set such that the values of the subordinate tone forming data SD ₁ to _{SD 5} sequentially change by semitone intervals at predetermined time intervals. A circuit for generating a glissand pattern can have a configuration similar to that of the base pattern generating read-only memory 333 shown in FIG. 6.
That is, instead of the read-only memory that stores the base pattern, a read-only memory that stores the glissand pattern may also be provided. Both the bass pattern and the glitsand pattern have something in common in that they shift the pitch by a predetermined amount at a predetermined timing. FIG. 20 schematically shows an example of a circuit for realizing automatic gris sando, which corresponds to (can be replaced with) the automatic bass chord performance control device 31 in FIG. 2. . The 24 types of pattern pulses T ₁ to _{T 24} generated from the grit sand pattern generation read-only memory 400 are 1
It corresponds to 24 intervals divided by semitones from a degree to a major seventh interval one octave higher. Pulse T ₁ is 1 degree, T ₂ is minor 2 degree (2 ^b ), T ₃ is major 2 degree (2), T ₄ is minor 3 degree (3 ^b )...T ₂₃ is minor 7 degree one octave higher. , T ₂₄ is a major 7 an octave higher
Each corresponds to a degree interval. Each pattern pulse T ₂ ~
_T24 is added to the pitch numerical value memory 401, and subordinate tone forming data _SD1 to _SD5 of values corresponding to each pitch are generated. The glit sand pattern generation read-only memory 400 stores various glit sand patterns in advance, and, like the base pattern generation read-only memory 333, basic timing information is given from the counter 402. There are various glissando patterns depending on factors such as the length of the note, the range of pitch change (maximum pitch change), and the direction of pitch change (rising or falling). Second
Figure 1 shows an example of the Gritsand pattern using a staff staff.The lower first line is the root note (1st interval), and the subordinate notes of various intervals to this root note are shown on the staff staff. It is something. The example shown in FIG. 5A shows a glitz sand pattern in which the length of the note is a 32nd note, the pitch range is one octave from 1st to 8th, and the direction of pitch change is rising. The example in figure b is
It shows a glitsando pattern in which the note length is a 16th note, the range of change is a perfect fourth interval from the 8th subordinate to the 5th subordinate, and the direction of pitch change is descending. The address input data of the read-only memory 400 includes note information GLV, changing range information GLW, rising/falling information UP/DN, etc.
GLV specifies the note length and changes range information
GLW specifies the width (maximum pitch) of the changing range, and rising/falling information UP/DN specifies the direction of pitch change. Gritsand pattern designation circuit 403
supplies data specifying a predetermined glissando pattern to the timing pattern memory 404 and the pitch pattern memory 405 in accordance with the input information GLV, GLW, UP/DN. The timing pattern memory 404 stores note lengths and ranges of variation (number of notes) in a specified glitz sand pattern.
One of the timing pulses TP ₁ to _{TP 32} is selected and inputted to the memory 405 according to the timing pulses TP 1 to TP 32 . Pitch pattern memory 405 is memory 404
Timing pulses selectively supplied from TP ₁
~ _TP32 ) are assigned to predetermined pitches according to the designated glitzand pattern, and pattern pulses ( _T1 ~ _T24 ) are generated. The detailed configuration of the glit sand pattern generation read-only memory 400 can be configured in accordance with the detailed configuration of the base pattern generation read-only memory 333 shown in FIG. In addition, when the grit sand pattern shown in FIG. 21a is selected, the pattern pulse is T ₁ →T ₂ →
T ₃ →T ₄ →T ₅ →T ₆ →T ₇ →T ₈ →T ₉ →T ₁₀ →T ₁₁ →T ₁₂
→T ₁₃ occurs in the order. Also, in the case of figure b
Pattern pulses are generated in the order of T ₁₃ →T ₁₂ →T ₁₁ →T ₁₀ →T ₉ →T ₈ . The follower tone forming data SD ₁ to _{SD 5} whose values change sequentially over time according to the glitzand pattern are added to the arithmetic circuit 406 and stored in the note code memory 40.
7 and the data stored in the octave code memory 408. The arithmetic circuit 406 is the fifth
Adders 195 to 201 and numerical correction circuit 207 in the figure
This is a circuit that includes the following. Note code memory 407
The octave code memory 408 is a circuit including the note code memories 158 to 161 and octave code memories 154 to 156 shown in FIG. For example, the upper keyboard 27 for playing melody (Figure 2)
In order to be able to apply automatic glissand to a note pressed by a key, the AND circuit 410 of the glysand start/stop circuit 409 detects that the key code KC of the upper keyboard 27 is supplied from the key coder 26. It is detected and a signal “1” is added to the AND circuit 411. Gritsu Sand Switch 412
When turned on, the AND circuit 411 becomes operational, and when the key code data of the note pressed on the upper keyboard 27 is supplied, the output of the AND circuit 411 becomes "1". The output “1” of the AND circuit 411 is applied to the note code memory 407 and the octave code memory 408 via the line 413, and the note codes N ₁ to N ₄ and octave codes B ₁ to _{B 3} of the upper keyboard tones supplied from the key coder 26 are sent. is stored in each memory 407, 408. Further, the output "1" of the AND circuit 411 is supplied to the set line 415 of the counter 402 via the inverter 414, and sets the set data to "0". Counter 402 is therefore enabled and counts the clock pulses provided by glissand clock pulse generator 416. counter 40
2 operates, the glitsand pattern starts to move, and subordinate tone forming data SD ₁ to _{SD 5} are generated.
In addition, pattern pulses T ₁ to _{T 24} are OR circuits 417
and is added to the processed data selection control section 418 as the sound generation timing signal BT. The processed data selection control section 418 uses the coincidence signal EQ in FIG.
It has the same configuration as the circuit portion that generates the bass sound generation command signal PE based on the above, and generates the upper keyboard sound generation command signal UE in response to the sound generation timing signal BT, the coincidence signal EQ, etc. Signal UE is selection gate 4
19, the calculation result of the calculation circuit 406, that is, the changed key code data, is selected by the gate 419 and sent to the channel processor 30. As explained above, according to the present invention, the content of key information representing a sound selected by pressing a key etc. is changed by calculation (addition) to create key information representing a different sound. Therefore, automatic gritsand performance can be easily realized. That is, the key coder 26 and the channel processor 30
By simply inserting an automatic glissando circuit as shown in FIG. 20 between the two and changing the contents of the key information as appropriate, complex automatic performances can be realized. In addition, the sound represented by the key information created by addition may be a sound (high pitch) that does not actually exist on the keyboard, so this has the advantage of increasing the sound range of the electronic musical instrument. bring. In particular, a pedal keyboard generally only has a key range of about two octaves on the bass side, but according to the present invention, a pedal keyboard sound in a higher range, that is, a bass sound, can be generated as an automatic glissando sound.

[Brief explanation of the drawing]

Fig. 1 is a block diagram for explaining the basic concept of this invention, Fig. 2 is a block diagram showing an embodiment of an automatic bass chord playing device, and Fig. 3 is a block diagram for explaining the basic concept of the invention.
FIG. 4 is a circuit diagram showing a detailed example of the chord detection section in the embodiment shown in FIG. 2, FIG. FIG. 6 is a circuit diagram showing a detailed example of the key code processing section, FIG. 6 is a circuit diagram showing a detailed example of the base pattern generating section in the same embodiment, and FIG. 7 is a chord sound generation timing control section 4 in the same embodiment.
3 is a circuit diagram showing a detailed example of 3, FIG. 8 is a diagram for explaining the method of illustrating various logic circuits, etc., and FIG. Timing chart showing one operation example and one operation example of the circuit of FIG. 5 when generating the bass sound generation command signal PE when selecting the custom function, No. 10
The figure explains that the scanning status of each note name data in the scanning circuit of Fig. 3 is synchronized with the time-sharing generation of note codes N ₁ ^* to N ₄ ^* in the note name encoder of Fig. 5. Timing chart, 1st
Figure 1 shows the code detection signal CD in the circuit of Figure 3.
Timing charts, Figures 12 and 13, show an example of a bass pattern using a staff notation. Figure 12 is a diagram showing an example of a swing base pattern, Figure 13 is a diagram showing an example of a march base pattern, and Figure 14 is a diagram showing an example of a chord sound generation command signal LE when the single finger function is selected. FIG. 15 is a timing chart showing an example of the operation of the circuit in FIG. 17 is a timing chart for explaining the time division multiplexed signal detection operation in the circuit of FIG. 16, and FIG. 18 is a circuit diagram showing a detailed example of the selected rhythm detection section of FIG. 6. FIG. 19 is a circuit diagram partially showing a detailed example of a base pattern generation read-only memory; FIG. 19 is an example of a chord pattern generated from the circuit of FIG. A diagram showing an example of a timing signal CG,
FIG. 20 is a block diagram showing an embodiment of an electronic musical instrument for automatic glissando performance according to the present invention;
FIG. 21 is a diagram showing an example of a gritsand pattern on a musical staff. 26...Key coder, 28...Lower keyboard, 29...
...Pedal keyboard, 30...Channel processor,
31... Automatic bass chord performance control device, 32...
...Music tone generation circuit, 39...Chord detection section, 40...
. . . Data generation section for subordinate tone formation, 41 . . . Base pattern generation section, 42 . . . Key code processing section, 43 . . .
...Chord sound generation timing control unit, 87...Scanning circuit, 96...Chord detection logic, 107...
Pitch name encoder, 109...Chord type detection circuit, 129...Bass type subtone selection gate section, 15
4-156...Octave code memory, 158
~161...Note code memory, 195~20
DESCRIPTION OF SYMBOLS 1...Adder, 215...Chord system subordinate tone selection gate section, 213...Pitch numerical value memory, 207...Numeric value correction circuit, 325, 390...Selection rhythm detection section, 333...Base pattern generation read-only memory , 337, 337'...Counter, 39
1...Code pattern generation read-only memory, 400...Gritsand pattern generation read-only memory.

Claims (1)

[Claims] 1. A key data generator that generates key data representing a note selected by a key pressed on a keyboard, and a key data generator that generates key data representing the note selected by a key pressed on a keyboard, and a key data generator that sequentially generates pitch data corresponding to the number of tones of each scale note arranged at semitone intervals at predetermined time intervals. an arithmetic unit that calculates the key data and the interval data to form key data representing a sound that is separated from the sound represented by the key data by the number of tones represented by the interval data; and a musical tone generating device for generating a musical tone represented by the key data formed by the arithmetic device, the electronic musical instrument generating a musical tone whose pitch changes sequentially by semitones.