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JPS6242392B2 - - Google Patents
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JPS6242392B2 - - Google Patents

Info

Publication number
JPS6242392B2
JPS6242392B2 JP54064240A JP6424079A JPS6242392B2 JP S6242392 B2 JPS6242392 B2 JP S6242392B2 JP 54064240 A JP54064240 A JP 54064240A JP 6424079 A JP6424079 A JP 6424079A JP S6242392 B2 JPS6242392 B2 JP S6242392B2
Authority
JP
Japan
Prior art keywords
film
sio
capacitor
layer
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54064240A
Other languages
Japanese (ja)
Other versions
JPS55156355A (en
Inventor
Takashi Ito
Takao Nozaki
Hajime Ishikawa
Masaichi Shinoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6424079A priority Critical patent/JPS55156355A/en
Publication of JPS55156355A publication Critical patent/JPS55156355A/en
Publication of JPS6242392B2 publication Critical patent/JPS6242392B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/60Capacitors
    • H10D1/62Capacitors having potential barriers
    • H10D1/66Conductor-insulator-semiconductor capacitors, e.g. MOS capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/662Laminate layers, e.g. stacks of alternating high-k metal oxides

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Description

【発明の詳細な説明】 本発明は、半導体装置用のコンデンサに関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a capacitor for a semiconductor device.

従来、半導体装置用コンデンサには、金属ある
いは半導体の上へ絶縁層を付着し、さらに金属等
の電極を被着した構造のものが用いられてきた。
半導体装置に用いるコンデンサとしては、大容量
で小型安価である必要があり、絶縁層としては、
作りやすい二酸化シリコン(SiO2)、アルミナ
Al2O3、窒化シリコンSi3N4等の膜が用いられてき
た。この内、SiO2はシリコン基体を酸化雰囲気
中で熱処理することによつて簡単に薄いピンホー
ル等のない良質のものが作られるが、誘電率が小
さい、放射線等の照射に弱い、不純物汚染に弱い
等の欠点がある。Al2O3は一般に化学蒸着法、ア
ルミニウムの陽極酸化法によつて作り、誘電率は
大きいが、薄いものではリーク電流が大きく、損
失が大きくなる。Si3N4はシリコンの熱窒化反応
でも生成できるが、膜厚が制限されるため耐圧に
問題がある。絶縁膜にはその他、SiO,Ta2O5
TiO2等も用いられるが、薄い良質の膜は得られ
ていない。
Conventionally, capacitors for semiconductor devices have a structure in which an insulating layer is deposited on a metal or semiconductor, and an electrode made of metal or the like is further deposited.
Capacitors used in semiconductor devices must have large capacity, be small and inexpensive, and as an insulating layer,
Silicon dioxide (SiO 2 ) and alumina that are easy to make
Films such as Al 2 O 3 and silicon nitride Si 3 N 4 have been used. Of these, SiO 2 can be easily made into thin, high-quality materials without pinholes by heat-treating a silicon substrate in an oxidizing atmosphere, but it has a low dielectric constant, is susceptible to radiation, and is susceptible to impurity contamination. There are drawbacks such as weakness. Al 2 O 3 is generally produced by chemical vapor deposition or aluminum anodic oxidation, and has a high dielectric constant, but if it is thin, it will have a large leakage current and a large loss. Si 3 N 4 can also be produced by thermal nitridation of silicon, but this limits the film thickness and poses a problem with breakdown voltage. The insulating film also contains SiO, Ta 2 O 5 ,
TiO 2 and the like are also used, but thin, high-quality films have not been obtained.

本発明は、容量の大きな小型の半導体装置用コ
ンデンサを製造する新しい手法を提供するもので
あり、特に安定性、均一性、量産性に優れた特徴
を有するものである。本発明のコンデンサの基本
とするところは、コンデンサの一方の電極となり
得る任意の基板に付着せしめたSiO2膜を窒素原
子を構成原子として含む雰囲気と反応せしめて、
該SiO2膜の少くとも一部をシリコンオキシナイ
トライド層に変換した絶縁膜を用いる点にある。
以下本発明を実施例について説明する。
The present invention provides a new method for manufacturing a small capacitor for a semiconductor device with a large capacity, and is particularly characterized by excellent stability, uniformity, and mass productivity. The basic principle of the capacitor of the present invention is that a SiO 2 film attached to an arbitrary substrate that can serve as one electrode of the capacitor is reacted with an atmosphere containing nitrogen atoms as constituent atoms.
The point is that an insulating film in which at least a part of the SiO 2 film is converted into a silicon oxynitride layer is used.
The present invention will be described below with reference to Examples.

本発明の好ましい形態は、シリコン基板を酸化
性雰囲気で熱処理することにより生成したSiO2
膜を誘電体として用いたものである。例えば、シ
リコンウエハーを乾燥酸素中1000℃で1時間熱処
理すると、約700Åの厚みのSiO2膜が得られる。
このSiO2膜は他の方法で基板に付着せしめたも
のより緻密かつ均一で、ピンホール等の欠陥のな
い良質のものである。続いてアンモニア(NH3
ガスを含む雰囲気で1200℃、1時間熱処理すると
前記SiO2膜の表面層約30ÅはN/Oが約1
(SiO2のOがそのまゝのものとNで置されたもの
とが等量にある)のシリコンオキシナイトライド
層に変換される。なお窒化雰囲気は、NH3の他に
N2H4あるいはプラズマ化したN2、さらに好まし
くはプラズマ化したN2とH2混合ガスなども使用
できる。前記の方法で生成した絶縁膜は不純物汚
染に強くすなわちピンホール等がなく、また単な
るSiO2膜に比べて誘電率が大きいことが見い出
された。しかも膜厚を極めて薄くすることが可能
なので容量の大きなコンデンサを作ることができ
る。次に第1図を参照しながら本発明コンデンサ
の製造工程の一例を説明する。
In a preferred embodiment of the present invention, SiO 2 is produced by heat-treating a silicon substrate in an oxidizing atmosphere.
A film is used as a dielectric. For example, if a silicon wafer is heat treated in dry oxygen at 1000° C. for 1 hour, a SiO 2 film with a thickness of about 700 Å can be obtained.
This SiO 2 film is denser and more uniform than those deposited on the substrate by other methods, and is of good quality with no defects such as pinholes. followed by ammonia (NH 3 )
When heat treated for 1 hour at 1200°C in an atmosphere containing gas, the surface layer of the SiO 2 film of about 30 Å has an N/O ratio of about 1.
(O of SiO 2 is converted into a silicon oxynitride layer in equal amounts as is and substituted with N). In addition to NH3 , the nitriding atmosphere
N 2 H 4 or plasma N 2 , more preferably plasma N 2 and H 2 mixed gas, etc. can also be used. It has been found that the insulating film produced by the above method is resistant to impurity contamination, that is, there are no pinholes, etc., and has a higher dielectric constant than a simple SiO 2 film. Moreover, since the film thickness can be made extremely thin, a capacitor with a large capacity can be manufactured. Next, an example of the manufacturing process of the capacitor of the present invention will be explained with reference to FIG.

先ず同図1に示すように0.1Ωcmの比抵抗のn
型シリコン半導体基板1を用い、1000℃の乾燥酸
素中で5分間加熱して該基板表面に同図2に示す
ように約100Åの熱酸化SiO2膜2を作り、次いで
100%NH3ガス中で、1200℃、1時間加熱して同
図3に示すようにSiO2膜2の表面約30Åの厚み
の部分をシリコン窒化物を含む層(シリコンオキ
シナイトライド層)にする。シリコンオキシナイ
トライド(SiOxNy)については、本出願人の出
願に係る特願昭53−72654で詳述した。かゝる絶
縁膜2,3上に同図4に示すように1μmの厚さ
のアルミニウムを被着し(これは基板1の裏面に
も被着させてもよい)、パターニングして電極4
を作る。こゝでは小型化を目的としているので電
極4の面積は1mm2と小さい。次に400℃のN2雰囲
気で熱処理を10分行い、コンデンサとするが、個
別素子とする場合は電極4の周縁に沿つて基板を
切断する。本素子は、小型ながら3500pFの容量
をもちtanδは10-3と優れていることがわつた。
またその歩留りは、ウエハー面内で90%以上であ
り非常に安価にできる特徴がある。この素子は、
混成集積回路素子として、特にマイクロ波用IC
素子として有用である。
First, as shown in Figure 1, the specific resistance n of 0.1Ωcm
A type silicon semiconductor substrate 1 is heated in dry oxygen at 1000°C for 5 minutes to form a thermally oxidized SiO 2 film 2 of about 100 Å on the surface of the substrate as shown in FIG.
By heating in 100% NH 3 gas at 1200°C for 1 hour, the surface of the SiO 2 film 2 with a thickness of approximately 30 Å is converted into a layer containing silicon nitride (silicon oxynitride layer), as shown in Figure 3. do. Silicon oxynitride (SiOxNy) is described in detail in Japanese Patent Application No. 72654/1983 filed by the present applicant. As shown in FIG. 4, aluminum with a thickness of 1 μm is deposited on the insulating films 2 and 3 (this may also be deposited on the back surface of the substrate 1), and patterned to form the electrodes 4.
make. Since the purpose here is miniaturization, the area of the electrode 4 is as small as 1 mm 2 . Next, a heat treatment is performed for 10 minutes in a N 2 atmosphere at 400° C. to form a capacitor, but in the case of forming individual elements, the substrate is cut along the periphery of the electrode 4. Although this device is small, it has a capacitance of 3500 pF and an excellent tan δ of 10 -3 .
Moreover, the yield is over 90% within the wafer surface, and it is characterized by being extremely inexpensive. This element is
As a hybrid integrated circuit element, especially microwave IC
It is useful as an element.

その他の実施例としては、第2図の1トランジ
スタ型MOSダイナミツクメモリー素子が挙げら
れる。第2図の1において10は、p型シリコン
基板で、比抵抗5Ωcmである。11は選択的に形
成した厚み8000ÅのフイールドSiO2膜であり、
この膜11のない領域に200Åの厚みのSiO2膜1
2を熱酸化法により形成する。同図2において
かゝる基板を1100℃、1時間、NH3ガス中で処理
することにより、約30Åのシリコンオキシナイト
ライド層13を形成する。同図3において、多結
晶シリコンを3000Å付着して、ホトエツチング法
により電荷蓄積用の電極14を形成する。同図4
において、基板10上の絶縁層12及び13を、
電極14をマスクとしてエツチングしてから、
1100℃乾燥酸素中で30分処理して、約700Åの
SiO2膜15を付着する。同図5において、電極
14と同様に多結晶シリコンを3000Å付着してか
ら、パターニングし転送トランジスタ用ゲート1
6を形成する。さらに、イオン注入法でp+を2
×1015cm-2、150KeVで注入し、n+層17を形成
する。さらに必要に応じて、全表面に絶縁膜を付
着して、多層配線を行うこともできる。このメモ
リーセルは、本発明に係る高性能コンデンサ素子
をもつ所に特徴がある。すなわち、従来のSiO2
膜に比べて、シリコンナイトライド層をもつ
SiO2膜使用によつて容量は約30%増加するた
め、同じ印加電圧でも、30%多くの電荷を蓄積す
ることができ、メモリーの読み出し誤差を少くす
ることができる。第2図では、200Åの絶縁膜を
用いているが、本発明では、100Å以下の膜厚の
ものも均一に作ることができるから、さらに数倍
の電荷を蓄積することが可能であり、これはメモ
リーセル面積を従来のものに比べて数分の1にで
きることを意味する。
Another example is the one-transistor type MOS dynamic memory device shown in FIG. In 1 of FIG. 2, 10 is a p-type silicon substrate with a specific resistance of 5 Ωcm. 11 is a selectively formed field SiO 2 film with a thickness of 8000 Å,
A SiO 2 film 1 with a thickness of 200 Å is placed in the area where this film 11 is not present.
2 is formed by a thermal oxidation method. In FIG. 2, such a substrate is treated in NH 3 gas at 1100° C. for 1 hour to form a silicon oxynitride layer 13 with a thickness of about 30 Å. In FIG. 3, polycrystalline silicon is deposited to a thickness of 3000 Å and a charge storage electrode 14 is formed by photo-etching. Figure 4
, the insulating layers 12 and 13 on the substrate 10 are
After etching the electrode 14 as a mask,
After processing for 30 minutes at 1100℃ in dry oxygen, the thickness of about 700Å
A SiO 2 film 15 is deposited. In FIG. 5, similarly to the electrode 14, polycrystalline silicon is deposited to a thickness of 3000 Å, and then patterned to form the transfer transistor gate 1.
form 6. Furthermore, p + was increased by 2 using ion implantation method.
×10 15 cm −2 and 150 KeV to form the n + layer 17. Furthermore, if necessary, an insulating film can be attached to the entire surface to perform multilayer wiring. This memory cell is characterized by having a high performance capacitor element according to the present invention. i.e. conventional SiO2
Compared to the film, it has a silicon nitride layer.
Using the SiO 2 film increases the capacitance by approximately 30%, so even with the same applied voltage, 30% more charge can be stored, reducing memory read errors. In Figure 2, an insulating film of 200 Å is used, but with the present invention, a film with a thickness of 100 Å or less can be made uniformly, so it is possible to store several times more charge. This means that the memory cell area can be reduced to a fraction of that of conventional ones.

第1図に示した構造のコンデンサに1MHzの高
周波電圧を印加して容量を測定した結果を第3図
に示す。SiO2膜厚は100Åとした。従来の構造に
相等する、窒素を含む雰囲気中での熱処理時間零
のものでは比誘電率は3.85であつたが、1200℃の
100%NH3中の熱処理によつて比誘電率は徐々に
増加し、5時間後では5.30となり、38%の増加を
示した。リーク電流は特に増えないのでtanδが
38%増加した事になり、実用上大きな利点があ
る。本方法によれば100Å以下の膜厚にて、実用
的な容量素子を作ることが可能であり、又、量産
性が容易安価の特徴が得られる。
Figure 3 shows the results of measuring the capacitance by applying a 1MHz high frequency voltage to the capacitor having the structure shown in Figure 1. The SiO 2 film thickness was 100 Å. The relative permittivity of the structure equivalent to the conventional structure, which requires zero heat treatment time in an atmosphere containing nitrogen, was 3.85, but that of the structure at 1200°C.
The dielectric constant gradually increased by heat treatment in 100% NH 3 and reached 5.30 after 5 hours, representing an increase of 38%. Since the leakage current does not particularly increase, tanδ
This is a 38% increase, which is a great practical advantage. According to this method, it is possible to make a practical capacitive element with a film thickness of 100 Å or less, and it also has the advantage of being easy to mass produce and being inexpensive.

以上詳細に説明したように本発明は、SiO2
の表面をシリコンオキシナイトライド化してなる
絶縁膜を持つコンデンサに係り、容量が大きく、
安定性が高く、微小化容易従つてメモリなどに適
当、量産容易である等の利点を有する。
As explained in detail above, the present invention relates to a capacitor having an insulating film formed by converting the surface of an SiO 2 film to silicon oxynitride, which has a large capacity,
It has advantages such as high stability, easy miniaturization, suitable for memory, etc., and easy mass production.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に係るコンデンサの製造工程を
説明する断面図、第2図は1トランジスタセルに
適用した本発明の実施例を示す工程図、第3図は
熱処理時間と誘電率の関係を示す特性図である。 図面で、1は半導体層、2は二酸化シリコン
膜、3はシリコン窒化物を含む層、4は金属電極
である。
Fig. 1 is a cross-sectional view explaining the manufacturing process of a capacitor according to the present invention, Fig. 2 is a process diagram showing an embodiment of the present invention applied to a one-transistor cell, and Fig. 3 shows the relationship between heat treatment time and dielectric constant. FIG. In the drawings, 1 is a semiconductor layer, 2 is a silicon dioxide film, 3 is a layer containing silicon nitride, and 4 is a metal electrode.

Claims (1)

【特許請求の範囲】 1 半導体層または該半導体層に被着した金属層
上の二酸化シリコン膜を窒素を構成原子として含
む雰囲気で熱処理して該二酸化シリコン膜の表面
部をシリコン窒化物を含む層とし、かゝる絶縁膜
に半導体また金属の電極を被着して前記半導体層
または金属層と共にコンデンサとしてなることを
特徴とする、半導体装置用コンデンサ。 2 半導体層がシリコン半導体基板であり、二酸
化シリコン膜が該基板表面を熱酸化して得られた
酸化膜であることを特徴とする特許請求の範囲第
1項記載の半導体装置用コンデンサ。
[Claims] 1. A silicon dioxide film on a semiconductor layer or a metal layer deposited on the semiconductor layer is heat-treated in an atmosphere containing nitrogen as a constituent atom to transform the surface portion of the silicon dioxide film into a layer containing silicon nitride. A capacitor for a semiconductor device, characterized in that a semiconductor or metal electrode is coated on the insulating film to form a capacitor together with the semiconductor layer or the metal layer. 2. A capacitor for a semiconductor device according to claim 1, wherein the semiconductor layer is a silicon semiconductor substrate, and the silicon dioxide film is an oxide film obtained by thermally oxidizing the surface of the substrate.
JP6424079A 1979-05-24 1979-05-24 Capacitor usable for semiconductor device Granted JPS55156355A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6424079A JPS55156355A (en) 1979-05-24 1979-05-24 Capacitor usable for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6424079A JPS55156355A (en) 1979-05-24 1979-05-24 Capacitor usable for semiconductor device

Publications (2)

Publication Number Publication Date
JPS55156355A JPS55156355A (en) 1980-12-05
JPS6242392B2 true JPS6242392B2 (en) 1987-09-08

Family

ID=13252411

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6424079A Granted JPS55156355A (en) 1979-05-24 1979-05-24 Capacitor usable for semiconductor device

Country Status (1)

Country Link
JP (1) JPS55156355A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5771806A (en) * 1980-10-17 1982-05-04 Nec Corp Forming method of nitrided film
JPS59181574A (en) * 1983-03-31 1984-10-16 Oki Electric Ind Co Ltd Manufacturing method of semiconductor device
JPS6151832A (en) * 1984-08-22 1986-03-14 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and manufacture therefor

Also Published As

Publication number Publication date
JPS55156355A (en) 1980-12-05

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