JPS6242408B2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Technical Field The present invention relates to a signal attenuator suitable for a volume adjuster of an audio device called an electronic volume, and particularly relates to a signal attenuator suitable for a volume adjuster of an audio device called an electronic volume. Regarding prevention of switching noise. (B) Background Art In general, a signal attenuator for a volume controller called an electronic volume, as shown in FIG. A signal input terminal 5 and a bias input terminal 6 receive an input signal V _i and a bias voltage V _b from an input signal source 3 and a bias circuit 4 whose impedance is lower than that of the input signal source 3 and the bias circuit 4, respectively. A resistive voltage dividing circuit 7 is connected between the resistive voltage dividing circuit 7 and configured by connecting a plurality of resistors 7a, 7b, . Further, it is composed of a plurality of analog switches 8a, 8b, . . . 8f, 8g whose output ends are commonly connected to the signal output terminal 2. Then, when you press operation button 9, the clock pulse CL corresponds to the number of times you pressed it.
is applied from the oscillator 10 to the counter 11, and the decoder 12 decodes the output of the counter 11.
The outputs D ₀ , _{D 1 .} Then, any one of the plurality of analog switches is turned on by this control signal, and the voltage at the voltage dividing point to which the turned-on analog switch is connected appears at the signal output terminal 2 as the output signal voltage _V0 . Also, analog switches 8a, 8b...8f,
Generally, as shown in FIG. A common electrode is connected to the input end 16 and the output end 17. and,
A control signal D and its inverted signal are applied to the gates of the N-type and P-type transistors 14 and 13, and the on/off control of the transmission gate 15 is performed. By the way, among the plurality of analog switches of the signal attenuator, the input terminal of the analog switch 8g is directly connected to the bias input terminal 6 without going through the resistance voltage divider circuit 7, and when applied to an electronic volume, In order to reduce crosstalk, the on-resistance of this analog switch 8g must be reduced. Therefore, the P-type and N-type transistors 13 constituting the analog switch 8g
and 14 must be increased, but as the size of the transistor is increased, the gate-source capacitance and gate-drain capacitance also increase, so when switching an analog switch, the gate voltage change increases these capacitances. This has the disadvantage that switching noise leaks into the output through the switch and appears on the output side. (c) Purpose of the Invention The present invention can be applied to electronic volumes by significantly reducing the switching noise of analog switches included in signal attenuators, especially analog switches whose input terminals are directly connected to bias input terminals. In this case, the present invention provides a novel signal attenuator that makes it possible to suppress crosstalk as much as possible. (d) Embodiment FIG. 3 is a block diagram showing an embodiment of the signal attenuator according to the present invention, and the same components as in FIG. 1 are given the same numbers. In the signal attenuator of the present invention, as shown in FIG. Switches 18 are connected in parallel. And analog switches 8a, 8
As in Fig. 1, the outputs D ₀ , D ₁ ......D _o-1 of the decoder 12 are applied to the analog switch 8g as control signals.
A signal obtained by delaying _o by a delay circuit 19 is applied, and a signal D _o is applied to a small analog switch 18 connected in parallel. here,
The analog switch 8g is larger in size than the other analog switches 8a, 8b, . . . 8f. Therefore _, if the control signals D _{0 ,} D _{1 .}
Since a delayed signal is applied, the small analog switch 18 does not turn on immediately, but first turns on the small analog switch 18. When the switch is on, since the analog switch 18 is small in size, only small switching noise is generated. Then, when the delayed signal becomes "1" and the analog switch 8g is turned on, a large switching noise is generated, but the small analog switch 18 is turned on first and is connected to the signal output terminal 2. Since the bias circuit 4 has a lower impedance than the load 1, the switching noise generated is transferred to the small analog switch 18 connected in parallel.
Since the switching noise is bypassed to the bias circuit 4 side via the load 1 side, almost no switching noise appears on the load 1 side. In this way, switching noise when the analog switch 18 is turned on can be prevented from appearing on the output side. Also, the control signals D ₁ , D ₁ ......D _o-1 , D _o are "00...
...01" to "00...10", the analog switch 18 connected in parallel turns off before the analog switch 8g, but before the analog switch 8g turns off, the previous analog switch 8f turns off. turns on, so analog switch 8g
The switching noise when the switch is off is biased toward the bias circuit 4 side via the analog switch 8f at the previous stage, and almost no switching noise appears on the output side. Next, an embodiment using an analog switch that controls the gates of P-type and N-type transistors constituting a transmission gate with constant current will be described with reference to FIG. Figure 4 shows analog switches 8g and 1 in Figure 3.
8 and 8f, the input end of the transmission gate 20 is directly connected to the bias input terminal 6, and the output end is connected to the signal output terminal. Further, 21 is a transmission gate smaller in size than the transmission gate 20 and connected in parallel to the transmission gate 20 , and 22 is a preceding transmission gate.
Incidentally, as in the embodiment shown in FIG. 3, the size of the transmission gate 20 is assumed to be larger than the size of the transmission gate 22 . Also, in Fig. 4, 23, 24, 25, 2
6, 27, 28 are constant current sources, 29 , 30 ,
31 , 32 , 33 , 34 are composed of P-type and N-type transistors, and the transmission gates 20 , 21 , 22 are connected in accordance with the control signals _Do-1 , _Do and their inverted signals.
This is a changeover switch for selectively connecting the gates of the P-type and N-type transistors constituting the circuit to a constant current source. In addition, in the following description, all constant current values are assumed to be the same. Therefore, the control signals D ₀ , D ₁ from the decoder...
…D _o-1 , D _o is from “00………10” to “00………
01", the P-type transistors 35 and 36 and the N-type transistors 37 and 3 of the changeover switch
8 is turned on, each gate of the P-type transistors 39 and 40 of the transmission gate is connected to the constant current source 2.
5 and 26, and the capacitances between the gates and the substrate, that is, the gate capacitances C _oP and C _p start charging. Further, each gate of the N-type transistors 41 and 42 of the transmission gate is connected to a constant current source 23.
and 24, and charging of the gate capacitances C _oN and C _N is also started. However, transmission gate 2
1 is smaller than the size of transmission gate 20 , gate capacitances C _p and C _N are C _op and C N , respectively.
The transmission gate 21 , which has a smaller capacitance than _oN and is therefore smaller in size, turns on before the transmission gate 20 . Therefore, similar to the embodiment shown in FIG. 3, large switching noise when the transmission gate 20 is turned on is biased from the bias input terminal 6 to the bias circuit via the transmission gate 21 , and does not appear on the output side. . Also, control signals D ₀ , D ₁ ......D _o from the decoder
_-1 , D _o changes from "00...01" to "00...10", the P-type transistor 43 and N-type transistor 44 of the changeover switches 33 and 34 turn on, and the transmission gate 22 of the previous stage turns on. P-type transistor 45 and N-type transistor 46 are connected to constant current sources 28 and 27, respectively, and gate capacitances Co _-1P and Co _-1N start charging. On the other hand, the P-type transistors 39 and 40 of the transmission gate are connected to constant current sources 23 and 24, respectively, and the N-type transistors 41 and 42 of the transmission gate are connected to constant current sources 25 and 26, respectively, and the gate capacitance C _op and C _p , C _o
N and C _N start discharging the stored charges, and the smaller transmission gate 21 turns off first. However, the gate capacitances C _o-1p and C _o-1N are each C _o
Since the capacitance is smaller than _p and C _oN , the transmission gate 20 is turned off after the previous stage transmission gate 22 is turned on. Therefore, switching noise when the transmission gate 20 is off is bypassed from the bias input terminal 6 to the bias circuit via the transmission gate 22 and the resistor 7f at the previous stage. In the embodiment shown in FIG. 4, no square wave is applied to the gates of the P-type and N-type transistors constituting the transmission gate, and the gate voltage changes smoothly.
Switching noise is further reduced. Incidentally, in the embodiment, the switching noise when turned off is bypassed through the analog switches 8f and 22 in the previous stage, but even if the switching noise is bypassed through the small-sized analog switches 18 and 21 connected in parallel, good. That is, the fifth
Delay circuit 47 and OR gate 4 as shown in the figure
In the embodiment shown in FIG. 3, input terminals 49 and 50 in FIG.
The control signal D _o and the output of the delay circuit 19 are inputted to each of the gates, and the output signal G of the OR gate 48 is used as the control signal of the analog switch 18. In addition, in FIG. 4, the input terminal 4 of the circuit shown in FIG.
A control signal D _o is input to both terminals 9 and 50, and the output signal G is used as a control signal for the analog switch consisting of the transmission gate 21 . Further, in the bias circuit that supplies the bias voltage V _b , the voltage V _b may be 0, that is, the ground potential. Furthermore, in FIG. 4, the constant current values of the constant current sources do not all have to be the same, and a delay circuit 19 for delaying the control signal D _o may be added as shown in FIG. 3. Also, analog switches other than those whose input terminals are directly connected to the bias input terminal, for example, analog switches 8a, 8b, . . . 8f in FIG.
Analog switches smaller in size than each analog switch may be connected in parallel. (E) Effect As mentioned above, the signal attenuator according to the present invention can reduce the switching noise of the analog switch included in the signal attenuator, and therefore, when applied to an electronic volume, the input end can be directly As the analog switch connected to the bias input terminal, it is possible to use a large-sized analog switch, that is, an analog switch with a small on-resistance, and crosstalk can be suppressed as much as possible. Note that, according to experimental results, switching noise can be reduced to about a few tenths.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing a conventional signal attenuator.
Fig. 2 is a circuit diagram showing a general analog switch, Fig. 3 is a block diagram showing an embodiment of the present invention,
FIG. 4 is a detailed view of main parts showing another embodiment of the present invention;
FIG. 5 is a circuit diagram of a main part for realizing still another embodiment of the present invention. Explanation of main figure numbers, 1...Load, 2...Signal output terminal, 3...Input signal source, 4...Bias circuit,
5...Signal input terminal, 6...Bias input terminal,
7... Resistor voltage divider circuit, 8a, 8b......8f, 8
g...Analog switch, 15 ...Transmission gate,
18...Analog switch, 19...Delay circuit,
20 , 21 , 22 ...transmission gate, 23, 24,
25, 26, 27, 28...constant current source, 29 , 3
0, 31 , 32 , 33 , 34 ...changeover switch,
47...Delay circuit, 48...OR gate.

Claims (1)

[Claims] 1. A signal output terminal to which a load is connected, a signal input terminal and a bias input terminal respectively connected to an input signal source and a bias circuit having an impedance lower than that of the load, and a plurality of series-connected resistors. a resistor voltage divider circuit connected between the bias input terminal and a plurality of analog switches each having an input terminal connected to one end of each resistor of the resistor voltage divider circuit and an output terminal commonly connected to the signal output terminal. In the signal attenuator, a second analog switch smaller in size than the first analog switch is connected in parallel to the first analog switch whose input end is directly connected to the bias terminal among the plurality of analog switches. connect to,
A signal attenuator characterized in that the second analog switch is turned on before the first analog switch is turned on.