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JPS6243356B2 - - Google Patents
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JPS6243356B2 - - Google Patents

Info

Publication number
JPS6243356B2
JPS6243356B2 JP12905581A JP12905581A JPS6243356B2 JP S6243356 B2 JPS6243356 B2 JP S6243356B2 JP 12905581 A JP12905581 A JP 12905581A JP 12905581 A JP12905581 A JP 12905581A JP S6243356 B2 JPS6243356 B2 JP S6243356B2
Authority
JP
Japan
Prior art keywords
layer
conductivity type
current
cladding layer
buried
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP12905581A
Other languages
Japanese (ja)
Other versions
JPS5831591A (en
Inventor
Mitsunori Sugimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP12905581A priority Critical patent/JPS5831591A/en
Publication of JPS5831591A publication Critical patent/JPS5831591A/en
Publication of JPS6243356B2 publication Critical patent/JPS6243356B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • H01S5/2275Buried mesa structure ; Striped active layer mesa created by etching

Landscapes

  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)

Description

【発明の詳細な説明】 本発明は、埋め込み構造半導体レーザの改良に
関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in buried structure semiconductor lasers.

第1図に、従来におけるInGaAsP/InP埋め込
み構造半導体レーザを示す。第2図にこのタイプ
の半導体レーザの電流―光出力特性の一例を示
す。この様なレーザにおいては、活性層3に流れ
る電流Ieに比べて、リーク電流ILを小さくする
ことが、低しきい値及び高効率を実現する上で重
要となつている。活性層3の両脇を流れるリーク
電流ILは、上側クラツド層(p―InP)4、埋
め込み層(n―InP)7、電流ブロツク層(p―
InP)6、下側クラツド層(n―InP)2からな
るpnpn構造によつて極めて小さく出来る。しか
しpnpn構造がターンオンすると過大なリーク電
流ILが流れるため、pnpn構造のターンオン電圧
を高くすることが必要である。このターンオン電
圧を高くすることは各層のキヤリア濃度を適当に
することにより容易である。しかし第1図のIG
で示す様なゲート電流が流れるとサイリスタ作用
により、ターンオン電圧が極端に低下する。この
様なゲート電流IGを無くすことは活性層3と電
流ブロツク層6の上の境界とを合わせて、電流通
路をなくすことによつて可能である。しかし実際
に、ゲート電流IGの電流通路のない構造を再現
性良く製作することは製造技術上ほとんど不可能
である。すなわち、実際の半導体レーザでは、ゲ
ート電流IGが多かれ少なかれ流れるため、半導
体レーザの注入電流を増すにつれ、ゲート電流I
Gが増大し、pnpn構造のターンオン電圧が低下す
る。そして、半導体レーザに加わる印加電圧がタ
ーンオン電圧になつたとき、pnpn構造がターン
オンして、過大なリーク電流ILが流れるため、
第2図に示す様に光出力が激減する。そのため、
第2図に示す様な素子では、最高出力が30℃で約
20mW程度と低かつた。又、高温になるほど、小
さい注入電流でターンオンするため、高温の出力
が特に低下する。この様に、従来の埋め込み構造
半導体レーザでは、pnpn構造にゲート電流IG
流れるとターンオン電圧が低下して、低い注入電
流でターンオンするため、最高出力が低く、特に
高温での出力が特に低下するという欠点を有して
いた。
FIG. 1 shows a conventional InGaAsP/InP buried structure semiconductor laser. FIG. 2 shows an example of the current-optical output characteristics of this type of semiconductor laser. In such a laser, it is important to make the leakage current I L smaller than the current Ie flowing through the active layer 3 in order to achieve a low threshold and high efficiency. The leakage current I L flowing on both sides of the active layer 3 flows through the upper cladding layer (p-InP) 4, the buried layer (n-InP) 7, and the current blocking layer (p-InP).
The pnpn structure consisting of InP) 6 and lower cladding layer (n-InP) 2 makes it extremely small. However, when the pnpn structure is turned on, an excessive leakage current I L flows, so it is necessary to increase the turn-on voltage of the pnpn structure. It is easy to increase this turn-on voltage by adjusting the carrier concentration of each layer appropriately. However, I G in Figure 1
When a gate current as shown by flows, the turn-on voltage drops extremely due to the thyristor action. Such gate current I G can be eliminated by aligning the upper boundary between active layer 3 and current blocking layer 6 to eliminate a current path. However, in reality, it is almost impossible to fabricate a structure without a current path for the gate current I G with good reproducibility due to manufacturing technology. That is, in an actual semiconductor laser, the gate current I G flows more or less, so as the injection current of the semiconductor laser increases, the gate current I G flows more or less.
As G increases, the turn-on voltage of the pnpn structure decreases. Then, when the applied voltage applied to the semiconductor laser reaches the turn-on voltage, the pnpn structure turns on and an excessive leakage current I L flows.
As shown in FIG. 2, the light output is drastically reduced. Therefore,
For an element like the one shown in Figure 2, the maximum output at 30°C is approximately
It was low at around 20mW. Furthermore, the higher the temperature becomes, the smaller the injected current is required to turn on, so the output at high temperatures particularly decreases. In this way, in conventional buried structure semiconductor lasers, when a gate current I G flows through the pnpn structure, the turn-on voltage decreases and the turn-on occurs with a low injection current, resulting in a low maximum output, especially at high temperatures. It had the disadvantage of

本発明の目的は、ゲート電流IGが流れても
pnpn構造のターンオン電圧が低下せず、最高出
力が高くかつ高温時でも高出力の埋め込み構造半
導体レーザを提供する事にある。
The purpose of the present invention is to
The object of the present invention is to provide a buried structure semiconductor laser which has a pnpn structure with no drop in turn-on voltage, has a high maximum output, and has a high output even at high temperatures.

本発明によれば第1導電型の半導体基板と、こ
の半導体基板の上に形成されかつ電流ブロツク層
の禁制帯幅に比して小さな禁制帯幅を有する第1
導電型の第1の半導体層と、この第1の半導体層
の上に形成されたストライプ状の第1導電型の下
側クラツド層と、この下側クラツド層の上に形成
されたストライプ状の活性層と、この活性層の上
に形成されたストライプ状の第1導電型と反対の
第2導電型を有する上側クラツド層と、第1の半
導体層の上でかつ活性層の両側に形成された第2
導電型の電流ブロツク層と、この電流ブロツク層
の上でかつ上側クラツド層の両側に形成された第
1導電型の埋め込み層とを具備したことを特徴と
する埋め込み構造半導体レーザが得られる。
According to the present invention, there is provided a semiconductor substrate of a first conductivity type, and a first semiconductor substrate formed on the semiconductor substrate and having a forbidden band width smaller than that of a current blocking layer.
a first conductivity type semiconductor layer, a striped lower cladding layer of the first conductivity type formed on the first semiconductor layer, and a striped lower cladding layer formed on the lower cladding layer. an active layer, a striped upper cladding layer formed on the active layer and having a second conductivity type opposite to the first conductivity type, and a striped upper cladding layer formed on the first semiconductor layer and on both sides of the active layer. second
A buried structure semiconductor laser is obtained which is characterized by comprising a conductivity type current blocking layer and a first conductivity type buried layer formed on the current blocking layer and on both sides of the upper cladding layer.

以下図面を参照して本発明を詳しく説明する。 The present invention will be described in detail below with reference to the drawings.

第3図は、本発明の一実施例の断面図である。
図中、30はn―InP基板、31はバツフアー層
(n―InP、厚さ〜5μm)、32はn―InGaAsP
層(厚さ〜0.5μm、λ〜1.25μm)、33は下側
クラツド層(n―InP、厚さ〜03μm)、34は
活性層(ノンドープInGaAsP厚さ〜0.2μm)、3
5は上側クラツド層(厚さ〜2.5μm、p―
InP)、36はキヤツプ層(p―InGaAsP層、厚
さ〜0.7μm)、37は電流ブロツク層(p―
InP、厚さ〜0.5μm)、38は埋め込み層(n―
InP、厚さ〜2.5μm)、39はn―InGaAsP層
(厚さ〜1μm)、40はZn拡散層、41はSiO2
膜、42はp電極、43はn電極である。本実施
例においては、上側クラツド層35、埋め込み層
38、電流ブロツク層37、n―InGaAsP層3
2、バツフアー層31からなるpnpn構造でもれ
電流ILを阻止している。従来のpnpn構造と異な
り、本実施例のpnpn構造では、n―InGaAsP層
32の存在が特徴である。n―InGaAsP層32
があるため、上記pnpn構造の1部分であるnpn
トランジスタ44の利得を非常に小さくすること
が出来る。すなわち、n―InGaAsP層32がベ
ースに相当する電流ブロツク層(p―InP)37
よりも狭い禁制帯幅を有するため、エミツタ注入
効率が非常に小さくなり、そのため利得は非常に
小さくなる。
FIG. 3 is a cross-sectional view of one embodiment of the present invention.
In the figure, 30 is an n-InP substrate, 31 is a buffer layer (n-InP, thickness ~5 μm), and 32 is n-InGaAsP.
layer (thickness ~0.5 μm, λ ~1.25 μm), 33 is the lower cladding layer (n-InP, thickness ~03 μm), 34 is the active layer (non-doped InGaAsP thickness ~0.2 μm), 3
5 is the upper cladding layer (thickness ~ 2.5 μm, p-
36 is a cap layer (p-InGaAsP layer, thickness ~0.7 μm), 37 is a current blocking layer (p-
InP, thickness ~0.5μm), 38 is a buried layer (n-
39 is an n-InGaAsP layer (thickness ~ 1 μm), 40 is a Zn diffusion layer, 41 is SiO 2
In the film, 42 is a p-electrode, and 43 is an n-electrode. In this embodiment, an upper cladding layer 35, a buried layer 38, a current blocking layer 37, an n-InGaAsP layer 3
2. The pnpn structure consisting of the buffer layer 31 blocks the leakage current IL . Unlike the conventional pnpn structure, the pnpn structure of this embodiment is characterized by the presence of the n-InGaAsP layer 32. n-InGaAsP layer 32
Therefore, npn which is a part of the above pnpn structure
The gain of transistor 44 can be made very small. That is, the n-InGaAsP layer 32 is a current blocking layer (p-InP) 37 corresponding to the base.
Because it has a narrower bandgap than the 100% bandgap, the emitter injection efficiency becomes very small, and therefore the gain becomes very small.

この様に上記npnトランジスタ44の利得が非
常に小さいため、図中のゲート電流IGが流れて
も本実施例のpnpn構造のターンオン電圧は低下
しない。従がつて、各層のキヤリア濃度を適当に
してターンオン電圧を3〜4V程度に高くするこ
とにより実用的な注入電流領域でpnpn構造がタ
ーンオンせずに、ここを流れるリーク電流IL
ほとんど零にすることが出来る。
As described above, since the gain of the npn transistor 44 is very small, the turn-on voltage of the pnpn structure of this embodiment does not decrease even if the gate current I G shown in the figure flows. Therefore, by setting the carrier concentration in each layer appropriately and increasing the turn-on voltage to about 3 to 4 V, it is possible to prevent the pnpn structure from turning on in the practical injection current range and reduce the leakage current I L flowing through it to almost zero. You can.

この様に本実施例ではpnpn構造を流れる無効
電流がほとんど無いため高出力、及び高温動作が
可能な埋め込み構造半導体レーザが得られる。
As described above, in this embodiment, since there is almost no reactive current flowing through the pnpn structure, a buried structure semiconductor laser capable of high output and high temperature operation is obtained.

本実施例の埋め込み構造半導体レーザの製造方
法を簡単に述べる。まずn―InP基板30上にバ
ツフアー層31、n―InGaAsP層32、下側ク
ラツド層33、活性層34、上側クラツド層3
5、キヤツプ層36を液相エピタキシヤル技術等
を用いて形成する。次にSiO2膜等をマスクとし
たホトエツチングによりキヤツプ層36上側クラ
ツド層35、活性層34、下側クラツド層33を
ストライプ化する。その後再び液相エピタキシヤ
ル技術等を用いて電流ブロツク層37、埋め込み
層38、n―InGaAsP層39を形成する。成長
の際、キヤツプ層36の上にSiO2膜を形成しス
トライプの両側にのみ成長を行なわせる。その
後、SiO2膜41をCVD法及びホトエツチング法
を用いて形成し、Zn拡散層40、p電極42、
n電極43を形成する。
The manufacturing method of the buried structure semiconductor laser of this example will be briefly described. First, a buffer layer 31, an n-InGaAsP layer 32, a lower cladding layer 33, an active layer 34, an upper cladding layer 3 are formed on an n-InP substrate 30.
5. Form the cap layer 36 using liquid phase epitaxial technology or the like. Next, the cap layer 36, the upper cladding layer 35, the active layer 34, and the lower cladding layer 33 are formed into stripes by photoetching using a SiO 2 film or the like as a mask. Thereafter, a current blocking layer 37, a buried layer 38, and an n-InGaAsP layer 39 are formed again using liquid phase epitaxial technology or the like. During growth, a SiO 2 film is formed on the cap layer 36 and growth is performed only on both sides of the stripe. Thereafter, a SiO 2 film 41 is formed using the CVD method and photoetching method, and a Zn diffusion layer 40, a p-electrode 42,
An n-electrode 43 is formed.

最後に本発明が有する特徴を要約すると、リー
ク電流の極めて小さな、高出力及び高温動作が可
能な埋め込み構造半導体レーザが得られることで
ある。
Finally, to summarize the features of the present invention, it is possible to obtain a buried structure semiconductor laser with extremely small leakage current and capable of high output and high temperature operation.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のInGaAsP/InP埋め込み構造半
導体レーザの断面図である。第2図は従来の
InGaAsP/InP埋め込み構造半導体レーザの電流
―光出力特性の一例である。第3図は本発明の一
実施例のInGaAsP/InP埋め込み構造半導体レー
ザの断面図である。 図中、1…n―InP基板、2…下側クラツド
層、3…活性層、4…上側クラツド層、5はキヤ
ツプ層、6…電流ブロツク層、7…埋め込み層、
8…n―InGaAsP層、9…Zn拡散層、10…
SiO2膜、11…p側電極、12…n側電極、3
0…n―InP基板、31…バツフアー層、32…
n―InGaAsP層、33…下側クラツド層、34
…活性層、35…上側クラツド層、36…キヤツ
プ層、37…電流ブロツク層、38…埋め込み
層、39…n―InGaAsP層、40…Zn拡散層、
41…SiO2膜、42…p電極、43…n電極、
44…npnトランジスタである。
FIG. 1 is a cross-sectional view of a conventional InGaAsP/InP buried structure semiconductor laser. Figure 2 shows the conventional
This is an example of the current-optical output characteristics of an InGaAsP/InP buried structure semiconductor laser. FIG. 3 is a sectional view of an InGaAsP/InP buried structure semiconductor laser according to an embodiment of the present invention. In the figure, 1...n-InP substrate, 2...lower cladding layer, 3...active layer, 4...upper cladding layer, 5: cap layer, 6...current blocking layer, 7...buried layer,
8... n-InGaAsP layer, 9... Zn diffusion layer, 10...
SiO 2 film, 11...p-side electrode, 12...n-side electrode, 3
0... n-InP substrate, 31... buffer layer, 32...
n-InGaAsP layer, 33...lower cladding layer, 34
...active layer, 35... upper cladding layer, 36... cap layer, 37... current blocking layer, 38... buried layer, 39... n-InGaAsP layer, 40... Zn diffusion layer,
41...SiO 2 film, 42...p electrode, 43...n electrode,
44...npn transistor.

Claims (1)

【特許請求の範囲】[Claims] 1 第1導電型の半導体基板と、この半導体基板
の上に形成されかつ電流ブロツク層の禁制帯幅に
比して小さな禁制帯幅を有する第1導電型の第1
の半導体層と、この第1の半導体層の上に形成さ
れたストライプ状の第1導電型の下側クラツド層
と、この下側クラツド層の上に形成されたストラ
イプ状の活性層と、この活性層の上に形成された
ストライプ状の第1導電型と反対の第2導電型を
有する上側クラツド層と、前記第1の半導体層の
上でかつ前記活性層の両側に形成された第2導電
型の電流ブロツク層と、この電流ブロツク層の上
でかつ前記上側クラツド層の両側に形成された第
1導電型の埋め込み層とを具備したことを特徴と
する埋め込み構造半導体レーザ。
1 A semiconductor substrate of a first conductivity type, and a first semiconductor substrate of a first conductivity type formed on the semiconductor substrate and having a band gap smaller than that of the current blocking layer.
a striped lower cladding layer of the first conductivity type formed on the first semiconductor layer, a striped active layer formed on the lower cladding layer, and a striped lower cladding layer of the first conductivity type formed on the first semiconductor layer; a striped upper cladding layer having a second conductivity type opposite to the first conductivity type formed on the active layer; and a second cladding layer formed on the first semiconductor layer and on both sides of the active layer. A buried structure semiconductor laser comprising a conductivity type current blocking layer and a first conductivity type buried layer formed on the current blocking layer and on both sides of the upper cladding layer.
JP12905581A 1981-08-18 1981-08-18 Buried semiconductor laser Granted JPS5831591A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12905581A JPS5831591A (en) 1981-08-18 1981-08-18 Buried semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12905581A JPS5831591A (en) 1981-08-18 1981-08-18 Buried semiconductor laser

Publications (2)

Publication Number Publication Date
JPS5831591A JPS5831591A (en) 1983-02-24
JPS6243356B2 true JPS6243356B2 (en) 1987-09-12

Family

ID=14999966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12905581A Granted JPS5831591A (en) 1981-08-18 1981-08-18 Buried semiconductor laser

Country Status (1)

Country Link
JP (1) JPS5831591A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5842283A (en) * 1981-09-04 1983-03-11 Nippon Telegr & Teleph Corp <Ntt> Manufacture of buried type semiconductor laser
JPS59112671A (en) * 1982-12-20 1984-06-29 Kokusai Denshin Denwa Co Ltd <Kdd> Semiconductor laser
JPS6261386A (en) * 1985-09-11 1987-03-18 Sharp Corp Semiconductor laser element

Also Published As

Publication number Publication date
JPS5831591A (en) 1983-02-24

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