JPS6243539B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a chip mounting carrier for mounting components on a printed circuit board at high density.

In conventional flip chip ICs (hereinafter referred to as flip chips), bumps on the flip chip side (hereinafter referred to as chip bumps) are arranged in one row on each of the four sides of the chip, and the total number of bumps is about 30 at most. With recent advances in VLSI technology, attempts are being made to greatly increase the number of flip-chip bumps. In these devices, the arrangement of chip bumps is extremely dense, sometimes in the form of a grid, with one IC chip having over 100 bumps. Also, since the size of an IC chip is small, a few mm square, the size of one bump is from several tens of micrometers to about 100 micrometers in diameter at the largest. Therefore, it is extremely difficult to mount these high-density chip bumps on a circuit board.The reason for this is that when chip bumps are concentrated in a small area of a few mm square, such as in a flip chip, the number of conductors is too large to process on one plane of the board. The line width per line must be extremely thin. In addition, when processing on multiple planes, the number of conductors shared per plane may be reduced and the line width may increase, but on the other hand, it is necessary to concentrate a large number of through holes in the minute portions and distribute them over multiple planes. (connection), and the diameter of the through hole must be made extremely small.

Furthermore, the latter is difficult to realize because the through hole needs to be metallized and small diameter metallization causes extremely poor reliability.

The present invention aims to provide a chip mounting carrier for realizing highly reliable flip-chip ICs having high-density chip bumps on a high-density multilayer circuit board.

An embodiment of the present invention will be described below with reference to FIGS. 1 to 3.
This will be explained in detail using figures.

In FIG. 1, 1 is a sheet composed of a chip carrier base material made of a core material such as glass epoxy or phenol, and conductors 2 and 2', which will be described later.
0 is a surface of the base material of sheet 1 for mounting a semiconductor element such as a flip chip, 100 is a surface of the base material of sheet 1 for connecting a printed circuit board (not shown), and 2 and 2' are respectively The conductor extends from the surface 10 toward the surface 100 while expanding, and is disposed on the base material 1, the number of which is determined by the number of electrodes on one side of the flip-chip or the like to be mounted.

Next, FIG. 2 is a diagram showing a carrier for chip mounting constructed using the sheet shown in FIG. 1, and parts corresponding to those in FIG. 1 are designated by the same reference numerals and symbols.

That is, in FIG. 2, 3 is a spacer made of B-stage epoxy prepreg or the like. Here, the sheets 1, 1', 1'' are arranged at intervals so as to form a certain angle with each other, and between the sheets 1 and 1',
A spacer 3 as an insulating layer is inserted between the sheets 1' and 1''. Note that the spacer between the sheets 1' and 1'' is not shown. In this example of FIG. 2, sheets 1 and 1'' are single-sided circuit boards and sheet 1' is a double-sided circuit board having conductors 20 and 20' and conductors 200 and 200' on the opposite side.

As shown in FIG. 2, sheets and spacers having an insulating function are laminated in an alternating manner to obtain a carrier for chip mounting according to the present invention as shown in FIG. 3.

In FIG. 2, sheets 1 to 1'' are substrates that have already been completed by heat curing, etc., and have the same thickness on the surface 10 and surface 100 sides.Spacer 3 is an uncured B Stage 1
The plate thickness on the 00 side is thicker than that on the surface 10 side. When stacked in this configuration, the spacer 3 will be compressed by the pressure and heat during stacking to an amount determined by these conditions. That is, any interlayer distance can be precisely achieved with these conditions controlled, but the surface 100
In some cases, even if the thickness of the spacer 3 is approximate, the spacer 3 will sufficiently melt and flow to areas other than the surface 10 during the strongest lamination, and these values on the surface 10 side, which require extremely high precision compared to the above, may be ignored. As a result, the interlayer distance becomes sheet 1 which does not flow during lamination.
It is also possible to determine the thickness by 1″.

In FIG. 3, parts corresponding to those in FIGS. 1 and 2 are given the same reference numerals and symbols. That is, figure a shows the view seen from the chip mounting surface 10, and shows the conductors 2 to 2', 20.
~20', 200~200', etc. are arranged in a grid pattern and are exposed on the stacked end face 10. Figure b shows the surface 100 to be mounted on the high-density main circuit board, and the conductors 2-2', 20-20', 200-
200' are both in the x direction and y direction compared to the surface 10 side.
The pitch is enlarged in all directions, and the conductors are arranged in a lattice pattern. Therefore, chip elements having high density electrodes can be easily mounted on the main circuit board. In addition, in Fig. 2, the thickness of the spacer 3 is tapered so that it is thicker on the surface 100 side, but depending on the lamination press conditions, a spacer 3 with the same uniform thickness may be used, and the thickness is thicker on the side closer to the surface 10. The same structure can be obtained by flowing the molten material in the direction of the surface 100, or the same structure can be obtained by changing the thickness of the sheets 1 to 1''.

Furthermore, in FIGS. 1 and 2, a rectangular sheet 1
~1'' is shown, but the part that does not contribute to heat spread can be shaped by cutting off the dotted line shown in Figure 1, and these can be laminated to form the pyramid shape shown in Figure 3. Needless to say.

As explained above, according to the present invention, a chip carrier with a high degree of freedom in design is provided, which allows the pitch of an element such as a flip chip having high-density chip bumps to be expanded arbitrarily in either or both of the X and Y directions. Ru.

For example, a flip-chip IC several mm square with 100 bumps arranged in 10 rows and 10 columns has a double-sided conductor sheet 4.
Consists of two single-sided sheets. Also, the minimum conductor pitch on the surface 10 side that can be achieved is in the range of 10 to 100μ for both sheet thickness and conductor thickness, and the conductor width can be up to about 40μ, so if you design it with a 50μ sheet, 50μ conductor thickness, and width, it will be approximately 1 mm square. 50μ bump on flip chip
Even if 100 pieces are formed, it can be mounted on the tower.

Therefore, in a system using through-holes, the minimum hole diameter alone is about 400μφ, and even if the diameter were to be reduced, the reduction in reliability would be a problem, so the effect of the present invention is not great. be.

Note that the conductor pattern shape of each sheet shown in FIG. The effects of the present invention can be similarly achieved whether it is rotated or rotated at right angles.

The material used in the present invention may be a resin plate such as glass epoxy or ceramic, and the spacer 3 may be made of any material or structure that maintains the distance between them.

[Brief explanation of the drawing]

Fig. 1 is a perspective view showing a sheet of the present invention, Fig. 2 is a perspective view showing a device of the present invention in which the sheet of Fig. 1 is combined with an insulating layer, and Fig. 3a is a perspective view showing the outside of this device. FIG. 3b is a bottom view of FIG. 3a. In the figure, 1, 1', 1'' are sheets, 2,
2', 20', 200, and 200' are conductors, and 3 is an insulating layer. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A plurality of circuit boards each having a conductor on one or both sides, and an insulating layer inserted between the plurality of circuit boards, wherein the circuit board and the insulating layer are used as parts of the conductor. Chip mounting characterized in that the mounting surface and the circuit board mounting surface are integrated so as to be exposed as electrode parts, and the conductor spacing of the exposed electrode part is wider on the circuit board mounting surface than on the component mounting surface. carrier. 2. The carrier for chip mounting according to claim 1, wherein the circuit board is made of glass epoxy, phenol, or ceramic, and the insulating layer is made of prepreg or adhesive. 3. The carrier for chip mounting according to claim 1, wherein the insulating layer is made of alumina paste or glass adhesive.