JPS6246061B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention is directed to the inspection and trial testing of integrated circuits on chips or wafers without damaging the solder bumps used during the original driving of the chips or wafers to be measured. This invention relates to an electrode pad that has an auxiliary pad that can be used.

[Technical background of the invention and its problems]

Josephson devices that operate at extremely low temperatures have attracted attention in recent years because of their extremely high switching speed and low power consumption compared to conventional silicon devices, and their integration is progressing. In Josephson integrated circuits, since signals are extremely high-speed, mounting methods such as wire bonding cannot be used, and a mounting method with low parasitic inductance is required. For this purpose, the so-called flip-chip bonding method is suitable, in which microspheres of low-melting point solder are used to connect a chip or wafer to an external wiring board.

FIG. 1 shows the basic structure of a pad used in Josephson integrated circuit chips for flip-chip bonding. The method for forming the main electrode pad 2 is to first form the main electrode pad 2 in the form of an island on the silicon wafer 1. Next, an insulating layer 3-1 is deposited, and a wiring 4 is formed on the insulating layer 3-1 so as to be connected to the main electrode pad 2. After depositing an insulating layer 3-2 thereon and further depositing an intermediate metal 5 to improve the adhesion between the pad portion 2 and the solder, that is, the solder bump 6,
Solder bumps 6 are formed.

Next, a method of performing an operation test or inspection of the chip 9 to be measured in a wafer state without cutting it into chips or cutting the chip will be described. An example in which the film is cut into chips will be explained. As an example is shown in FIG. 2, the cut out chip 9 to be measured is placed in the sample holder 7, the solder bumps 6 of the chip 9 to be measured are brought into contact with the spring 8 of the sample holder 7, and the chip is immersed in liquid helium to input and output signals. . The disadvantage of this method is that when a pressure 10 is applied to obtain contact, the solder bumps 6 may be damaged or, in extreme cases, may peel off due to the weak mechanical strength of the solder material. As a result,
As shown in Figure 3, in order to connect the chip and the wiring board during the original circuit drive, the chip is heated and melted to deform the solder three-dimensionally, and the solder layer is made three-dimensional using surface tension. hand,
When bonding to a wiring board, the loss of solder on each pad during the inspection stage is not constant, so
The heights of the solder bumps are no longer the same, and areas where solder is missing during the inspection stage cannot be connected to pads on the opposing wiring board.

[Purpose of the invention]

In order to solve this drawback, the present invention provides, in addition to the main electrode pad, an auxiliary pad that is used only during inspections or operation tests. Also,
It is characterized by connecting the main electrode pad and the auxiliary pad with solder, and its purpose is to transfer the signal of the main electrode pad to the auxiliary pad connected by a thin layer of solder during inspection by touching the test terminal. In other words, when testing is performed without damaging the solder on the main electrode pad, and after the test is completed, the solder is heated to make it three-dimensional, and when connecting to the wiring board, the main electrode pad and auxiliary pad are separate,
The purpose is to reduce parasitic inductance and the like so that it does not have an adverse effect on transmission characteristics.

[Embodiments of the invention]

FIGS. 4 and 5 show an embodiment of the present invention,
2 is the main electrode pad on the chip, 3-1 and 3-2 are insulating layers, 4 is wiring, 5 is an intermediate metal that forms a region that has adhesiveness with the metal of the so-called low melting point solder material, and 6 is, for example, In- Bi-Sn eutectic alloy or other In
11 is an auxiliary pad, 12 is a wiring board, and 13 is a main electrode pad on the wiring board.

Figure 4a shows the main electrode pad 2 on the chip 9 to be measured.
A cross-sectional structural diagram of the auxiliary pad 11 and the auxiliary pad 11 connected by the solder bump 6 is shown. Figure b is a plan view thereof. The solder bump 6 connecting the main electrode pad 2 and the auxiliary pad 11 is not provided with the intermediate metal 5 to reduce adhesion with the insulating layer, and has a flat shape with a narrow and constricted middle part, so it is heated. This facilitates separation after the solder bonding process, that is, the process of transforming the film-like solder into a three-dimensional shape. The inspection will be performed using the following steps. In other words, the chip 9 to be measured is connected with the main electrode pad and the auxiliary pad.
is placed in the sample holder 7. Sample holder 7
The spring 8 is brought into contact with the solder portion on the auxiliary pad 11, and a circuit operation test is performed.

Next, the chip 9 to be measured that has been selected through the operation test is aligned with the wiring board 12 and each of the main electrode pads 2 and 13, as shown in FIG.
Perform solder bonding by heating. At this time, the auxiliary pad 1 of the chip 9 under test was subjected to the operation test.
Since the amount of solder on the main electrode pads 1 is lost due to the contact of the spring, it is smaller than the solder on the main electrode pads that are solder bonded together, and therefore has a hemispherical shape and does not contact the wiring board 12. Note that there are few defects, and even if it contacts the substrate 12, there is no influence at all even if it contacts because the insulating layers 3-1 and 3-2 are present at the contact portion. In addition, the solder portion connecting the main electrode pad 2 and the auxiliary pad 11 on the chip 9 to be measured is connected to an intermediate metal 5 that is in close contact with the solder.
Since the pads are not attached, they are separated and fused to each pad part, and no solder remains in that part. Therefore, after solder bonding, the main electrode pad 2 and the auxiliary pad 11 are electrically separated. . Therefore, there is no adverse effect on the transmission characteristics of the auxiliary pad, and it becomes possible to mount a chip with extremely small parasitic inductance suitable for high-speed signal transmission.

〔Effect of the invention〕

As explained above, the present invention uses a main electrode pad and an auxiliary pad exclusively used for operation testing or chip inspection as a pair, and during testing or inspection, the main electrode pad and auxiliary pad are separated by a solder material layer. While connected, perform an operation test by contacting only the top of the auxiliary pad with the test terminal. On this occasion,
Even if the solder on the auxiliary pad surface is damaged, the solder on the main electrode pad surface is not damaged at all, and in the subsequent solder bonding process that involves heating, the solder is
In the case of a spherical transition, a sufficient amount of solder remains on the main electrode pad to sufficiently fill the space between the mutual pads of the chip and the wiring board, and furthermore, the negative effect on high frequency transmission characteristics caused by the auxiliary pad and the solder bumps on the auxiliary pad is avoided. The main electrode pad and the auxiliary pad are electrically separated from each other in the solder bonding process. In order to facilitate the above separation action, a metal with good adhesion to the metal of the solder material may be selectively placed as an intermediate medium, or the center of the solder layer may be shaped into a narrow constriction to facilitate the above separation action. I have to.

Therefore, by using the electrode pad of the present invention, circuit operation tests and inspections such as chip selection can be performed without any adverse effect on the main electrode pad, and moreover, when driving the chip after testing, It is possible to perform measurements that fully utilize the characteristics of flip-chip bonding, such as low parasitic inductance.

The present invention can be applied to electrode pads intended for Josephson integrated circuits or GaAs integrated circuits that handle ultrahigh-speed signals, or semiconductor integrated circuits using Si. Furthermore, although the embodiments of the present invention have been described with respect to inspection in a state in which the chip is separated, it has the advantage that it can also be applied to inspection in the state of a wafer.

[Brief explanation of the drawing]

1 to 3 are sectional views showing one embodiment of a conventional electrode pad structure, and FIGS. 4 and 5 are sectional views showing one embodiment of the pad of the present invention. DESCRIPTION OF SYMBOLS 1... Silicon wafer, 2... Main electrode pad on chip, 3... Insulating layer, 4... Wiring, 5... Intermediate metal, 6... Solder bump, 7... Sample holder, 8... Spring, 9 ...Chip to be measured, 10...
...Pressure, 11...Auxiliary pad, 12...Wiring board, 13...Main electrode pad on wiring board.

Claims (1)

[Claims] 1. An integrated circuit mounted on the wafer or chip as an electrical signal terminal for extracting electrical signals from the integrated circuit mounted on the wafer or chip by connecting it to an external wiring board. In the electrode pad, in response to one electric signal, a main electrode pad and an auxiliary pad are formed as a pair separated by a certain distance, and a so-called low melting point solder material is applied to the surfaces of the main electrode pad and auxiliary pad. A region is formed that has adhesion to the metal of the low melting point solder material, and a region that does not have adhesion to the metal of the low melting point solder material is formed in the space between the main electrode pad and the auxiliary pad. Both the main electrode pad and the auxiliary pad are covered at once, and in a later heating process, the pad is separated into two parts, one on the main electrode pad surface and the other on the auxiliary pad surface, and each pad is shaped three-dimensionally into a spherical or other shape. An electrode pad with an auxiliary pad, characterized in that the electrode pad is comprised of the deformable low melting point solder material layer. 2. An electrode pad with an auxiliary pad according to claim 1, characterized in that the shape of the low melting point solder material layer is narrowed in the central part, that is, the space between the main electrode pad and the auxiliary pad. . 3. The assistance set forth in claim 1, characterized in that the material of the low melting point solder material layer is an In-Bi-Sn eutectic alloy, other In-containing metal, or lead-containing metal. Electrode pad with pad.