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JPS6247255B2 - - Google Patents
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JPS6247255B2 - - Google Patents

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Publication number
JPS6247255B2
JPS6247255B2 JP55071723A JP7172380A JPS6247255B2 JP S6247255 B2 JPS6247255 B2 JP S6247255B2 JP 55071723 A JP55071723 A JP 55071723A JP 7172380 A JP7172380 A JP 7172380A JP S6247255 B2 JPS6247255 B2 JP S6247255B2
Authority
JP
Japan
Prior art keywords
pulse width
circuit
signal proportional
voltage signal
duty cycle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55071723A
Other languages
Japanese (ja)
Other versions
JPS56168166A (en
Inventor
Shunichi Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP7172380A priority Critical patent/JPS56168166A/en
Priority to KR1019810001648A priority patent/KR840002376B1/en
Priority to US06/267,604 priority patent/US4463311A/en
Priority to GB8116433A priority patent/GB2076976B/en
Priority to FR8110714A priority patent/FR2483625B1/en
Priority to DE3121448A priority patent/DE3121448C2/en
Publication of JPS56168166A publication Critical patent/JPS56168166A/en
Publication of JPS6247255B2 publication Critical patent/JPS6247255B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R21/00Arrangements for measuring electric power or power factor
    • G01R21/06Arrangements for measuring electric power or power factor by measuring current and voltage
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R21/00Arrangements for measuring electric power or power factor
    • G01R21/127Arrangements for measuring electric power or power factor by using pulse modulation
    • G01R21/1271Measuring real or reactive component, measuring apparent energy

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Clocks (AREA)
  • Measurement Of Current Or Voltage (AREA)

Description

【発明の詳細な説明】 この発明は電子式皮相電力量計に関する。[Detailed description of the invention] The present invention relates to an electronic apparent watt-hour meter.

皮相電力量を測定する場合は、従来、2とおり
の方式が考えられている。その1つは、有効電力
量計と無効電力量計の2つの信号を受け、有効電
力Pと無効電力Qとより√22を計算して、
皮相電力を求めるもので、もう一つの方法は、第
1図に示す方法である。第1図において、1は負
荷電圧に比例した信号を取り出す計器用変圧器で
あり、2は消費電流に比例した信号を取り出す変
流器である。これによつて、負荷電圧と消費電流
に比例した信号を取り出す。そして、これらを整
流回路3,4を通して直流信号に変換する。その
後、各々の直流信号を乗算部5によつて乗算し、
積分部6によつて積分することで皮相電力量を得
ている。
Conventionally, two methods have been considered for measuring the apparent power amount. One is to receive two signals from an active energy meter and a reactive energy meter, calculate √ 2 + 2 from active power P and reactive power Q,
Another method for determining the apparent power is the method shown in FIG. In FIG. 1, 1 is an instrument transformer that takes out a signal proportional to the load voltage, and 2 is a current transformer that takes out a signal proportional to the consumed current. As a result, a signal proportional to the load voltage and current consumption is extracted. These signals are then converted into DC signals through rectifier circuits 3 and 4. After that, each DC signal is multiplied by the multiplier 5,
The apparent electric energy is obtained by integrating by the integrating section 6.

このよのな2つの方法が一般に知られている
が、前者の方法であると、システムが少し大きく
なり有効電力量計と無効電力量計が必要となる欠
点がある。また後者は、整流回路の特性(ダイオ
ード等の特性)がそのまま皮相電力量計の特性と
なるため、高精度な計量ができない欠点がある。
These two methods are generally known, but the former method has the disadvantage that the system becomes slightly larger and requires an active watt-hour meter and a reactive watt-hour meter. In addition, the latter has the disadvantage that highly accurate measurement cannot be performed because the characteristics of the rectifier circuit (characteristics of diodes, etc.) directly become the characteristics of the apparent watt-hour meter.

この発明は上記の点に鑑みなされたもので簡単
な構成で高精度な皮相電力量の測定を可能とする
電子式皮相電力量計を提供することを目的として
いる。
The present invention has been made in view of the above points, and an object of the present invention is to provide an electronic apparent power meter that has a simple configuration and can measure apparent power with high accuracy.

以下この発明の一実施例を図面を参照して説明
する。まず、この発明の一実施例を説明する前
に、この発明に係る電子式電力量計の原理を説明
する。第2図は電子式電力量計の一般的な構成を
示すもので、10は電力給電線の負荷電圧に比例
した信号を検出する計器用変圧器である。11は
計器用変圧器10の信号によつてパルス幅変調
し、パルス幅デユーテイサイクルを得るパルス幅
変調回路である。一方、12は電力給電線の消費
電流に比例した信号を検出する電流変圧器であ
り、この出力を抵抗13によつて電圧信号に変換
し、時分割乗算回路14に導く。この時分割乗算
回路14は図示しない複数個のアナログスイツチ
で構成され、前記パルス幅デユーテイサイクルに
よつて、これらのアナログスイツチを選択的にコ
ントロールすることで、消費電流に比例した電圧
信号をとり入れ、時分割乗算を実行するものであ
る。そして、乗算した結果を積分回路15で積分
し、電圧出力を得て、これを電圧−パルス周波数
変換回路16でパルス出力に変換し、分周回路1
7をへて表示回路18で表示するようにしてい
る。
An embodiment of the present invention will be described below with reference to the drawings. First, before explaining one embodiment of the present invention, the principle of the electronic watt-hour meter according to the present invention will be explained. FIG. 2 shows a general configuration of an electronic watt-hour meter, and 10 is an instrument transformer that detects a signal proportional to the load voltage of a power supply line. Reference numeral 11 denotes a pulse width modulation circuit that performs pulse width modulation using the signal from the voltage transformer 10 to obtain a pulse width duty cycle. On the other hand, 12 is a current transformer that detects a signal proportional to the current consumption of the power supply line, and this output is converted into a voltage signal by a resistor 13 and guided to a time division multiplier circuit 14. This time division multiplication circuit 14 is composed of a plurality of analog switches (not shown), and by selectively controlling these analog switches according to the pulse width duty cycle, a voltage signal proportional to the current consumption is generated. It is used to perform time-sharing multiplication. Then, the multiplication result is integrated by the integrating circuit 15 to obtain a voltage output, which is converted to a pulse output by the voltage-pulse frequency conversion circuit 16, and the frequency dividing circuit 1
7 and is then displayed on a display circuit 18.

ところでこのような構成された電子式電力量計
のパルス幅変調回路11は実際には第3図のよう
に構成されている。A1は積分器を構成するオペ
アンプであり、A2は積分出力を受けヒステリシ
スで生じる比較電圧ehとの比較で論理出力を発
生するコンパレータである。ここで、上記コンパ
レータA2の出力は、論理“1”の時+er、論
理“0”の時−erなる振幅になるよう構成され
ている。
By the way, the pulse width modulation circuit 11 of the electronic watt-hour meter having such a configuration is actually configured as shown in FIG. A1 is an operational amplifier constituting an integrator, and A2 is a comparator that receives an integrated output and generates a logical output by comparing it with a comparison voltage e h generated by hysteresis. Here, the output of the comparator A2 is configured to have an amplitude of + er when the logic is "1" and -er when the logic is "0".

次にその動作を説明する。まず、er=0にお
いてコンパレータA2の出力が論理“1”で整定
しているとすると、このコンパレータA2の負入
力端子電圧ehは、抵抗R3,R4がR3=R4とすると
−er/2となる。さらに抵抗R2を介して+er
る電圧が積分器へ導入されているので、オペアン
プA1の出力は負方向への積分傾斜を示すことに
なる。そして、オペアンプA1の出力電圧ek
が、−er/2に達しek≦ehとなると、コンパレ
ータA2は論理“0”に反転する。すると今度
は、コンパレータA2の負入力端子電圧ekは、+
r/2となり、抵抗R2を介して積分器には−er
が導入され、オペアンプA1の出力は、正方向へ
の積分傾斜を示す。そしてekが+er/2に達
し、ek≧ehとなるとコンパレータA2は正転す
る。
Next, its operation will be explained. First , if the output of comparator A2 is set to logic "1" at e r = 0, then the negative input terminal voltage e h of comparator A2 will be -er /2. Furthermore, since the voltage +e r is introduced into the integrator via the resistor R 2 , the output of the operational amplifier A1 exhibits an integral slope in the negative direction. Then, the output voltage e k of operational amplifier A1
When the value reaches −er /2 and e k ≦e h , the comparator A2 is inverted to logic “0”. Then, this time, the negative input terminal voltage e k of comparator A2 is +
e r / 2 , and -er
is introduced, and the output of operational amplifier A1 exhibits an integral slope in the positive direction. Then, when e k reaches +e r /2 and e k ≧e h , comparator A2 rotates normally.

このようにこのパルス幅変調回路は自励振をく
り返す。これを第4図a〜cに示す。同図aはコ
ンパレータA2の出力状態、同図bはコンパレー
タA2の負入力端子電圧eh、同図cはオペアン
プA1の出力ekをそれぞれ示すものである。
In this way, this pulse width modulation circuit repeats self-oscillation. This is shown in Figures 4a-c. Figure a shows the output state of the comparator A2, Figure b shows the negative input terminal voltage e h of the comparator A2, and Figure c shows the output e k of the operational amplifier A1.

ここで今、コンパレータA2の出力が論理
“1”の時間区間をta、論理“0”の時間区間を
bとすると、オペアンプ出力ekは、 ek(ta)=−(1/Rta vdt+1/Rta rdt)=−er ここでR1=R2とすれば、 ta=e/e+ek(tb)=−(1/Rtb vdt−1/Rtb rdt) tb=e/e−e となる。ここでパルス幅デユーテイサイクルは、 D=t/t+t=e−e/2e …(1) =t/t+t=e+e/2e …(2) となる。これがパルス幅変調回路の原理である。
Now, if the time interval in which the output of the comparator A2 is logic "1" is t a and the time interval in which the output is logic "0" is t b , the operational amplifier output e k is expressed as e k (t a )=-(1/ R 1 C 1tap e vdt + 1/R 2 C 1tap e rdt ) = -e rHere , if R 1 = R 2 , then ta = e r R 1 C 1 / e r +e v e k (t b )=-(1/R 1 C 1tb p e vdt -1/R 2 C 1tb p e rdt ) t b = e r R 1 C 1 / e r -e v . . Here, the pulse width duty cycle is D=t a /t a +t b = er − e v / 2er …(1) =t b /t a +t b = er + e v /2er ( 2) becomes. This is the principle of a pulse width modulation circuit.

上記したような電子式電力量計の原理をもとに
以下この発明の一実施例を説明する。まず、有効
電力と皮相電力を求める乗算の様子を第5図に用
いて説明する。有効電力はev計とeiとの積であ
り、瞬時的に考えるとt1の時刻ではA点とB点の
乗算である。又皮相電力はevをevとeiとの位
相差分だけ移相して乗算するもので、本発明は、
前記の説明のようなパルス幅変調時分割乗方式の
電力量計を用いて、t1の時点でA点とC点との積
を求めることで、皮相電力量計を構成している。
An embodiment of the present invention will be described below based on the principle of the electronic watt-hour meter as described above. First, the state of multiplication for determining the effective power and the apparent power will be explained using FIG. 5. Active power is the product of e v and e i , and when considered instantaneously, it is the product of point A and point B at time t1 . In addition, the apparent power is obtained by multiplying e v by shifting the phase by the phase difference between e v and e i , and the present invention
An apparent watt-hour meter is constructed by using the pulse-width modulation time-division multiplication watt-hour meter as described above and calculating the product of point A and point C at time t1 .

第6図はこの発明の一実施例による電子式皮相
電力量計の構成を示すもので、第2図と同一部分
には同一符号を付して説明を省略する。第6図に
おいて、20は多段のランダムシフトレジスタで
構成された遅延回路、21,22はそれぞれ交流
信号をパルスに変換するパルス信号変換回路、2
3は上記遅延回路20に対してパルス幅変調出力
パルスを供給するクロツクパルス発生回路であ
る。
FIG. 6 shows the configuration of an electronic apparent watt-hour meter according to an embodiment of the present invention, and the same parts as those in FIG. 2 are given the same reference numerals and the explanation thereof will be omitted. In FIG. 6, 20 is a delay circuit composed of multistage random shift registers, 21 and 22 are pulse signal conversion circuits that convert alternating current signals into pulses, and 2
Reference numeral 3 denotes a clock pulse generation circuit for supplying pulse width modulated output pulses to the delay circuit 20.

このような構成において、パルス幅変調回路1
1の出力は、第2図の如く直ちに時分割乗算回路
14に導入するのではなく、まず遅延回路20に
導入する。この遅延回路20は前述したように多
段のランダムシフトレジスタで構成されており、
クロツクパルス発生回路23からのパルス幅変調
出力パルスを導入し、次々にシフトしながら記憶
して遅延させるようになつている。パルス変換回
路21,22で交流信号がパルス信号に変換さ
れ、この変換されたパルス信号を上記遅延回路2
0に送る。これにより、現在の位相差を検出し、
遅延回路20を構成するランダムシフトレジスタ
の入出力の時点を決定する。つまり、電圧信号e
vに同期したパルスの立ち上がりから、電流信号
iに同期したパルスが立ち上がるまでの時間だ
け、パルス幅変調出力パルスを保持する。このパ
ルス幅変調出力パルスは次々に遅延回路20を構
成するランダムシフトレジスタに導入されて記憶
されるとともにシフトされ、パルス変換回路2
1,22によつて作られた期間だけ保持されて遅
延されて出力される。そして、時分割乗算回路1
4に導入されて乗算が実施される。すなわち、遅
延回路20によつて常に電圧信号と電流信号が同
位相であるが如く、乗算が実行されることにな
る。この乗算結果は皮相電力を表わすことにな
る。
In such a configuration, the pulse width modulation circuit 1
1 is not immediately introduced into the time division multiplication circuit 14 as shown in FIG. 2, but is first introduced into the delay circuit 20. As mentioned above, this delay circuit 20 is composed of a multi-stage random shift register,
The pulse width modulated output pulses from the clock pulse generation circuit 23 are introduced and stored and delayed while being shifted one after another. The AC signal is converted into a pulse signal by the pulse conversion circuits 21 and 22, and the converted pulse signal is sent to the delay circuit 2.
Send to 0. This detects the current phase difference and
The input/output points of the random shift register constituting the delay circuit 20 are determined. In other words, the voltage signal e
The pulse width modulated output pulse is held for the time period from the rise of the pulse synchronized with v to the rise of the pulse synchronized with the current signal e i . These pulse width modulated output pulses are successively introduced into a random shift register constituting the delay circuit 20, stored and shifted, and then transferred to the pulse conversion circuit 20.
1 and 22, and is output after being delayed. And time division multiplication circuit 1
4 and multiplication is performed. That is, multiplication is performed by the delay circuit 20 so that the voltage signal and the current signal are always in the same phase. The result of this multiplication will represent the apparent power.

以上説明したようにこの発明によれば、給電線
の負荷電圧に比例した電圧信号をパルス幅変調回
路によつてパルス幅デユーテイサイクルに変換す
るとともに給電線の消費電流に比例した信号を電
圧変換部によつて電圧信号に変換し、前記パルス
幅デユーテイサイクルによつて選択的にコントロ
ールして上記消費電流に比例した電圧信号を時分
割乗算回路に取り入れて時分割乗算を行なう電子
式電力量計において、上記パルス幅変調回路と時
分割乗算回路との間に遅延回路を設け、上記パル
ス幅デユーテイサイクルを上記遅延回路に順次送
り、上記負荷電圧に比例した電圧信号と消費電流
に比例した電圧信号のそれぞれの零点を検出し
て、両者の位相差分だけ上記パルス幅デユーテイ
サイクルを保持して遅延させたのち上記時分割乗
算回路で時分割乗算を行なつて皮相電力を得るよ
うにしたので、構成を複雑にすることなく高精度
な皮相電力量測定が可能となる電子式皮相電力量
計を提供できる。
As explained above, according to the present invention, a voltage signal proportional to the load voltage of a power supply line is converted into a pulse width duty cycle by a pulse width modulation circuit, and a signal proportional to the current consumption of the power supply line is converted into a voltage signal proportional to the current consumption of the power supply line. An electronic system that converts the voltage signal into a voltage signal by a converter, selectively controls the pulse width duty cycle, and inputs the voltage signal proportional to the current consumption into a time division multiplication circuit to perform time division multiplication. In the electricity meter, a delay circuit is provided between the pulse width modulation circuit and the time division multiplication circuit, and the pulse width duty cycle is sequentially sent to the delay circuit to generate a voltage signal proportional to the load voltage and current consumption. After detecting each zero point of the voltage signal proportional to Therefore, it is possible to provide an electronic apparent power meter that can measure apparent power with high accuracy without complicating the configuration.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の皮相電力量計の構成図、第2図
はこの発明の原理を説明するための電子式電力量
計の構成図、第3図は第2図のパルス幅変調回路
の構成図、第4図はパルス幅変調回路の動作説明
図、第5図はこの発明の一実施例を説明するため
の皮相電力波形図、第6図はこの同実施例による
皮相電力量計の構成図である。 10…計器用変圧器、11…パルス幅変調回
路、12…電流変成器、14…時分割乗算回路、
20…遅延回路。
Figure 1 is a configuration diagram of a conventional apparent watt-hour meter, Figure 2 is a configuration diagram of an electronic watt-hour meter for explaining the principle of the present invention, and Figure 3 is the configuration of the pulse width modulation circuit shown in Figure 2. 4 is an explanatory diagram of the operation of the pulse width modulation circuit, FIG. 5 is an apparent power waveform diagram for explaining an embodiment of the present invention, and FIG. 6 is a configuration of an apparent watt-hour meter according to this embodiment. It is a diagram. 10... Instrument transformer, 11... Pulse width modulation circuit, 12... Current transformer, 14... Time division multiplication circuit,
20...Delay circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 給電線の負荷電圧に比例した電圧信号をパル
ス幅変調回路によつてパルス幅デユーテイサイク
ルに変換するとともに給電線の消費電流に比例し
た信号を電流変成器によつて電圧信号に変換し、
前記パルス幅デユーテイサイクルによつて選択的
にコントロールして上記消費電流に比例した電圧
信号を時分割乗算回路に取り入れて時分割乗算を
行なう電子式電力量計において、上記パルス幅変
調回路と時分割乗算回路との間に遅延回路を設
け、上記パルス幅デユーテイサイクルを上記遅延
回路に順次送り、上記負荷電圧に比例した電圧信
号と消費電流に比例した電圧信号のそれぞれの零
点を検出して、両者の位相差分だけ上記パルス幅
デユーテイサイクルを保持して遅延させたのち、
上記時分割乗算回路で時分割乗算を行なつて皮相
電力を得るようにしたことを特徴とする電子式皮
相電力量計。
1 A voltage signal proportional to the load voltage of the feeder line is converted to a pulse width duty cycle by a pulse width modulation circuit, and a signal proportional to the current consumption of the feeder line is converted to a voltage signal by a current transformer. ,
In an electronic watt-hour meter that performs time-division multiplication by selectively controlling the pulse width duty cycle and inputting a voltage signal proportional to the current consumption into a time-division multiplication circuit, the pulse width modulation circuit and A delay circuit is provided between the time division multiplier circuit and the pulse width duty cycle is sequentially sent to the delay circuit to detect the respective zero points of the voltage signal proportional to the load voltage and the voltage signal proportional to the consumption current. After holding and delaying the above pulse width duty cycle by the phase difference between the two,
An electronic apparent power meter characterized in that the time-division multiplication circuit performs time-division multiplication to obtain apparent power.
JP7172380A 1980-05-29 1980-05-29 Electronic apparent watthour meter Granted JPS56168166A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP7172380A JPS56168166A (en) 1980-05-29 1980-05-29 Electronic apparent watthour meter
KR1019810001648A KR840002376B1 (en) 1980-05-29 1981-05-13 Electronic electric-energy meter
US06/267,604 US4463311A (en) 1980-05-29 1981-05-27 Electronic electric-energy meter
GB8116433A GB2076976B (en) 1980-05-29 1981-05-29 Electronic electric-energy meter
FR8110714A FR2483625B1 (en) 1980-05-29 1981-05-29 ELECTRONIC ELECTRICAL ENERGY METER
DE3121448A DE3121448C2 (en) 1980-05-29 1981-05-29 Electronic electricity meter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7172380A JPS56168166A (en) 1980-05-29 1980-05-29 Electronic apparent watthour meter

Publications (2)

Publication Number Publication Date
JPS56168166A JPS56168166A (en) 1981-12-24
JPS6247255B2 true JPS6247255B2 (en) 1987-10-07

Family

ID=13468719

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7172380A Granted JPS56168166A (en) 1980-05-29 1980-05-29 Electronic apparent watthour meter

Country Status (2)

Country Link
JP (1) JPS56168166A (en)
KR (1) KR840002376B1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5935157A (en) * 1982-08-24 1984-02-25 Tokyo Electric Power Co Inc:The Apparatus for measuring electric power
JPS6078357A (en) * 1983-10-05 1985-05-04 Tokyo Electric Power Co Inc:The Watthour meter

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Publication number Publication date
KR840002376B1 (en) 1984-12-24
KR830006693A (en) 1983-10-06
JPS56168166A (en) 1981-12-24

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