JPS62476B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a program timer display device that can set a plurality of timer operation times.

Various program timers that can set the time multiple times have been devised in the past, but most of them are constructed from integrated circuits that have internal memory. The content must be output, and even during operation, it does not display which program is being executed or how many times it is being programmed, so when using it,
There were many things that made me feel anxious.

The present invention overcomes the above-mentioned conventional drawbacks and provides a program timer that allows checking the state of the program, that is, the state of the memory, when writing or calling a program or during timer operation, eliminates anxiety during use, and is easy to operate. This is what we provide.

An embodiment of the present invention will be described below based on the drawings. Figure 1 is a block diagram showing the overall configuration.
1 is a program timer of the same type as the conventional one having a shift register type memory that can set the time multiple times, 12 is a time display that displays the current time or program setting time, and 13 is a shift clock output and write output of the program timer 11. is a program display device controlled by. The program timer 11 consists of a clock device that counts the reference frequency and a memory that sets the time. By switching the mode, the timer operation and timer time setting modes are switched. By the time adjustment input, the current time can be adjusted or the program time can be adjusted. Settings are made. It also has a write input, a call input, an erase input, a shift clock output, and a write output. Second
The timing at the time of writing and the time of calling are shown in the figure and FIG. Originally, the shift clock and write output are outputs for driving external memory in synchronization with the memory with a built-in program timer.When the internal memory is shifted, a shift clock is output to shift the external memory, and the internal memory is Write output at the same time as writing the timer time. When the timer is operating, when the current time and timer time match and the clock is shifted to the next memory, a shift clock is generated to shift the external memory. 13 is a program display device of the present invention which receives a shift clock and a write pulse.

FIG. 4 shows an embodiment of the display device, and shows a display device of a program timer that can set the time eight times. 14 is an 8-bit ring counter, which operates as shown in FIG. 15 is a group of AND gates, and 16 is 8 for storing the write state corresponding to the 8 memories inside the program timer.
In this example, eight light emitting diodes are used in each of the D flip-flop groups, 17 is a front element group for displaying the program (memory) number, and 18 is a display element group for displaying the write state of the memory.

In FIG. 4, the ring counter 14 is moved as shown in FIG. 5 by the shift clock, so
The display element group 17 causes the current memory number to match the memory number inside the program timer. Furthermore, since the trigger input of the D flip-flop group 16 is connected to the output of the ring counter 14 and the shift clock via the gate group 15, the trigger input is applied only to the D flip-flop whose memory number is specified and displayed at the time of writing. The write state is stored in the D flip-flop, and the stored state is simultaneously displayed by the display element group 18. FIG. 6 shows an example in which the display element groups 17 and 18 are arranged on a straight line. The upper display element group 17 displays the memory number, and the lower display element group 18 shows which memory is written. it's shown.
FIG. 7 shows an example of a circular arrangement, in which the inner front element group 17 displays the memory number, and the outer display element group 18 displays the writing state of the memory.

FIG. 8 shows another embodiment, in which a memory number and writing status are displayed using one set of display elements. Here, the configurations of the ring counter 19, the AND gate group 20, and the D flip-flop group 21 are the same as those of 14 to 16 in FIG. 4, but the light emitting diodes _D1 to _D8 of the display element group 22 are replaced by transistors _T1 to _T8. It is connected to the ring counter 19 via resistors R ₁ ′ to R ₈ ′ from the connection point of the light emitting diodes D ₁ to _{D 8} and the transistors T ₁ to T ₈ to the output of the D flip-flop group 21. There is. With this configuration, the state of the memory is displayed by the display element group 22 based on the output of the D flip-flop group 21, but the brightness depends on the resistances _R1 to _R8 and _R1 ' to _R8 . The brightness corresponds to the current determined by . In addition, by inputting a blinking signal to the bases of transistors T ₁ to _{T 8} , the memory number is displayed by blinking the corresponding display element, and when the memory number is written, it is input to R ₁ to _{R 8} . and the brightness corresponding to the current determined by R ₁ to ^{R 8} and R ₁ ′ to R ₈ ′, and the unwritten memory When the number
It is displayed as a blinking brightness corresponding to the current determined by _R1 to _R8 . In this way, the memory number and the writing state can be displayed simultaneously by one display element group 22. Fig. 9 shows an example in which the display element group 22 is arranged in a straight line, and Fig. 10 shows an example in which the display element group 22 is arranged in a circular shape. The memory number is displayed by blinking at maximum brightness or by changing the brightness.

As described above, according to the present invention, it is possible to grasp the status of multiple memories at the same time, and because conventional methods do not display which program is being executed or how many times the program has been programmed, etc., the anxiety associated with use can be eliminated. I was able to overcome the shortcomings that I had been unable to overcome.

[Brief explanation of the drawing]

FIG. 1 is an overall configuration diagram of a program timer according to the present invention, FIGS. 2 and 3 are input/output timing charts, FIG. 4 is a configuration diagram showing an embodiment of the present invention, and FIG. 5 is a diagram of a ring counter. A timing chart showing the operation, FIGS. 6 and 7 are arrangement diagrams of the display element group, FIG. 8 is a configuration diagram showing another embodiment, and FIGS. 9 and 10 are diagrams of the display element group, respectively. It is a layout diagram. 11...Program timer, 13...Display device, 14,19...Ring counter, 15,20
. . . AND gate group, 16, 21 . . . D flip-flop group, 17, 18, 22 . . . display element group.

Claims (1)

[Scope of Claims] 1. A shift register type memory having write, recall, and erase inputs and capable of setting a timer operation time multiple times, and the memory is activated when writing, recalling, or when the set time and current time match. A program timer that outputs a shift clock for shifting and outputs a write pulse during writing is provided with a display circuit that receives the shift clock and write pulse as input, and first and second display element groups, and the output of the display circuit The first and second display element groups are turned on or off, one of the display element groups displays which of the multiple memories is currently being written to, called, or on standby, and the other display elements are displayed. A display device for a program timer, characterized in that it displays which memory has been written and time has been set among a plurality of memories in an element group. 2. The display circuit has a ring counter and a number of flip-flops equal to the number of memories, and uses the output of the ring counter to display the memory currently being written, called, or on standby, and uses the flip-flop to store and output the write state. A display device for a program timer according to claim 1, wherein the display device is configured to: 3. The program timer display device according to claim 1, wherein the first and second display element groups are each arranged on a straight line. 4 Claim 1, characterized in that the first and second display element groups are each arranged in a circular shape.
Display device for the program timer described in Section. 5 Equipped with a shift register type memory that has write, recall, and erase inputs and can set multiple timer operation times, and outputs a shift clock that shifts the memory when writing, recalling, or when the set time and current time match. , a program timer that outputs a write pulse during writing, which inputs a shift clock and a write pulse, and has a ring counter and a flip-flop for turning on and off a number of display elements equal to the number of memories, and a display element. brightness of 2
A display circuit is provided which is set in stages, and a first brightness indicates which memory is in a writing state, and a first brightness indicates which memory is in a write state, and a repeating change between the first brightness and a second brightness indicates which memory. A display device for a program timer, characterized in that it displays whether the memory is currently being written, called, or on standby. 6. A program timer display device according to claim 5, characterized in that the display elements are arranged on a straight line. 7. A display device for a program timer according to claim 5, characterized in that the display elements are arranged in a circular shape.