JPS6248313B2 - - Google Patents
Info
- Publication number
- JPS6248313B2 JPS6248313B2 JP58190121A JP19012183A JPS6248313B2 JP S6248313 B2 JPS6248313 B2 JP S6248313B2 JP 58190121 A JP58190121 A JP 58190121A JP 19012183 A JP19012183 A JP 19012183A JP S6248313 B2 JPS6248313 B2 JP S6248313B2
- Authority
- JP
- Japan
- Prior art keywords
- main body
- electrical connection
- connection pin
- pin terminal
- memory pack
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K5/00—Casings, cabinets or drawers for electric apparatus
- H05K5/02—Details
- H05K5/0256—Details of interchangeable modules or receptacles therefor, e.g. cartridge mechanisms
- H05K5/0286—Receptacles therefor, e.g. card slots, module sockets, card groundings
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07743—External electrical contacts
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、機器本体への着脱が可能なメモリー
パツクに用いる、複数の電気接続用ピン端子を有
したメモリーパツクの接続装置に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a memory pack connection device having a plurality of electrical connection pin terminals, which is used for a memory pack that can be attached to and detached from a device body.
従来例の構成とその問題点。Conventional configuration and its problems.
第１図は従来のメモリーパツクの接続装置を示
している。以下に従来例の構成について第１図と
ともに説明する。 FIG. 1 shows a conventional memory pack connection device. The configuration of a conventional example will be explained below with reference to FIG.
第１図において、１はメモリーパツク、２は本
体との接続をする電気接続用ピン端子、３ａは上
ケース、３ｂは電気接続用ピン端子をガイドする
下ケース、４は論理基板、５は論理基板上にハン
ダ付けされているメモリー素子、６は電気接続用
ピン端子２と論理基板４とを接続および保持する
バネ、７は導電スポンジであり、この導電スポン
ジ７は電気接続用ピン端子２相互をメモリパツク
の保存時等に短絡しアースしている。 In Figure 1, 1 is a memory pack, 2 is an electrical connection pin terminal for connection to the main body, 3a is an upper case, 3b is a lower case that guides the electrical connection pin terminal, 4 is a logic board, and 5 is a logic board. A memory element is soldered on the board, 6 is a spring that connects and holds the electrical connection pin terminal 2 and the logic board 4, and 7 is a conductive sponge. is short-circuited and grounded when storing the memory pack.
しかしながら上記従来例においては、本体（図
示せず）へ装着する場合導電スポンジ７より取り
外して行なうため、電気接続用ピン端子２はその
間、無アースの状態となり、静電気により故障し
てしまう欠点があつた。又、電気接続用ピン端子
２に指が触れないよう取扱わなければならないた
め、本体への着脱がやり難いという問題があつ
た。 However, in the above-mentioned conventional example, since it is removed from the conductive sponge 7 when it is attached to the main body (not shown), the electrical connection pin terminal 2 is in an ungrounded state during that time, which has the disadvantage of causing failure due to static electricity. Ta. Furthermore, since the electrical connection pin terminal 2 must be handled so as not to be touched by fingers, there is a problem in that it is difficult to attach and detach it from the main body.
発明の目的
本発明は、上記従来例の問題点を除去するもの
であり、静電気に対する故障をなくし、かつ本体
への着脱を容易にすることを目的とするものであ
る。OBJECTS OF THE INVENTION The present invention is intended to eliminate the problems of the conventional example described above, and aims to eliminate failures due to static electricity and to facilitate attachment and detachment from the main body.
発明の構成
本発明は、上記目的を達成するために、複数の
電気接続用ピン端子と、電気接続用ピン端子を保
持および接続するバネと、電気接続用ピン端子相
互を短絡するアース板とでメモリーパツクの接続
装置を構成し、本体より離脱時には電気接続用ピ
ン端子とアース板が電気的に短絡し、装着時には
電気接続用ピン端子が電気的に独立するよう、電
気接続用ピン端子を移動させて切換を行なうもの
で、静電気に対する効果を得るものである。Structure of the Invention In order to achieve the above object, the present invention includes a plurality of electrical connection pin terminals, a spring that holds and connects the electrical connection pin terminals, and a ground plate that short-circuits the electrical connection pin terminals. It constitutes the memory pack's connection device, and moves the electrical connection pin terminal so that the electrical connection pin terminal and the ground plate are electrically shorted when removed from the main body, and are electrically independent when attached. This is a device that performs switching by letting the device move, and obtains an effect against static electricity.
実施例の説明
以下に本発明の一実施例の構成について図面と
ともに説明する。DESCRIPTION OF EMBODIMENTS The configuration of an embodiment of the present invention will be described below with reference to the drawings.
第２図，第３図において、１はメモリーパツ
ク、２は本体との接続をする電気接続用ピン端
子、３ａ，３ｂはそれぞれ上ケースと接続用ピン
端子２をガイドする下ケース、４は論理基板、５
は論理基板上にハンダ付けされているメモリー素
子、６は電気接続用ピン端子２と論理基板４とを
接続および保持するバネ、８は複数の電気接続用
ピン端子２相互を短絡するアース板、９は本体側
接続基板、１０は本体ケーである。 In Figures 2 and 3, 1 is a memory pack, 2 is an electrical connection pin terminal for connection to the main body, 3a and 3b are upper cases and a lower case that guides the connection pin terminals 2, respectively, and 4 is a logic Substrate, 5
is a memory element soldered on the logic board; 6 is a spring that connects and holds the electrical connection pin terminals 2 and the logic board 4; 8 is a ground plate that short-circuits the plurality of electrical connection pin terminals 2; 9 is a main body side connection board, and 10 is a main body case.
第２図はメモリーパツク１が本体より離脱した
時の状態を示しており、アース板８が複数の電気
接続用ピン端子２と短絡し、アースしている。次
に第３図はメモリーパツクを本体に装着した時の
状態を示しており、電気接続用ピン端子２がバネ
６の圧力に抗して本体側接続基板９によつて押し
上げられ、アース板８と離れ、電気的に独立する
電気接続用ピン端子となる。 FIG. 2 shows the state when the memory pack 1 is detached from the main body, and the ground plate 8 is short-circuited with the plurality of electrical connection pin terminals 2 and grounded. Next, FIG. 3 shows the state when the memory pack is attached to the main body, and the electrical connection pin terminal 2 is pushed up by the main body side connection board 9 against the pressure of the spring 6, and the ground plate 8 It becomes an electrically independent pin terminal for electrical connection.
以上説明した様に本実施例においては、本体に
装着されるまでは電気接続用ピン端子２が常にア
ース板８と短絡しアースされるため、静電気によ
る問題もなくなり、取扱いに気を使わずにすみ、
本体への着脱が容易に行なえる利点がある。 As explained above, in this embodiment, the electrical connection pin terminal 2 is always short-circuited to the ground plate 8 and grounded until it is attached to the main body, so there is no problem with static electricity, and there is no need to be careful when handling it. Corner,
It has the advantage that it can be easily attached to and detached from the main body.
発明の効果
本発明は上記のような構成であり、以下に示す
効果が得られるものである。Effects of the Invention The present invention has the above-described configuration, and provides the following effects.
(a) 本体より離脱した時は、電気接続用ピン端子
が常にアースされているので、静電気による故
障の問題がなくなる。(a) When removed from the main body, the electrical connection pin terminal is always grounded, eliminating the problem of failure due to static electricity.
(b) 本体より離脱した時は、電気接続用ピン端子
が常にアースされているので、メモリーパツク
の取扱いに気を使わずにすみ、本体への着脱が
容易になる。(b) When removed from the main body, the electrical connection pin terminal is always grounded, so there is no need to worry about handling the memory pack, and it is easy to attach and remove it from the main body.
第１図は従来の接続装置を用いたメモリーパツ
クの断面図、第２図は本発明の一実施例における
メモリーパツクの接続装置の本体離脱時の状態を
示す断面図、第３図は同装置の本体装着時の状態
を示す断面図である。
１……メモリーパツク、２……電気接続用ピン
端子、６……バネ、８……アース板板、９……本
体側接続基板。
Fig. 1 is a sectional view of a memory pack using a conventional connection device, Fig. 2 is a sectional view showing the state of the memory pack connection device in an embodiment of the present invention when the main body is removed, and Fig. 3 is the same device. FIG. 3 is a cross-sectional view showing the state when the main body is attached. 1... Memory pack, 2... Pin terminal for electrical connection, 6... Spring, 8... Earth plate, 9... Main unit side connection board.
Claims (1)
られ、前記本体に設けた接続基板にバネを介して
圧着される電気接続用ピン端子と、前記メモリー
パツク内に設けられ、前記メモリーパツクの本体
より離脱時には前記電気接続用ピン端子に接続さ
れ、本体への装着時には前記電気接続用ピン端子
が後退することにより接続が切離されるアース板
とを備えてなるメモリーパツクの接続装置。1. An electrical connection pin terminal that is attached to a memory pack that is removable from the main body and is crimped to a connection board provided on the main body via a spring, and a pin terminal that is provided inside the memory pack and that is connected when the memory pack is detached from the main body. A memory pack connection device comprising: a ground plate connected to the electrical connection pin terminal, and disconnected when the electrical connection pin terminal is moved back when mounted on the main body.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58190121A JPS6083287A (en) | 1983-10-12 | 1983-10-12 | Memory pack connection device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58190121A JPS6083287A (en) | 1983-10-12 | 1983-10-12 | Memory pack connection device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6083287A JPS6083287A (en) | 1985-05-11 |
| JPS6248313B2 true JPS6248313B2 (en) | 1987-10-13 |
Family
ID=16252736
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58190121A Granted JPS6083287A (en) | 1983-10-12 | 1983-10-12 | Memory pack connection device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6083287A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0271553U (en) * | 1988-11-18 | 1990-05-31 |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2510329Y2 (en) * | 1986-04-23 | 1996-09-11 | オリンパス光学工業株式会社 | Camera integrated circuit protector |
| CH683212A5 (en) * | 1992-03-10 | 1994-01-31 | Frama Ag | Electronic memory. |
| JP2586127Y2 (en) * | 1994-08-30 | 1998-12-02 | オリンパス光学工業株式会社 | Camera integrated circuit protection device |
| JP3726151B2 (en) * | 1997-08-25 | 2005-12-14 | 株式会社日立グローバルストレージテクノロジーズ | Disk device and removable magnetic disk device |
-
1983
- 1983-10-12 JP JP58190121A patent/JPS6083287A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0271553U (en) * | 1988-11-18 | 1990-05-31 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6083287A (en) | 1985-05-11 |
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