JPS6248903B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a temperature compensation circuit device in a semiconductor integrated device.

2. Description of the Related Art In a semiconductor integrated device, a voltage supply circuit and a current supply circuit are provided to provide each circuit element, for example, a transistor, with a predetermined bias potential necessary for operation. In order to stably operate each circuit element using such a bias supply circuit, the degree of temperature dependence must be set as necessary.

First, consider a constant voltage circuit as shown in FIG. 1. In this case, transistors _Q1 and _Q2 , whose bases and collectors are directly connected, are connected to the base bias circuit of transistor _Q3 to operate as diodes. However, in manufacturing a semiconductor integrated device, transistors Q ₁ , Q ₂ and Q ₃ can be made to have substantially the same characteristics. Therefore, if the forward voltage between the base and emitter is V _F , the constant voltage output V ₀ supplied to the output terminal derived from the emitter of transistor Q ₃ is V ₀ = R ₂ /R ₁ +R ₂ (V _CC −2V _F )+V _F ……(1). However, it is assumed that the base current of the transistor Q ₃ is sufficiently small compared to the current flowing through the base bias resistors R ₁ and R ₂ and can be ignored, and V _CC is the power supply voltage.

When the circuit shown in Figure 1 is configured on a semiconductor integrated device, considering the temperature dependence of each element, the resistance
Since it is considered that the changes in resistance values of R ₁ and R ₂ with respect to temperature changes are almost equal to each other, the term expressed by the ratio of resistance values in equation (1) may have almost no temperature dependence. Therefore, in equation (1), the temperature dependence of _{the constant} voltage output V ₀ is
and the temperature dependence of the forward voltage V _F of Q ₃ .

From this point of view, formula (1) is modified to obtain V ₀ =R ₂ /R ₁ +R ₂ V _CC +(1-2R ₂ /R ₁ +R
₂ ) V _F ...(2) is expressed as, and the resistors R ₁ and R ₂ are selected so that R ₁ = R ₂ so that the coefficient of the forward voltage V _F term becomes zero, and as a result, the voltage is constant as a whole. Conventionally, efforts have been made to eliminate the temperature dependence of the output V ₀ .

However, if you do this, the constant voltage output voltage V ₀
is uniformly determined to be V ₀ = 1/2V _CC (3), so the temperature coefficient and output voltage cannot be set arbitrarily as necessary, and in the end there are major limitations in actually using this circuit. be.

In addition, the above equation (1) theoretically indicates that the transistor Q ₁ ,
This was determined under the condition that the forward voltages V _F of Q ₂ and Q ₃ are almost equal to each other, but in reality, the temperature coefficient of the forward voltage V _F of each transistor varies depending on the magnitude of the flowing current. It's decided. However, among the transistors _Q1 to _Q3 , the current flowing through the transistor _Q3 is large because it is necessary to drive the load, so there is a problem that complete temperature compensation cannot be achieved in practice.

As discussed above with respect to FIG. 1, the output voltage V ₀
It is widely practiced in other circuits, such as Figs. 2 and 3, to improve the temperature dependence by reducing the coefficient of the forward voltage V _F to zero in the equation deriving the equation. , in that case as well, there are problems similar to those described above with respect to FIG.

In the case of FIG. 2, the output voltage V ₀ at the emitter of the transistor Q ₄ is V ₀ =R ₅ /R ₄ +R ₅ -V _F (4). In this equation, the forward voltage V _F term cannot be made zero, whereas the first term can be transformed into an expression of resistance ratio, thereby almost eliminating temperature dependence. Therefore, in the case of FIG. 2, temperature compensation cannot be performed.

In the case of FIG. 3, the output voltage V ₀ at the collector of the transistor Q ₅ is V ₀ =R ₈ /R ₇ V _F (5). In this equation, the forward voltage V _F term cannot be made zero, so temperature compensation cannot be performed.

In consideration of the above points, the present invention attempts to propose a temperature compensation circuit device that can perform temperature compensation with high accuracy even if it is thought that temperature compensation cannot be performed using conventional methods. It is.

An example of the present invention will be described in detail below with reference to the drawings.

In the present invention, when forming a diffused resistance layer on a semiconductor integrated device, temperature compensation is performed by utilizing the fact that the temperature coefficient of the resistance value of the resistance layer is determined according to the widthwise dimension of the resistance layer. This is what we are trying to achieve.

That is, the diffused resistance layer 1 usually has an elongated linear resistance layer portion 1 having a width w and a length l, as shown in FIG.
and, for example, a rectangular contact diffusion layer 3 having a contact 2 at the center at both ends of the resistance layer 1, and the resistance value R between the contacts 2 at both ends is approximately R=Rsl/w...( 6) becomes.

On the other hand, as shown in FIG. 5, it has been experimentally confirmed that the temperature coefficient per unit resistance value of this resistance R decreases as the width w increases.

Applying this to the configuration shown in Figure 3, the temperature coefficient of the output voltage V ₀ when the width w of the diffused resistance layer of the resistors R ₇ and R ₈ is changed can be calculated by differentiating the above equation (5). is required. That is, However, T is the temperature.

In order to make the temperature coefficient zero here, we need to find the conditions that make the right side of equation (7) zero, so becomes. The resistance R ₇ is set so that the relationship in equation (8) holds true.
Temperature compensation can be performed by selecting the width of R8 and _R8 .

As is clear from equations (7) and (8), the temperature coefficient of the term determined by the ratio of resistances with different temperature coefficients is generally summarized as follows.

However, R _{a and} R _b are arbitrary resistance values in which the widths of the resistance layers are different from each other. As can be seen from equation (9), the temperature coefficient of the resistance ratio R _a /R _b can be selected to be either positive or negative by selecting the temperature coefficients of the resistors R _a and R _b .

The above is a consideration of Figure 3, but
Similarly, considering Figure 2, if we calculate the temperature coefficient of the output voltage V ₀ from equation (4), we get dV ₀ /dT=-1/(1+k ₁ ) ² (dk ₁ /dT
)-dV _F /dT...(10). However, k ₁ =R ₄ /R ₅ .

Here, dk ₁ /dT can be set to a negative value (10)
The right side of the equation can be compensated to zero or almost zero.

Next, considering the case of FIG. 1, since the currents flowing through transistors Q ₁ and Q ₂ are equal, the base and emitter voltages V _F1 and V _F2 are also equal.
Therefore, if the base and emitter voltages of the transistor Q ₃ are V _F3 , the formula for the output voltage V ₀ corresponding to equation (1) is V ₀ = R ₂ /R ₁ +R ₂ (V _CC −2V _F1 )+2V _F1 −V _F3 ...
...(11) Here, if we calculate the temperature coefficient of the output voltage V ₀ by setting R ₁ /R ₂ =k ₂ , then dV ₀ /dT=2V _F1 -V _CC /(1+k ₂ ) ² .
dk ₂ /dT +2k ₂ /1+k ₂・dV _F1 /dT-dV _F3
/dT……(12) However, since the forward voltage V _F at the base and emitter of transistors Q ₁ to _{Q 3} has a negative temperature coefficient,
The second term of equation (12) can be negative, the third term can be positive, and the first term can be positive or negative. Therefore the value of the temperature coefficient of k ₂
By selecting dk ₂ /dT, the temperature coefficient of the output voltage V ₀ can be determined to a desired value.

For example, if R ₁ = R ₂ is selected, k ₂ = 1, so from equation (12), dV ₀ /dT = 2V _F1 -V _CC /4・dk ₂ /dT
+dV _F1 /dT - dV _F3 /dT... (13) However, the current flowing through the transistors Q ₁ and Q ₂ is preferably small in order to reduce loss in the bias circuit, whereas the current flowing through the transistor Q ₃ must be large because it requires a large load current. Therefore, the forward voltages V _F1 and V _F2 of the transistors Q ₁ and Q ₂ are larger than the forward voltage V _F3 of the transistor Q ₃ . Now V _F1 = V _F2 = 0.7
(V), V _CC =12 (V), dV _F1 /dT=dV _F2 /dT=
-2 (mV/℃), dV _F3 /dT=-0.5 (mV/℃)
Then, in order to make the right side of equation (13) zero, −2.65×dk ₂ /dT−2×10 ⁻³ −(−0.5×10 ⁻³ )=
0... (14) It is necessary that dk ₂ /dT=-0.57×10 ^-3 (1/℃) ...( _{15 )} Width of mansion layer 1 w
All you have to do is decide. In other words, by substituting the result of equation (15) into equation (9), Therefore, the temperature coefficient of resistor R ₁ is selected to be smaller than the temperature coefficient of resistor R _2. For example, the temperature coefficient of resistor R ₁ is 1.43 × 10 ^-3 [1/℃], and the temperature coefficient of resistor R ₂ is
The width w of the resistance layer 1 may be designed to be 2.00×10 ⁻³ [1/° C.].

Next, with reference to FIG. 6, an example of temperature compensation that takes into consideration the temperature stability of the operating point of the transistor collector will be explained. In FIG. 6, the collector potential V ₀ of the transistor Q ₇ is V ₀ =V _CC −{R ₉ /R ₉ +R ₁₀ (V _CC −V _F8 ) +V _F8 −V _F7 }R ₁₂ /R ₁₁ ……(17 ) becomes. However, V _F7 and V _F8 are transistors Q ₇ ,
This is the base-emitter forward voltage of _Q8 . If we ignore the base current of transistor _Q7 here, we get
Although V _F7 ≈V _F8 can be satisfied, the temperature coefficients of transistors Q ₇ and Q ₈ are different due to different flowing currents. However, if the widths of the resistance layers 1 of the resistors R ₉ and R ₁₀ are equal and therefore the temperature coefficients are approximately equal, then the temperature coefficient of the output voltage V ₀ can be found from equation (17) as follows: becomes. Therefore, to make the temperature coefficient dV ₀ /dT 0, All you have to do is make sure that this holds true.

As an example, R ₉ = 2 (kΩ), R ₁₀ = 10 (k
Ω), R ₁₁ = 1 (kΩ), R ₁₂ = 2 (kΩ), V _CC =
12 (V), V _F8 = V _F7 = 0.7 (V), dV _F7 /dT=
-1 (mV/℃), dV _F8 /dT=-2 (mV/℃), then from equation (19), It turns out that it is good to do this.

As described above, temperature compensation can be performed for the entire circuit by creating a positive or negative temperature coefficient using the ratio of resistors with different temperature coefficients, but in order to create a predetermined temperature coefficient on a semiconductor integrated device, It is effective to approximate the shape of the resistance layer.

Incidentally, forming a combination of a large number of resistors with different shapes on a semiconductor integrated device requires a complicated process of trial and error and a lot of effort. There's a bad problem. Moreover, in manufacturing semiconductor integrated devices, each element is formed on a semiconductor substrate by repeating microfabrication techniques such as pattern photo processing multiple times, so many resistors with different shapes are placed at a certain temperature. This leads to the fact that it is not easy to obtain the coefficients.

Figure 7 shows a configuration that can improve this point.
In this case, a resistance R ₁ (length l ₁ and width w ₁ ) consisting of a resistance diffusion layer having the shape described above with respect to FIG.
R ₂ (length l ₂ and width w ₂ ) are arranged close to each other so as to extend substantially parallel to each other. The contact parts of resistors R ₁ and R ₂ are all of the same shape, and the length of the straight part 1 is determined according to the assigned resistance value and the width selected for temperature compensation once they are determined. being done. But in practice, the length l ₁
It is desirable to select values for and l ₂ as close as possible.

If l ₁ and l ₂ are not close values, for example l ₁ < l ₂ , divide the longer resistor R ₂ into two as shown in Fig. 8, and divide the length of R _2a into two. Resistance R ₁
(i.e., the length _{l 1 and} the width w ₂ ), and the length of R _2b is the remaining length l ₃ (=l ₂
-l ₁ ) (that is, length l ₃ and width w ₂ ), and these two portions R _2a and R _2b are electrically contacted by the aluminum layer 4 . In this way, the shapes of the resistance layers as a whole can be approximated to each other,
This makes it possible to reduce pattern errors and diffusion distribution errors.

Furthermore, in order to make the shapes of the resistive layers even more similar to each other, two resistors R1 and _R1 are used as shown in FIG.
Divide _R2 into smaller pieces if necessary, and add the aluminum layers 4a, 4b, 4 to the desired length.
If the connection is made at c, the temperature compensation accuracy can be further improved.

As described above, according to the present invention, by selecting and combining the resistors constituting the circuit elements such that their resistance ratios are positive or negative, it is possible to easily create a circuit having a desired temperature coefficient as a whole. can be obtained. Therefore, it is possible to easily compensate for the temperature of a circuit configuration that has conventionally been thought to be impossible to compensate for, and it is therefore possible to obtain a semiconductor integrated circuit with even better temperature compensation accuracy.

In the above-described embodiment, the contact portions 3 are provided at both ends of the linear resistance layer portion 1 of the resistor, but the present invention may be applied even if the contact portions 3 are provided only at one end, if necessary.

[Brief explanation of the drawing]

1 to 3 are connection diagrams showing a circuit to which the present invention can be applied, FIG. 4 is a plan view showing an example of a diffused resistance layer used in a temperature compensation circuit device according to the present invention, and FIG. A curve diagram showing changes in temperature coefficient with respect to width, FIG. 6 is a connection diagram showing another example of a circuit to which the present invention can be applied, and FIGS. 7 to 9 are plan views showing other examples of a diffused resistance layer. be. 1... Linear resistance layer section, 2... Contact, 3
. . . Contact layer portion, 4, 4a to 4c . . . Aluminum layer.

Claims (1)

[Scope of Claims] 1. First and second resistors as elements constituting a circuit to be formed on a semiconductor integrated device are formed on the semiconductor integrated device in parallel with each other in the length direction and have a constant width. a linear resistance layer portion, and a contact portion formed at one end or both ends of the linear resistance layer portion, each having a substantially equal shape, and the resistance ratio of the first and second resistances is positive or negative. 1. A temperature compensation circuit device in a semiconductor integrated device, characterized in that the widths of the linear resistance layer portions are set to different values so as to have a temperature coefficient of . 2. In the semiconductor integrated device according to claim 1, wherein at least one of the first and second resistors is divided into a plurality of resistance parts each consisting of the linear resistance layer part and the contact part. Temperature compensation circuit device.