Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JPS6248931B2 - - Google Patents
[go: Go Back, main page]

JPS6248931B2 - - Google Patents

Info

Publication number
JPS6248931B2
JPS6248931B2 JP54080215A JP8021579A JPS6248931B2 JP S6248931 B2 JPS6248931 B2 JP S6248931B2 JP 54080215 A JP54080215 A JP 54080215A JP 8021579 A JP8021579 A JP 8021579A JP S6248931 B2 JPS6248931 B2 JP S6248931B2
Authority
JP
Japan
Prior art keywords
pulse
pulse train
mixed
divisor
repetition period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54080215A
Other languages
Japanese (ja)
Other versions
JPS564928A (en
Inventor
Yutaka Nakamura
Toshihiro Okyama
Koichi Ju
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOEICHO GIJUTSU KENKYU HONBUCHO
Original Assignee
BOEICHO GIJUTSU KENKYU HONBUCHO
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOEICHO GIJUTSU KENKYU HONBUCHO filed Critical BOEICHO GIJUTSU KENKYU HONBUCHO
Priority to JP8021579A priority Critical patent/JPS564928A/en
Publication of JPS564928A publication Critical patent/JPS564928A/en
Publication of JPS6248931B2 publication Critical patent/JPS6248931B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/19Monitoring patterns of pulse trains

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Radar Systems Or Details Thereof (AREA)

Description

【発明の詳細な説明】 本発明は周期の異なる複数のパルス列が混在し
たパルス列から各パルス列の周期を検出するパル
ス繰返し周期識別方式に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse repetition period identification method for detecting the period of each pulse train from a pulse train in which a plurality of pulse trains with different periods coexist.

レーダ等の信号を受信してその送信源を探知す
る航空機等において、受信中のレーダ信号に各種
の繰返し周期を有する高周波パルスが混在し、そ
れぞれの発振源を知ることが困難な場合がある。
従つて受信したパルス信号からの特定のパルス列
を識別する必要が生ずる。
2. Description of the Related Art In an aircraft or the like that receives a radar signal and detects its transmission source, the radar signal being received contains a mixture of high-frequency pulses having various repetition periods, and it may be difficult to identify each oscillation source.
Therefore, it becomes necessary to identify a particular pulse train from a received pulse signal.

本発明は前述の点に鑑みなされたもので、限ら
れた期間中に入力された各々異なる繰返し周期を
有する複数のパルス列の混合パルス列から一定周
期を有するパルス列を分離検出する新規なパルス
繰返し周期識別方式を提供するものである。
The present invention has been made in view of the above-mentioned points, and is a novel pulse repetition period identification system that separates and detects a pulse train having a constant period from a mixed pulse train of a plurality of pulse trains each having a different repetition period input during a limited period. It provides a method.

以下図面を参照しながら本発明の好ましい実施
例について説明する。
Preferred embodiments of the present invention will be described below with reference to the drawings.

まず本発明の原理について述べる。第1図に示
すような限られた期間T中に入力された各々異な
る繰返し周期τA、τB、τCを有する3つのパル
ス列の混合パルス列Pを考える。ここで混合パル
ス列Pの各パルスの入力時刻はT0、T1、T2、…
…、Ti-1、……Toであつて、T0を基準点にした
各パルスまでの時間間隔は夫々S1、S2、……、S
i-1、Si、……、Soであり、またτA<τB<τC
であるとする。このような混合パルス列Pの隣接
する2つのパルスの最大時間間隔τnは、第1図
の場合τn=Ti+1−Tiであり、このときTiまた
はTi+1のパルスの少なくとも一方は繰返し周期
が最小のパルス列に属するパルスである。そこで
このτnを除数として、TiまたはTi+1のいずれか
一方、たとえばTiを基準時刻とし、Tiからパル
ス列P中の夫々Ti+1、Ti+2、……、Toまでの期
間を順次除算していく。このとき除算して整数値
の得られる度数がTn/τnの値に等しければ、こ
の時間τnは混合パルス列Pに混在する繰返し周
期が最短のパルス列の周期に一致する。第1図の
混合パルス列Pにおいてはτn=τAである。ここ
にTnは基準時刻TiからToまでの時間である。
もしこのときTn/τnとして整数値が得られない
か、あるいは整数値の得られる度数がTn/τn
値と異なれば、混合パルス列P中にτnをその繰
返し周期とするパルス列は存在しない。そこで次
にTi+2−Tiを除数として、再びTiを基準時刻と
したパルス列Pの各パルスまでの期間を順次除算
して、このとき整数値の得られる度数がTn
(Ti+2−Ti)の値に等しければ、このTi+2−Ti
は混合パルス列Pに混在する繰返し周期がTi+2
−Tiのパルス列の周期に一致する。もし上記の
方法において整数値の得られる度数がTn/(Ti
+2−Ti)の値と異なれば、このTi+2−Tiをその
繰返し周期とするパルス列は混合パルス列P中に
存在しないことになる。このような場合、さらに
i+1−Ti-1を除数として、時刻Ti-1からパルス
列Pの各パルスまでの時間を順次除算していく。
このとき整数値の得られる個数がTn′/(Ti+1
−Ti-1)の値に等しければ、Ti+1−Ti-1は、混合
パルス列Pに混在する繰返し周期がTi+1−Ti-1
のパルス列の周期に一致する。ここにTn′=To
−Ti-1である。以上のいずれかの方法により混
合パルス列Pに混在する3つのパルス列のいずれ
か1つのパルス列の繰返し周期を検出することが
できる。このようにして検出された繰返し周期を
有するパルスを混合パルス列Pから除去し、残り
のパルス列を混合パルス列P′として再び前述の方
法を繰返し実行することにより、混合パルス列
P′に混在する2つのパルス列のいずれか一方の繰
返し周期を検出することができ、さらにこの検出
された周期を有するパルスを混合パルス列P′から
除去して、残りのパルス列をP″として同様の操
作を実行することにより最後に残つたパルス列の
繰返し周期を検出することができる。なお第1図
から分るように、τA<τB<τCで、かつその差
が大きい場合の混合パルス列Pにおいて隣接する
2つのパルスの間隔の最大値τnはτAをその繰返
し周期とするパルス列の周期に一致し、さらにτ
Aをその繰返し周期とするパルスを混合パルス列
Pから除去した残りの混合パルス列P′における隣
接する2つのパルスの間隔の最大値τn′はτB
繰返し周期とするパルス列の周期に一致する。こ
のように混合パルス列の隣接する2つのパルスの
間隔の最大値は、その混合パルス列に混在する最
小繰返し周期のパルス列の周期に一致する場合が
多い。従つて混合パルス列中の各パルス列の周期
を検出するに際し、まず混合パルス列における最
大パルス間隔を除数に選定することが効率的な方
法である。
First, the principle of the present invention will be described. Consider a mixed pulse train P of three pulse trains each having different repetition periods τ A , τ B , and τ C that are input during a limited period T as shown in FIG. Here, the input times of each pulse of the mixed pulse train P are T 0 , T 1 , T 2 ,...
..., T i-1 , ... T o , and the time intervals to each pulse with T 0 as the reference point are S 1 , S 2 , ..., S
i-1 , S i , ..., S o and τ A < τ B < τ C
Suppose that The maximum time interval τ n between two adjacent pulses of such a mixed pulse train P is τ n =T i +1T i in the case of FIG. At least one of the pulses belongs to the pulse train with the minimum repetition period. Therefore, with this τ n as a divisor, either T i or T i+1 , for example T i, is the reference time, and from T i to T i +1 , T i +2 , . . . , T Sequentially divide the period up to o . At this time, if the frequency obtained by dividing and obtaining an integer value is equal to the value of T nn , then this time τ n matches the period of the pulse train with the shortest repetition period included in the mixed pulse train P. In the mixed pulse train P of FIG. 1, τ nA. Here, T n is the time from the reference time T i to T o .
If an integer value cannot be obtained for T nn at this time, or if the frequency at which the integer value can be obtained is different from the value of T nn , a pulse train whose repetition period is τ n is added to the mixed pulse train P. does not exist. Then, using T i +2 - T i as a divisor, we sequentially divide the period up to each pulse of the pulse train P with T i as the reference time again, and the frequency at which an integer value is obtained is T n /
If it is equal to the value of (T i+2 −T i ), then this T i+2 −T i
The repetition period mixed in the mixed pulse train P is T i +2
- corresponds to the period of the pulse train of T i . If the frequency of integer values obtained in the above method is T n /(T i
+2 −T i ), this means that a pulse train whose repetition period is T i+2 −T i does not exist in the mixed pulse train P. In such a case, the time from time T i-1 to each pulse of the pulse train P is sequentially divided using T i+1 −T i - 1 as a divisor.
At this time, the number of integer values obtained is T n ′/(T i+1
-T i-1 ), T i+1 -T i-1 means that the repetition period mixed in the mixed pulse train P is T i+1 -T i-1
corresponds to the period of the pulse train. Here T n ′=T o
-T i-1 . The repetition period of any one of the three pulse trains included in the mixed pulse train P can be detected by any of the above methods. By removing the pulses having the repetition period detected in this way from the mixed pulse train P and using the remaining pulse train as the mixed pulse train P' and repeating the above method again, the mixed pulse train
The repetition period of either one of the two pulse trains mixed in P′ can be detected, and the pulse with this detected period is removed from the mixed pulse train P′, and the remaining pulse train is set as P″ and the same repetition period is detected. By performing this operation, it is possible to detect the repetition period of the last remaining pulse train.As can be seen from Figure 1, the mixed pulse train when τ A < τ B < τ C and the difference is large. The maximum value τ n of the interval between two adjacent pulses at P coincides with the period of the pulse train whose repetition period is τ A , and furthermore, τ
The maximum value τ n ' of the interval between two adjacent pulses in the remaining mixed pulse train P' after removing the pulse having a repetition period of A from the mixed pulse train P' matches the period of the pulse train having a repetition period of τ B. In this way, the maximum value of the interval between two adjacent pulses in a mixed pulse train often matches the period of the pulse train with the minimum repetition period included in the mixed pulse train. Therefore, when detecting the period of each pulse train in the mixed pulse train, it is an efficient method to first select the maximum pulse interval in the mixed pulse train as the divisor.

第2図は本発明に係るパルス繰返し周期識別方
式に使用する回路の一実施例を示すブロツク図で
あつて、パルス列入力端子1に入力された混合パ
ルス列は、パルス間隔積算回路2を介して記憶回
路3に加えられ、記憶回路3はパルス間隔積算回
路2で得られた混合パルス列Pの最初のパルスか
ら各パルスまでの時間間隔を記憶する。最大パル
ス間隔検出回路4は記憶回路3に記憶されたパル
ス間隔積算データから最大パルス間隔を検出し、
除数選定回路5へ送出する。除数選定回路5は入
力された最大パルス間隔を選定された除数として
除算回路6へ送出するとともに、後述する整除度
数判定回路8からの判定結果に応じて、選定され
た除数に該当するパルス間隔をパルス繰返し周期
識別出力として出力端子10へ送出するか、さも
なければ新たに所定の除数となるべきパルス間隔
を選定して除算回路6へ送出する。除算回路6
は、除数選定回路5で選定された除数となるべき
時間間隔を有する2つのパルスのいずれか一方か
ら混合パルス列Pの各パルスまでの時間を記憶回
路3から呼び出し、これを選定された除数で順次
除算していき、その結果を整除度数検出回路7へ
送出する。整除度数検出回路7は除算の結果から
整除された時間のパルスを検出して、整除度数判
定回路8及び検出パルス除去回路9へ送出する。
整除度数判定回路8は整除された度数が所定度数
に達するかどうかを判定し、その結果を除数選定
回路5及び検出パルス除去回路9へ送出する。整
除される度数が所定数に達しないと、整除度数判
定回路8からの判定結果にもとづき、除数選定回
路5は新たに所定の除数となるべきパルス間隔を
選定して除算回路6へ送出し、整除される度数が
所定度数になるまで同じ動作を繰返す。除算結果
が所定度数に達するとき、除数選定回路5は、そ
のとき選定された除数をなすパルス間隔をパルス
繰返し周期識別出力として出力端子10へ送出
し、また一方、検出パルス除去回路9はそのとき
選定された除数で除算して整数値の得られるパル
スを記憶回路3に記憶された混合パルス列Pから
除去する。
FIG. 2 is a block diagram showing an embodiment of the circuit used in the pulse repetition period identification method according to the present invention, in which the mixed pulse train input to the pulse train input terminal 1 is stored via the pulse interval integration circuit 2. The memory circuit 3 is added to the circuit 3 and stores the time interval from the first pulse to each pulse of the mixed pulse train P obtained by the pulse interval integration circuit 2. The maximum pulse interval detection circuit 4 detects the maximum pulse interval from the pulse interval integrated data stored in the storage circuit 3,
It is sent to the divisor selection circuit 5. The divisor selection circuit 5 sends the inputted maximum pulse interval as the selected divisor to the division circuit 6, and also determines the pulse interval corresponding to the selected divisor according to the judgment result from the divisor judgment circuit 8, which will be described later. It is sent to the output terminal 10 as a pulse repetition period identification output, or alternatively, a pulse interval that should become a new predetermined divisor is selected and sent to the division circuit 6. Division circuit 6
reads from the memory circuit 3 the time from either one of the two pulses having the time interval that should be the divisor selected by the divisor selection circuit 5 to each pulse of the mixed pulse train P, and sequentially calculates this time using the divisor selected. The division is carried out and the result is sent to the regular divisor detection circuit 7. The regular divisor detection circuit 7 detects the pulse of the divided time from the result of the division, and sends it to the regular divisor determination circuit 8 and the detection pulse removal circuit 9.
The divisor determination circuit 8 determines whether the divisor reaches a predetermined frequency, and sends the result to the divisor selection circuit 5 and the detection pulse removal circuit 9. If the divisor frequency does not reach a predetermined number, the divisor selection circuit 5 selects a new pulse interval that should be a predetermined divisor based on the determination result from the divisor determination circuit 8, and sends it to the division circuit 6. The same operation is repeated until the frequency to be divided reaches the predetermined frequency. When the division result reaches a predetermined frequency, the divisor selection circuit 5 sends the pulse interval forming the divisor selected at that time to the output terminal 10 as a pulse repetition period identification output, and on the other hand, the detection pulse removal circuit 9 outputs the pulse interval forming the divisor selected at that time. Pulses for which an integer value is obtained by dividing by the selected divisor are removed from the mixed pulse train P stored in the storage circuit 3.

次に第1図を参照しながら第2図の実施例につ
いてその動作を説明する。記憶回路3にはパルス
間隔積算回路2で得られた混合パルス列Pの最初
のパルスを基準点とした各パルスまでの時間S1
S2、……、Soが記憶される。最大パルス間隔検
出回路4は記憶回路3に記憶されたパルス間隔積
算データから最大パルス間隔τnを検出して除数
選定回路5へ送出する。除数選定回路5はτn
選定された除数として除算回路6へ送出し、除算
回路6はτnだけ隔たつた2つのパルス中一方の
パルスを基準時刻とした混合パルス列Pの各パル
スまでの時間Si+1−Si、Si+2−Si、……、So
−Siを順次記憶回路3から検出し、順次τnで除
算していき、その結果を整除度数検出回路7へ送
出する。整除度数検出回路7は除算の結果整数の
得られるパルスPA1、PA2、……、PA7を検
出し、整除度数判定回路8及び検出パルス除去回
路9へ送出する。整除度数判定回路8はPA1
A2、……、PA7の個数がTn/τn(すなわち
(So−Si)/τn)の値に等しいかどうかを判定
し、その結果を除数選定回路5及び検出パルス除
去回路9へ送出する。第1図の混合パルス列Pの
場合、整除度数判定回路8は、PA1、PA2、…
…、PA7の個数がTn/τnの値に等しければ等
しいという判定結果を送出し、除数選定回路5は
τnをパルス周期識別出力として出力端子10へ
出力する。また一方、検出パルス除去回路9は記
憶回路3に記憶されている混合パルス列PからP
A1、PA2、……、PA7のパルスを除去する。
このとき出力されたτnは混合パルス列に混在す
るτAをその周期とするパルス列の繰返し周期に
一致する。またこの時点では記憶回路3には、混
合パルス列PのうちPA1、PA2、……、PA7
を削除されたパルス列、つまり繰返し周期がτ
B、τCのパルス列が混在するパルス列P′の各パル
スまでの期間が記憶されている。そこで次に最大
パルス間隔検出回路4により最大パルス間隔τ
n′を検出し、前述と同様の操作を実行して、τ
n′が除数選定回路5から出力されるとともに、混
合パルス列P′からPB1、PB2、PB3のパルス
が削除される。このとき出力されたτn′は混合パ
ルス列P′に混在するτBをその繰返し周期とする
パルス列の周期に一致する。またこの時点では記
憶回路3には混合パルス列P′のうちPB1、PB
、PB3を削除したパルス列、つまり繰返し周
期τCのパルス列P″の各パルスまでの期間が記憶
されている。そこでさらにパルス間隔検出回路4
により最大パルス間隔τn″を検出し、再び前述と
同じ操作を繰返して、繰返し周期τCのパルス列
の周期と一致するτn″が送出される。
Next, the operation of the embodiment shown in FIG. 2 will be explained with reference to FIG. The memory circuit 3 stores the time S 1 to each pulse with the first pulse of the mixed pulse train P obtained by the pulse interval integration circuit 2 as a reference point,
S 2 , ..., S o are stored. The maximum pulse interval detection circuit 4 detects the maximum pulse interval τ n from the pulse interval integrated data stored in the storage circuit 3 and sends it to the divisor selection circuit 5 . The divisor selection circuit 5 sends τ n as the selected divisor to the division circuit 6, and the division circuit 6 calculates the pulses up to each pulse of the mixed pulse train P using one of the two pulses separated by τ n as the reference time. Time S i+1 −S i , S i+2 −S i , ..., S o
-S i is sequentially detected from the storage circuit 3, sequentially divided by τ n , and the result is sent to the regular divisor detection circuit 7. The regular divisor detection circuit 7 detects pulses PA1 , PA2 , . The divisor power judgment circuit 8 is P A1 ,
It is determined whether the number of P A2 , . Send to circuit 9. In the case of the mixed pulse train P shown in FIG.
..., if the number of P A7 is equal to the value of T nn , a determination result that they are equal is sent, and the divisor selection circuit 5 outputs τ n to the output terminal 10 as a pulse period identification output. On the other hand, the detection pulse removal circuit 9 removes the mixed pulse train P from the mixed pulse train P stored in the storage circuit 3.
Remove pulses A1 , P A2 , ..., P A7 .
The output τ n at this time matches the repetition period of the pulse train whose period is τ A mixed in the mixed pulse train. At this point, the memory circuit 3 stores P A1 , P A2 , ..., P A7 of the mixed pulse train P.
The pulse train with the removed pulse train, that is, the repetition period is τ
The period up to each pulse of pulse train P' in which pulse trains B and τ C are mixed is stored. Then, the maximum pulse interval detection circuit 4 determines the maximum pulse interval τ.
Find n ′ and perform similar operations as above to find τ
n ' is output from the divisor selection circuit 5, and pulses P B1 , P B2 , and P B3 are deleted from the mixed pulse train P'. The output τ n ′ at this time matches the period of the pulse train whose repetition period is τ B which is mixed in the mixed pulse train P′. Also, at this point, the memory circuit 3 stores P B1 and P B of the mixed pulse train P'.
2 , the pulse train with P B3 deleted, that is, the period up to each pulse of the pulse train P'' with a repetition period τ C is stored.Therefore, the pulse interval detection circuit 4
The maximum pulse interval τ n ″ is detected by this, and the same operation as described above is repeated again to send out τ n ″ that matches the period of the pulse train with the repetition period τ C.

このようにして、入力された混合パルス列から
該パルス列を構成するτA、τB、τCをその繰返
し周期とする各パルス列の周期が識別されたこと
になる。
In this way, the period of each pulse train whose repetition period is τ A , τ B , and τ C constituting the pulse train is identified from the input mixed pulse train.

なお、前述の実施例においては、入力される混
合パルス列は繰返し周期が大きく異なる3つのパ
ルス列から構成されているとしたが、本発明はこ
れに限定されず混合パルス列が夫々任意の繰返し
周期を有する2つ以上のパルス列で構成されてい
ても、本発明を適用して混合パルス列からそれを
構成する各パルス列の繰返し周期を識別すること
ができる。
In the above embodiment, the input mixed pulse train is composed of three pulse trains with greatly different repetition periods, but the present invention is not limited to this, and each mixed pulse train can have an arbitrary repetition period. Even if the mixed pulse train is composed of two or more pulse trains, the present invention can be applied to identify the repetition period of each pulse train forming the mixed pulse train.

以上の説明から明らかなように本発明に係るパ
ルス繰返し周期識別方式は、限られた期間中に入
力された各々異なる繰返し周期を有する複数のパ
ルス列の混在する混合パルス列から各パルス列の
繰返し周期を容易に識別することができるので、
パルス繰返し周波数識別装置等に用いて極めて有
用である。
As is clear from the above description, the pulse repetition period identification method according to the present invention easily determines the repetition period of each pulse train from a mixed pulse train in which a plurality of pulse trains each having a different repetition period are input during a limited period. Since it can be identified as
It is extremely useful for use in pulse repetition frequency identification devices, etc.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は混合パルス列を示す図、第2図は本発
明の一実施例を示すブロツク図である。 1…入力端子、2…パルス間隔積算回路、3…
記憶回路、4…最大パルス間隔検出回路、5…除
数選定回路、6…除算回路、7…整除度数検出回
路、8…整除度数判定回路、9…検出パルス除去
回路、10…出力端子。
FIG. 1 is a diagram showing a mixed pulse train, and FIG. 2 is a block diagram showing an embodiment of the present invention. 1...Input terminal, 2...Pulse interval integration circuit, 3...
Memory circuit, 4... Maximum pulse interval detection circuit, 5... Divisor selection circuit, 6... Division circuit, 7... Regular division power detection circuit, 8... Regular division power determination circuit, 9... Detected pulse removal circuit, 10... Output terminal.

Claims (1)

【特許請求の範囲】 1 限られた期間中に入力された各々異なる繰返
し周期を有する複数系統のパルス列が混在してな
る混合パルス列に属する2つのパルスの時間間隔
を除数として、当該パルス間隔を構成するパルス
のいずれか一方から前記混合パルス列中の各個の
パルスまでの時間を順次除算する第1の操作と、
整数値で得られた除算結果の度数が所定数になる
まで前記除数となるパルス間隔を異ならせて同じ
操作を繰返す第2の操作とを含み、整数値で得ら
れた前記除算結果の度数が所定数に一致したと
き、除数としたパルス間隔を前記混合パルス列中
の1つの系統のパルス列の繰返し周期として識別
するようにしたことを特徴とするパルス繰返し周
期識別方式。 2 前記第1の操作において除数とするパルス間
隔を混合パルス列に属する隣接した2つのパルス
の時間間隔中最大のものに選ぶことを特徴とする
特許請求の範囲第1項に記載のパルス繰返し周期
識別方式。
[Scope of Claims] 1. The pulse interval is configured by setting the time interval between two pulses belonging to a mixed pulse train, which is a mixture of multiple pulse trains each having a different repetition period and input during a limited period as a divisor, as a divisor. a first operation of sequentially dividing the time from either one of the pulses to each individual pulse in the mixed pulse train;
a second operation of repeating the same operation by changing the pulse interval serving as the divisor until the frequency of the division result obtained by the integer value reaches a predetermined number; A pulse repetition period identification method characterized in that, when the pulse interval matches a predetermined number, the pulse interval used as the divisor is identified as the repetition period of one system of pulse trains in the mixed pulse train. 2. Pulse repetition period identification according to claim 1, characterized in that the pulse interval used as a divisor in the first operation is selected to be the largest among the time intervals of two adjacent pulses belonging to the mixed pulse train. method.
JP8021579A 1979-06-27 1979-06-27 Pulse repetitive frequency discrimination system Granted JPS564928A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8021579A JPS564928A (en) 1979-06-27 1979-06-27 Pulse repetitive frequency discrimination system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8021579A JPS564928A (en) 1979-06-27 1979-06-27 Pulse repetitive frequency discrimination system

Publications (2)

Publication Number Publication Date
JPS564928A JPS564928A (en) 1981-01-19
JPS6248931B2 true JPS6248931B2 (en) 1987-10-16

Family

ID=13712153

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8021579A Granted JPS564928A (en) 1979-06-27 1979-06-27 Pulse repetitive frequency discrimination system

Country Status (1)

Country Link
JP (1) JPS564928A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0378714U (en) * 1989-08-10 1991-08-09

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010094725A (en) * 2008-10-20 2010-04-30 Shoda Seisakusho:Kk Hole punching mold

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0378714U (en) * 1989-08-10 1991-08-09

Also Published As

Publication number Publication date
JPS564928A (en) 1981-01-19

Similar Documents

Publication Publication Date Title
US4045767A (en) Method of ultrasonic data communication and apparatus for carrying out the method
RU2127438C1 (en) Method of numerical detection of pulse messages, method of numerical recognition of pulses, device detecting pulses, device recognizing pulses and their usage under s mode
JPH0120389B2 (en)
JPH0282835A (en) Digital signal receiver
JPS6248931B2 (en)
US4745621A (en) Method of and apparatus for detecting minimum bit number of received data
US2985715A (en) Gating system
SU966879A1 (en) Discriminator-converter of pulse signals
SU803111A1 (en) Frequency-modulated signal quality detector
SU983999A1 (en) Device for shaping pulse trains
JP2001257569A (en) Pulse string separating device and pulse separating method
JPH0154889B2 (en)
SU907861A1 (en) Device for receiving information in frequency code
SU1406742A1 (en) Test signal generator
SU1095419A1 (en) Interference suppression device
JPS6142895B2 (en)
SU603118A2 (en) Digital demodulator of signals of relative phase modulation
SU1552391A1 (en) Reference voltage shapaer for demodulator of phase-manipulated signals
SU576541A1 (en) Periodic voltage monitoring device
SU1211876A1 (en) Controlled frequency divider
SU1725149A1 (en) Device for measuring ratio of frequencies of pulse sequences
SU866753A1 (en) Digital controllable generator
SU991588A1 (en) Time interval shaping device
SU1511854A1 (en) Device for tolerance frequency check
SU1003371A2 (en) Device for synchronizing with m-sequence