JPS6249761B2 - - Google Patents
Info
- Publication number
- JPS6249761B2 JPS6249761B2 JP13187479A JP13187479A JPS6249761B2 JP S6249761 B2 JPS6249761 B2 JP S6249761B2 JP 13187479 A JP13187479 A JP 13187479A JP 13187479 A JP13187479 A JP 13187479A JP S6249761 B2 JPS6249761 B2 JP S6249761B2
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- negative feedback
- circuit
- capacitor
- feedback
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/42—Modifications of amplifiers to extend the bandwidth
- H03F1/48—Modifications of amplifiers to extend the bandwidth of aperiodic amplifiers
- H03F1/486—Modifications of amplifiers to extend the bandwidth of aperiodic amplifiers with IC amplifier blocks
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Description
【発明の詳細な説明】
この発明は、出力結合コンデンサを有する増幅
出力回路を用いた負帰還増幅回路に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a negative feedback amplifier circuit using an amplification output circuit having an output coupling capacitor.
本発明者等は本発明に先立つて、一電源パワー
IC等の出力結合コンデンサを有する増幅出力回
路において第１図に示すように、低周波数特性を
改善するため、直流負帰還とは別径路で交流負帰
還抵抗R2を結合コンデンサC1の負荷側端子に設
けることを考えた。 Prior to the present invention, the present inventors have developed
As shown in Figure 1 in an amplification output circuit that has an output coupling capacitor such as an IC, in order to improve the low frequency characteristics, an AC negative feedback resistor R 2 is connected to the load side of the coupling capacitor C 1 in a path separate from the DC negative feedback. I thought about installing it on the terminal.
なお、抵抗R1は、直流帰還抵抗である。 Note that the resistor R1 is a DC feedback resistor.
このような構成の負帰還増幅出力回路にあつて
は、第２図に実線で示すように、電圧利得対周波
数特性の低減周波数にピークを生じることが判明
した。この原因は、交流帰還経路に２つのコンデ
ンサC1，C2が挿入されるため、コンデンサC2の
両端で帰還信号の位相差が約180゜になり、コン
デンサC2のインピーダンスが等価的に低下する
ためである。 It has been found that in the negative feedback amplification output circuit having such a configuration, a peak occurs at the reduced frequency in the voltage gain versus frequency characteristic, as shown by the solid line in FIG. The reason for this is that two capacitors C 1 and C 2 are inserted in the AC feedback path, so the phase difference between the feedback signals at both ends of capacitor C 2 becomes approximately 180°, which equivalently reduces the impedance of capacitor C 2 . This is to do so.
この発明は、交流負帰還回路による無信号電流
を低減するとともに、電圧利得対周波数特性の改
善を図つた負帰還増幅回路を提供するためになさ
れた。 The present invention has been made in order to provide a negative feedback amplifier circuit that reduces non-signal current caused by an AC negative feedback circuit and improves voltage gain versus frequency characteristics.
この発明は、負帰還回路における直流阻止コン
デンサC2に直列に抵抗を挿入して、低減周波数
でのコンデンサC2の等価インピーダンスの低下
を補うようにするものである。 In this invention, a resistor is inserted in series with the DC blocking capacitor C 2 in the negative feedback circuit to compensate for a decrease in the equivalent impedance of the capacitor C 2 at a reduced frequency.
以下、この発明を実施例とともに詳細に説明す
る。 Hereinafter, this invention will be explained in detail together with examples.
第８図は、この発明の一実施例を示す回路図で
ある。 FIG. 8 is a circuit diagram showing an embodiment of the present invention.
この回路は、一電源パワーIC等の出力結合コ
ンデンサC1を設ける増幅出力回路１の負帰還端
子（−）と出力端子OUTとの間に設けられた直
流負帰還抵抗R1と、この負帰還端子（−）に一
端が接続された抵抗R4とコンデンサC2との直列
回路と、この直列回路の他端と上記結合コンデン
サC1を介した出力との間に設けられた第１交流
負帰還抵抗R2と、上記直列回路の他端と接地電
位との間に設けた第２交流負帰還抵抗R2とによ
り負帰還回路を構成するものである。 This circuit consists of a DC negative feedback resistor R 1 provided between the negative feedback terminal (-) of an amplifier output circuit 1 and an output terminal OUT, which is provided with an output coupling capacitor C 1 such as a power IC, and this negative feedback resistor R 1 . A series circuit of a resistor R4 and a capacitor C2 , one end of which is connected to the terminal (-), and a first AC negative connected between the other end of this series circuit and the output via the coupling capacitor C1 . A negative feedback circuit is constituted by the feedback resistor R 2 and a second AC negative feedback resistor R 2 provided between the other end of the series circuit and the ground potential.
この実施例においては、コンデンサC2に直列
に抵抗R4を挿入するものであるため、前述のよ
うに抵減周波数でのコンデンサC2のインピーダ
ンスが等価的に低下することを補うことができ
る。 In this embodiment, since the resistor R 4 is inserted in series with the capacitor C 2 , it is possible to compensate for the equivalent reduction in the impedance of the capacitor C 2 at the reduction frequency as described above.
これにより、結合コンデンサの負荷側から帰還
信号を得るものとし、負帰還回路による無信号電
流（直流電流）の増加を防止するとともに、周波
数特性の改善を図ることができる。 Thereby, a feedback signal is obtained from the load side of the coupling capacitor, and it is possible to prevent an increase in no-signal current (DC current) due to the negative feedback circuit and to improve frequency characteristics.
なお、この実施例回路における電圧利得は、多
抵抗R1〜R4を、R1≫R2、R4≫R3のように設定す
ると、次式(1)により求められる。 Note that the voltage gain in this example circuit is determined by the following equation (1) when the multiresistances R 1 to R 4 are set such that R 1 >> R 2 and R 4 >> R 3 .
Gv≒１／Ｒ４／Ｒ１＋Ｒ３／Ｒ２ ……(1)
上記各素子の定数は、例えば、コンデンサC1
を470μＦ、コンデンサC2を100μＦ、抵抗R1を
20KΩ、抵抗R2を2KΩ、抵抗R3を10Ω、抵抗R4
を100Ωとするものである。 Gv≒1/R 4 /R 1 +R 3 /R 2 ...(1) The constant of each element above is, for example, capacitor C 1
is 470μF, capacitor C2 is 100μF, resistor R1 is
20KΩ, resistor R 2 2KΩ, resistor R 3 10Ω, resistor R 4
is 100Ω.
増幅出力回路１をモノリシツクICに構成した
場合には、抵抗R1，R4をモノリシツクIC内に構
成して、外付素子数の削減を図ることが望まし
い。また、利得設定の上からも、式(1)に示すよう
に、抵抗比R4／R1の精度が比較的高く得られる
ことより、両抵抗R1，R4をモノリシツクIC化す
ることが望ましい。 When the amplification output circuit 1 is configured as a monolithic IC, it is desirable to configure the resistors R 1 and R 4 in the monolithic IC to reduce the number of external elements. Also, from the perspective of gain setting, as shown in equation (1), since the accuracy of the resistance ratio R 4 /R 1 can be obtained relatively high, it is possible to make both resistors R 1 and R 4 into monolithic ICs. desirable.
なお、このように抵抗R1，R4をモノリシツク
IC化した場合でも、外付抵抗R2，R3の比を選ぶ
ことにより、比較的広い範囲にわたつて任意の利
得設定が可能となる。 Note that resistors R 1 and R 4 are monolithic in this way.
Even when implemented as an IC, arbitrary gain settings can be made over a relatively wide range by selecting the ratio of external resistors R 2 and R 3 .
交流負帰還抵抗R2，R3はモノリシツクIC内部
の半導体抵抗とすることもできるが、外付抵抗の
方が歪率低減のためには好しい。すなわち、IC
中の出力パワートランジスタより発生される信号
に応答した熱によりIC内の半導体抵抗の抵抗値
が変化するという現象（熱帰還）によつて、低周
波歪率の悪化が生じる場合がある。これに対し、
交流負帰還抵抗R2，R3をIC外部の外付抵抗とす
ることによつて、上述の如き熱帰還による低周波
歪率の悪化を防止することができる。 Although the AC negative feedback resistors R 2 and R 3 can be semiconductor resistors inside the monolithic IC, external resistors are preferable for reducing the distortion factor. That is, I.C.
The low frequency distortion factor may deteriorate due to a phenomenon (thermal feedback) in which the resistance value of the semiconductor resistor inside the IC changes due to the heat generated in response to the signal generated by the output power transistor inside the IC. On the other hand,
By using AC negative feedback resistors R 2 and R 3 as external resistors outside the IC, it is possible to prevent the deterioration of the low frequency distortion factor due to thermal feedback as described above.
この発明は、一電源パワーIC等の出力結合コ
ンデンサを必要とする増幅出力回路に広く利用で
きる。 The present invention can be widely used in amplification output circuits that require output coupling capacitors such as single-source power ICs.
第１図は、本発明者等によつて本発明に先立つ
て提案された負帰還増幅出力回路の一例を示す回
路図、第２図は、その電圧利得対周波数特性図、
第３図は、この発明の一実施例を示す回路図であ
る。
１……増幅出力回路。
FIG. 1 is a circuit diagram showing an example of a negative feedback amplification output circuit proposed by the present inventors prior to the present invention, and FIG. 2 is a voltage gain versus frequency characteristic diagram thereof.
FIG. 3 is a circuit diagram showing an embodiment of the present invention. 1...Amplification output circuit.
Claims (1)
路において、負帰還入力端子と出力端子との間に
設けられた抵抗R1と、上記負帰還端子に一端が
接続された抵抗R4とコンデンサC2との直列回路
と、この直列回路の他端と上記結合コンデンサと
負荷との接続点との間に設けられた抵抗R2と、
上記直列回路の他端と交流的接地端子との間に設
けられた抵抗R3とで構成された帰還回路を設け
たことを特徴とする負帰還増幅出力回路。 ２ 特許請求の範囲第１項記載の増幅出力回路は
モノリシツクパワーICとして構成され、上記抵
抗R1，R4は、モノリシツクIC内に形成するもの
としたことを特徴とする負帰還増幅出力回路。[Claims] 1. In an amplifier output circuit having an output coupling capacitor C1 , a resistor R1 provided between a negative feedback input terminal and an output terminal, and a resistor R1 connected at one end to the negative feedback terminal. 4 and a capacitor C 2 , a resistor R 2 provided between the other end of this series circuit and the connection point between the coupling capacitor and the load;
A negative feedback amplification output circuit comprising a feedback circuit including a resistor R3 provided between the other end of the series circuit and an AC ground terminal. 2. A negative feedback amplification output circuit characterized in that the amplification output circuit according to claim 1 is configured as a monolithic power IC, and the resistors R 1 and R 4 are formed within the monolithic IC. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13187479A JPS5656013A (en) | 1979-10-15 | 1979-10-15 | Negative feedback amplification output circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13187479A JPS5656013A (en) | 1979-10-15 | 1979-10-15 | Negative feedback amplification output circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5656013A JPS5656013A (en) | 1981-05-16 |
| JPS6249761B2 true JPS6249761B2 (en) | 1987-10-21 |
Family
ID=15068151
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13187479A Granted JPS5656013A (en) | 1979-10-15 | 1979-10-15 | Negative feedback amplification output circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5656013A (en) |
-
1979
- 1979-10-15 JP JP13187479A patent/JPS5656013A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5656013A (en) | 1981-05-16 |
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