JPS6252312B2 - - Google Patents
Info
- Publication number
- JPS6252312B2 JPS6252312B2 JP53101607A JP10160778A JPS6252312B2 JP S6252312 B2 JPS6252312 B2 JP S6252312B2 JP 53101607 A JP53101607 A JP 53101607A JP 10160778 A JP10160778 A JP 10160778A JP S6252312 B2 JPS6252312 B2 JP S6252312B2
- Authority
- JP
- Japan
- Prior art keywords
- row
- numbered
- leds
- odd
- electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Description
【発明の詳細な説明】
本発明は、LEDを発光絵素とするマトリツク
スパネル表示装置に関し、マトリツクスパネルを
形成するLEDの数及び配置を変更することなく
見掛上の解像度を向上することを目的とするもの
である。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a matrix panel display device using LEDs as light-emitting pixels, and an object to improve the apparent resolution without changing the number and arrangement of LEDs forming the matrix panel. The purpose is to
LEDを発光絵素として、アスペクト比に応じ
行、列等間隔でマトリツクス状に配してなるマト
リツクスパネルは、LEDを高密度で配列するこ
との困難さと、駆動回路の複雑さ等種々の問題故
に、通常のブラウン管に比して解像度が落ちる点
を免れ得ない。例えば、発光絵素を形成する
LEDには平均値0.5mAの電流を流すと通常のテ
レビ表示には充分な輝度が得られる。1本の走査
電極に例えば150個のLEDが接続されているとす
ると走査パネル発生回路のドライバにはLED単
体に流す150倍の電流が流れる。さらに垂直方向
の絵素数を100とすれば1本の走査線は1/100のデ
ユーテイで働かねばならないからドライバには
7.5Aのパルス電流が流れることになる。もしこ
の垂直方向の絵素を2倍にしようとすればドライ
バのパルス電流は15A必要となり、実現が非常に
困難となる。 Matrix panels, in which LEDs are used as light-emitting pixels, are arranged in a matrix at equal intervals in rows and columns depending on the aspect ratio, but there are various problems such as the difficulty of arranging LEDs at high density and the complexity of the drive circuit. Therefore, it is inevitable that the resolution will be lower than that of a normal cathode ray tube. For example, forming luminescent pixels
When an average current of 0.5 mA is passed through the LED, sufficient brightness can be obtained for normal television display. If, for example, 150 LEDs are connected to one scanning electrode, a current 150 times that of a single LED flows through the driver of the scanning panel generation circuit. Furthermore, if the number of picture elements in the vertical direction is 100, one scanning line must work at a duty of 1/100, so the driver
A pulse current of 7.5A will flow. If we were to double the number of picture elements in the vertical direction, the pulse current of the driver would need to be 15A, which would be extremely difficult to achieve.
本発明は斯る点に鑑み、マトリツクスパネル上
のLEDと走査電極の接続及び走査電圧の印加順
序、即ち相隣る走査線対毎に発光表示する組み合
せに工夫を凝すことにより、発光絵素数及び駆動
電流に何等変更を加えることなく見掛上の解像度
を向上せしめたマトリツクスパネル表示装置を提
案するものである。 In view of these points, the present invention has been developed by devising the connection between the LEDs on the matrix panel and the scanning electrodes and the order in which the scanning voltages are applied, that is, the combination of displaying light emission for each pair of adjacent scanning lines. The present invention proposes a matrix panel display device that improves the apparent resolution without making any changes to the prime numbers or drive current.
以下本発明の詳細を図面を参照しつつ説明す
る。本発明に用いるマトリツクスパネルはその要
部拡大図を示す第1図から理解される如く、発光
絵素を形成するLEDの行、列配列については、
格別の特色はなく、各LEDと走査電極との接続
関係に特徴が在る。 The details of the present invention will be explained below with reference to the drawings. As can be understood from FIG. 1, which shows an enlarged view of the main part of the matrix panel used in the present invention, the row and column arrangement of the LEDs forming the light-emitting picture elements is as follows.
There is no special feature, but the connection between each LED and the scanning electrode is unique.
いま、LEDの配列を第1図図示の如く、行
(横列)方向に沿つてL11,L12,L13…L1n、列
(縦列)方向に沿いL11,L21,L31…Lm1、一般に
第m行第n例のLEDをLmnと指標すると、各行
のLEDは、2系列の走査電極に接続される。 Now, the arrangement of the LEDs is as shown in Figure 1: L 11 , L 12 , L 13 ...L 1 n along the row (horizontal) direction, and L 11 , L 21 , L 31 ... along the column (vertical) direction. Lm 1 , generally indexing the LED of the mth row and nth example as Lmn, the LEDs of each row are connected to two series of scanning electrodes.
第1行のLED群を例にとつて説明すると、
L1、2k−1(但しkは整数)、即ち奇数番目の
LEDは全てA電極に、L1、2k、即ち偶数番目の
LEDは全てB電極に接続されており、同様に第
2行のLED群のうち寄数番目のLEDはC電極
に、偶数番目のLEDはD電極にそれぞれ接続さ
れ、以下同様に図示の如く接続される。 Taking the first row of LEDs as an example,
L 1 , 2k−1 (k is an integer), that is, the odd number
All LEDs are connected to the A electrode, L 1 , 2k, that is, even numbered
All the LEDs are connected to the B electrode, and in the same way, the odd-numbered LEDs in the second row of LEDs are connected to the C electrode, the even-numbered LEDs are connected to the D electrode, and so on. be done.
上記信号電極SGは、セラミツク基板或は酸化
絶縁処理したアルミニウム板上にフオトエツチン
グ法等に依つて各列のLEDの下を通つて平行に
設けられる。また、AB,CD,…等の走査電極
は、極細の金線をワイヤボンデイングする方法を
採つてもよいが、透明板上に図示の如き透明の導
電パターンを蒸着し、各LEDの端子とパターン
上の接続点との間に導電性接着剤を介して接続す
る方法を採ることもできる。なお、SG1,SG
2,SG3…は、信号電極を示す。 The signal electrodes SG are provided in parallel on a ceramic substrate or an aluminum plate treated with oxidation insulation by a photo-etching method or the like, passing under each row of LEDs. Furthermore, for scanning electrodes such as AB, CD, etc., wire bonding of ultra-fine gold wires may be used, but a transparent conductive pattern as shown in the figure is deposited on a transparent plate, and the terminals of each LED and pattern It is also possible to use a method of connecting to the upper connection point via a conductive adhesive. In addition, SG1, SG
2, SG3... indicate signal electrodes.
次に、斯るマトリツクスパネルMPの駆動回路
のブロツクダイアグラムを表わす第2図、及び動
作波形説明図を表わす第3図を参照しつゝ説明す
る。 Next, a description will be given with reference to FIG. 2, which shows a block diagram of the drive circuit of the matrix panel MP , and FIG. 3, which shows an explanatory diagram of operating waveforms.
本発明装置では、基本的に相隣る行のLED群
のうち、一方の行の奇数番目のLED群と他の行
の偶数番目のLED群を1H単位で同時に点灯す
る。この関係をスキヤンパルスが印加される順序
で示すと、第3図イの如くなり、各走査電極A,
B,C…に印加されるスキヤンパルスを時間軸で
表わすと第3図ロの如くなる。換言すれば、水平
ドライバ回路HDを介して1ライン毎に各列の
LED群に、当該ライン(2つの相隣るラインの
うちいずれか一方)を構成するLED群の発光情
報に対応する輝度(PWM)信号を一斉に付与す
ると共に、垂直ドライバ回路VD2出力によつて各
走査電極に第3図ロの如きスキヤンパルスを同期
的に印加し、相隣る行の各奇数、偶数番目の
LED群を対として、発光ラインを順次上方から
下方にシフトして行く構成を採るものである。 In the device of the present invention, basically, of the LED groups in adjacent rows, the odd-numbered LED groups in one row and the even-numbered LED groups in the other row are turned on simultaneously in 1H units. If this relationship is shown in the order in which the scan pulses are applied, it will be as shown in Figure 3A, and each scan electrode A,
The scan pulses applied to B, C, . . . are expressed on the time axis as shown in FIG. 3B. In other words, each column is connected line by line via the horizontal driver circuit HD .
A brightness (PWM) signal corresponding to the light emission information of the LED group constituting the line (one of two adjacent lines) is applied to the LED group all at once, and the output of the vertical driver circuit V D2 is applied to the LED group. Then, scan pulses as shown in FIG. 3B are applied to each scan electrode synchronously,
This configuration employs a configuration in which the LED groups are arranged in pairs and the light emitting lines are sequentially shifted from the top to the bottom.
前記水平ドライバ回路HDを駆動するPWN信号
は、標準(TV)映像信号を1ライン当りの発光
絵素数で決まる基準クロツクパルス発生回路SC
の出力でサンプリングし且つAD変換するAD変換
回路ADと、該出力を前記マトリツクスパネルの
一ライン分記憶する一ラインメモリLM及びPWM
変調回路PWMの組み合せ回路で作成される。前記
AD変換回路ADは、図示の如くコンパレータCOM
と、サンプリングホールド回路SPH及び例えば4
ビツトのエンコーダEDで構成されるが基本的に
は周知であるので、説明を割愛する。個々の信号
電極に接続される前記PWM変調回路PWMは、一
ラインメモリLMの対応出力でプリセツトされ、
PWM変調用クロツクパルス発生回路PCPの出力
をカウントするダウンカウンタ(図示せず)と、
垂直走査パルスに同期するプリセツトパルスP1で
セツトされ、前記ダウンコンバータの出力でリセ
ツトされるフリツプフロツプ回路(図示せず)で
構成されて対応する信号電極にPWM信号を供給
する。 The PWN signal that drives the horizontal driver circuit H D is a standard (TV) video signal determined by the number of light emitting pixels per line, which is determined by the reference clock pulse generation circuit S C
an AD conversion circuit A D that samples and AD converts the output of the AD converter A D , and one line memory LM and PWM that stores the output for one line of the matrix panel.
It is created by a combination circuit of modulation circuit PWM . Said
The AD conversion circuit A D is a comparator C OM as shown in the figure.
, sampling hold circuit SPH and e.g.
It consists of a bit encoder E D , but since it is basically well known, a detailed explanation will be omitted. The PWM modulation circuit PWM connected to each signal electrode is preset with the corresponding output of a one-line memory LM ,
A down counter (not shown) that counts the output of the PWM modulation clock pulse generation circuit PCP ;
It is composed of a flip-flop circuit (not shown) which is set by a preset pulse P1 synchronized with the vertical scanning pulse and reset by the output of the down converter, and supplies a PWM signal to the corresponding signal electrode.
前記クロツクパルス発生回路PCMは、サンプ
リングした原信号の階調に応じてA−D変換され
る際の階調数に応じてその周波数を変え、例えば
0乃至7までは1=551KHz、8乃至15までは
157KHzと設定することによつて、入力信号対
PWM信号巾のγ補正曲線に近似して非直線的な
PWM変調をかけて総合的な光入力対光出力特性
の直線性を確保している。 The clock pulse generation circuit PCM changes its frequency according to the number of gradations during A-D conversion according to the gradation of the sampled original signal. For example, from 0 to 7 is 1 = 551 KHz, and from 8 to 15 teeth
By setting it to 157KHz, the input signal pair
Approximating the γ correction curve of the PWM signal width, it is non-linear.
PWM modulation is applied to ensure the linearity of the overall optical input versus optical output characteristics.
又、前記垂直走査ドライバ回路VDは、スキヤ
ンパルス発生回路SGから、第3図ロに表わす如
き走査パルスを得て、各走査電極を付勢する。第
3図ロの如きパルスを原複合映像信号中の水平同
期信号から論理的に作成することは当業者に自明
のことであると考えられるので、その説明を割愛
する。 Further, the vertical scanning driver circuit V D receives a scanning pulse as shown in FIG. 3B from the scanning pulse generating circuit S G to energize each scanning electrode. It is considered obvious to those skilled in the art that the pulses shown in FIG. 3B can be logically created from the horizontal synchronizing signal in the original composite video signal, so a description thereof will be omitted.
第3図ロにおいて、奇数番目の走査電極A,
C,E,G,I,K…には、走査期間を2Hとす
るパルスがシフトされた形で印加され、その際、
これらの走査電極に接続されたLEDには、対応
する信号電極SG 2k−1から毎Hの情報の奇数番
目のサンプリング情報に対応するPWM出力が、
入力され、一方偶数番目の走査電極B,D,F,
H…には、毎Hの情報のうち、偶数番目のサンプ
リング情報に対応するPWM出力が入力される。 In FIG. 3B, odd-numbered scanning electrodes A,
A pulse with a scanning period of 2H is applied to C, E, G, I, K... in a shifted form, and at that time,
The LEDs connected to these scanning electrodes receive a PWM output corresponding to the odd-numbered sampling information of every H's information from the corresponding signal electrode SG 2k-1.
On the other hand, even-numbered scan electrodes B, D, F,
PWM output corresponding to even-numbered sampling information among the information for each H is input to H....
上述の如く、本発明に依れば、相隣る行の
LEDのうち、一方の行の奇数番目のLEDと他方
の行の偶数番目のLED若しくはその逆の組み合
せを一対として、順次対応する信号電極に印加さ
れるPWM信号に応じた光量で、ライン毎に発光
素示せしめ、例えば水平走査数の半分の行数で表
示する場合であつても、従来例の如く2水平走査
毎にサンプリングした1水平走査期間のビデオ信
号を2水平走査期間中に表示するのでなく、1水
平走査線毎にサンプリングしたビデオ信号を相隣
る行の一方の行の奇数番目のLEDと他方の行の
偶数番目のLED若しくはその逆の組み合せによ
つて順次表示する構成であるからLEDの数を増
加させることなく見掛上の解像度を向上すること
が出来る。また、一水平走査期間に相隣る行の2
つの走査電極に同時に駆動電流を供給するので、
ピーク駆動電流を半分に抑えることが可能とな
る。 As described above, according to the present invention, the
Among the LEDs, odd-numbered LEDs in one row and even-numbered LEDs in the other row, or vice versa, are paired as a pair, and the amount of light is sequentially applied to the corresponding signal electrode for each line. Even when displaying light-emitting elements, for example, with half the number of lines as the number of horizontal scans, the video signal of one horizontal scan period sampled every two horizontal scans is displayed during two horizontal scan periods as in the conventional example. Rather, the video signal sampled for each horizontal scanning line is sequentially displayed by the odd-numbered LEDs in one row and the even-numbered LEDs in the other row, or vice versa. The apparent resolution can be improved without increasing the number of LEDs. Also, two adjacent rows in one horizontal scanning period
Since driving current is supplied to two scanning electrodes at the same time,
It is possible to reduce the peak drive current by half.
図面はいずれも本発明のマトリツクス表示装置
に係り、第1図はマトリツクスパネルの要部拡大
正面図、第2図は駆動回路のブロツク図、第3図
は動作波形説明図である。
MP……マトリツクスパネル、L……LED、SG
……信号電極、A,B,C……一走査電極、
PWM……PWM回路、HD……水平ドライバ回
路、VD……垂直ドライバ回路。
The drawings all relate to the matrix display device of the present invention; FIG. 1 is an enlarged front view of the main part of the matrix panel, FIG. 2 is a block diagram of the drive circuit, and FIG. 3 is an explanatory diagram of operating waveforms. M P ...Matrix panel, L...LED, SG
...Signal electrode, A, B, C...One scanning electrode,
PWM...PWM circuit, HD ...horizontal driver circuit, VD ...vertical driver circuit.
Claims (1)
の各行(横列)のLEDのうち、奇数番目のLED
と偶数番目のLEDを、それぞれ独立した共通の
奇数、偶数走査電極に接続すると共に、各列(縦
列)毎のLEDを各々共通の信号電極に接続し、
第l行(但しlは正の整数)の奇数走査電極と第
l+1行の偶数走査電極、第l行の偶数走査電極
と第l+1行の奇数走査電極、第l+1行の奇数
走査電極と第l+2行の偶数走査電極、第l+1
行の偶数走査電極と第l+2行の奇数走査電極を
それぞれ組として、この順で一水平走査期間毎に
順次付勢し、各一水平走査期間に隣り相う行のう
ち一方の行の奇数番目のLEDと他方の行の偶数
番目のLED若しくは一方の行の偶数番目のLED
と他方の行の奇数番目のLEDが組合つて発光す
る様に構成したマトリツクスパネル表示装置。1 Odd-numbered LEDs among the LEDs in each row (horizontal column) of a matrix panel that uses LEDs as light-emitting pixels
and the even-numbered LEDs are connected to independent common odd-numbered and even-numbered scanning electrodes, and the LEDs of each column (column) are connected to a common signal electrode, respectively.
Odd scan electrodes on the lth row (where l is a positive integer) and even scan electrodes on the l+1th row, even scan electrodes on the lth row and odd scan electrodes on the l+1th row, and odd scan electrodes on the l+1th row and the l+2th row. Even scan electrode of row, l+1st
The even-numbered scanning electrodes of the rows and the odd-numbered scanning electrodes of the (l+2)th row are each set as a set, and in this order, they are sequentially energized every horizontal scanning period, and the odd-numbered scanning electrodes of one of the adjacent rows are energized in each horizontal scanning period. LED and even-numbered LED in the other row or even-numbered LED in one row
A matrix panel display device configured so that the odd-numbered LEDs in the other row combine to emit light.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10160778A JPS5528070A (en) | 1978-08-18 | 1978-08-18 | Matrix panel display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10160778A JPS5528070A (en) | 1978-08-18 | 1978-08-18 | Matrix panel display |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5528070A JPS5528070A (en) | 1980-02-28 |
| JPS6252312B2 true JPS6252312B2 (en) | 1987-11-04 |
Family
ID=14305071
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10160778A Granted JPS5528070A (en) | 1978-08-18 | 1978-08-18 | Matrix panel display |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5528070A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55109351A (en) * | 1979-02-16 | 1980-08-22 | Ise Electronics Corp | Fluorescent display tube and driving method thereof |
-
1978
- 1978-08-18 JP JP10160778A patent/JPS5528070A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5528070A (en) | 1980-02-28 |
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