JPS6253958B2 - - Google Patents
Info
- Publication number
- JPS6253958B2 JPS6253958B2 JP57147358A JP14735882A JPS6253958B2 JP S6253958 B2 JPS6253958 B2 JP S6253958B2 JP 57147358 A JP57147358 A JP 57147358A JP 14735882 A JP14735882 A JP 14735882A JP S6253958 B2 JPS6253958 B2 JP S6253958B2
- Authority
- JP
- Japan
- Prior art keywords
- optical semiconductor
- electrode layer
- pinhole
- layer
- semiconductor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Photovoltaic Devices (AREA)
Description
【発明の詳細な説明】
(イ) 技術分野
本発明は光照射により光電効果が生じる薄膜状
光半導体層を備えた光半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field The present invention relates to an optical semiconductor device including a thin optical semiconductor layer that produces a photoelectric effect upon irradiation with light.
(ロ) 背景技術
光照射により光起電力が発生する現象や電気伝
導度が低下する現象、所謂光電効果を利用した光
半導体装置が存在する。従来この種光半導体装置
は単結晶材料から形成されていたが、近年新材料
としてアモルフアス半導体等が製造が容易でコス
ト的に有利な点から脚光を浴び盛んに研究が行な
われている。(B) Background Art There are optical semiconductor devices that utilize the so-called photoelectric effect, which is a phenomenon in which photovoltaic force is generated or electrical conductivity is reduced by light irradiation. Conventionally, this type of optical semiconductor device has been formed from a single crystal material, but in recent years, new materials such as amorphous semiconductors have been attracting attention because they are easy to manufacture and are advantageous in terms of cost, and are being actively researched.
本発明者等もPIN接合型アモルフアスシリコン
から成る太陽電池並びにフオトセンサ等を開発す
るに及んでいる。 The present inventors have also developed solar cells and photo sensors made of PIN junction type amorphous silicon.
第1図は上記PIN接合型アモルフアスシリコン
太陽電池の基本構造を示し、1はガラス.耐熱プ
ラスチツク等の厚み1〜3mm程度の透光性基板、
2は該基板1の一主面に形成された酸化スズ
(Sno2)、酸化インジウム(In2O3)、酸化インジウ
ム.スズ(In2O3―Sno2)等の厚み2000〜5000Å程
度の透光性電極層、3は例えばシラン(SiH4)等
のシリコン化合物雰囲気中に適当な不純物を添加
しプラズマ反応を生起せしめて形成された厚み
5000〜7000Å程度のPIN接合型アモルフアスシリ
コンから成る光半導体層、4は該光半導体層3上
にアルミニウム(Al)等の金属を蒸着せしめた
厚み2000〜10000Å程度の裏面電極層で、斯る透
光性基板1の他方の主面から光が照射せしめられ
ると主にI層に於いて電子及びホール対が発生し
これ等が透光性電極層2並びに裏面電極層4に移
動して光起電力を生ぜしめる。 Figure 1 shows the basic structure of the above-mentioned PIN junction type amorphous silicon solar cell, where 1 is a glass plate. A transparent substrate made of heat-resistant plastic or the like with a thickness of about 1 to 3 mm,
2, tin oxide (Sno 2 ), indium oxide (In 2 O 3 ), indium oxide. A transparent electrode layer with a thickness of about 2000 to 5000 Å made of tin (In 2 O 3 -Sno 2 ), etc.; 3 is a silicon compound such as silane (SiH 4 ); appropriate impurities are added to the atmosphere to cause a plasma reaction; thickness formed by
An optical semiconductor layer made of PIN junction type amorphous silicon with a thickness of about 5000 to 7000 Å, and 4 a back electrode layer with a thickness of about 2000 to 10000 Å, which is made by vapor-depositing a metal such as aluminum (Al) on the optical semiconductor layer 3; When light is irradiated from the other main surface of the transparent substrate 1, electrons and hole pairs are generated mainly in the I layer, and these move to the transparent electrode layer 2 and the back electrode layer 4 to emit light. Generates electromotive force.
然し乍ら、アモルフアスシリコン等のアモルフ
アス半導体は上述の如くプラズマ反応等により形
成されその膜厚も通常5000Å〜1μm程度(場合
によつては数μm)の嵩々ミクロンオーダまでの
薄膜状を成すために、特にその製造過程に於いて
基板1及び透光性電極層2の表面の状態や塵埃の
付着などにより、透光性電極層2上にアモルフア
ス半導体材の被着しない部分が発生し、斯るアモ
ルフアス半導体材から成る光半導体層3を貫通し
てピンホール5が形成されることがある。そし
て、ピンホール5を有する光半導体層3上に上述
の如く裏面電極層4を形成すると、ピンホール5
を裏面電極材が貫通し、透光性電極層2と裏面電
極層4とが上記裏面電極材により電気的に短絡状
態となる欠点を有していた。 However, as mentioned above, amorphous semiconductors such as amorphous silicon are formed by plasma reactions, etc., and the film thickness is usually about 5000 Å to 1 μm (in some cases, several μm), so it is a thin film on the order of microns. In particular, during the manufacturing process, there may be areas on the transparent electrode layer 2 where the amorphous semiconductor material is not adhered due to the surface conditions of the substrate 1 and the transparent electrode layer 2, adhesion of dust, etc. A pinhole 5 may be formed penetrating the optical semiconductor layer 3 made of an amorphous semiconductor material. Then, when the back electrode layer 4 is formed as described above on the optical semiconductor layer 3 having the pinholes 5, the pinholes 5
The back electrode material penetrates through the back electrode material, and the light-transmitting electrode layer 2 and the back electrode layer 4 are electrically short-circuited by the back electrode material.
(ハ) 発明の開示
本発明は斯る光半導体層を挾持する透光性電極
層と裏面電極層との短絡事故を回避すべくなされ
たものであつて、光半導体層形成後に被着される
電極層にもピンホールを穿ち、該電極層のピンホ
ールと上記光半導体層のピンホールとを連通さ
せ、該ピンホール内を電気的に絶縁状態とした光
半導体装置を提供するものである。次項に本発明
を上記従来例の如くPIN接合型アモルフアスシリ
コン太陽電池に適用した実施例につき詳述する
が、本発明はこの実施例とは異なり半導体接合を
有さず光照射により電気伝導度が低下するもので
あつても良く、光半導体層もアモルフアスシリコ
ンに限定されるものでないことは言うに及ばな
い。(C) Disclosure of the Invention The present invention has been made in order to avoid short-circuit accidents between the light-transmitting electrode layer that sandwiches the optical semiconductor layer and the back electrode layer, which is applied after the optical semiconductor layer is formed. The present invention provides an optical semiconductor device in which pinholes are also formed in the electrode layer, the pinholes in the electrode layer communicate with the pinholes in the optical semiconductor layer, and the pinholes are electrically insulated. In the next section, an embodiment in which the present invention is applied to a PIN junction type amorphous silicon solar cell as in the conventional example described above will be described in detail. Needless to say, the optical semiconductor layer is not limited to amorphous silicon.
(ニ) 発明を実施するための最良の形態
第2図は本発明の一実施例を示す断面図であつ
て、第1図と同じものには同番号が付してあり、
1は透光性基板、2は透光性電極層、3は薄膜状
の光半導体層、4は裏面電極層、5は上記薄膜上
の光半導体層3形成時に該光半導体層3を貫通し
て生じたピンホールで、異なるところは上記光半
導体層3形成後に被着される電極層である裏面電
極層4にもピンホール6を穿ち、このピンホール
5,6同士を連通せしめ、該ピンホール5,6内
を電気的に絶縁状態としたところにある。(d) Best Mode for Carrying Out the Invention FIG. 2 is a sectional view showing an embodiment of the present invention, and the same parts as in FIG. 1 are given the same numbers.
1 is a transparent substrate, 2 is a transparent electrode layer, 3 is a thin film-like optical semiconductor layer, 4 is a back electrode layer, and 5 is a layer that penetrates the optical semiconductor layer 3 when forming the optical semiconductor layer 3 on the thin film. The difference is that a pinhole 6 is also made in the back electrode layer 4, which is an electrode layer deposited after the formation of the optical semiconductor layer 3, and the pinholes 5 and 6 are made to communicate with each other. The holes 5 and 6 are electrically insulated.
斯る裏面電極層4のピンホール6の形成方法に
ついて以下に説明を加える。 A method for forming the pinholes 6 in the back electrode layer 4 will be explained below.
先ず、上述の如くシリコン化合物雰囲気中での
プラズマ反応によりアモルフアスシリコンから成
る厚み約ミクロンオーダ以下の薄膜状光半導体層
3を、透光性基板1の一主面に配置された透光性
電極層2上に被着し、Al等の金属を蒸着して裏
面電極層4を積層する。この時点で光半導体層3
にピンホール5が形成されていると、次工程の裏
面電極層4の蒸着工程に於いて、裏面電極材が上
記ピンホール5を貫通して裏面電極層4と透光性
電極層2は電気的に短絡状態となる。一方ピンホ
ール5のないものについては正常に動作する光半
導体装置が形成される。 First, as described above, by plasma reaction in a silicon compound atmosphere, a thin optical semiconductor layer 3 made of amorphous silicon and having a thickness of approximately micron order or less is formed on a transparent electrode disposed on one main surface of a transparent substrate 1. A back electrode layer 4 is laminated by depositing on layer 2 and depositing a metal such as Al. At this point, the optical semiconductor layer 3
If a pinhole 5 is formed in the back electrode layer 4, the back electrode material penetrates through the pinhole 5 in the next step of vapor deposition of the back electrode layer 4, and the back electrode layer 4 and the transparent electrode layer 2 are electrically connected. It becomes a short circuit condition. On the other hand, optical semiconductor devices without pinholes 5 are formed that operate normally.
次いで良品から上記短絡による不良品を選別
し、第3図の如くビーム光7を透光性基板1の他
方の主面から照射し乍ら、斯るビーム光7を平面
走査する。このビーム光7の平面走査時光半導体
装置の短絡電流を測定すると、短絡状態にあるピ
ンホール5の箇所に上記ビーム光7が照射されて
も上記短絡電流は流れず、ピンホール5から隔た
れた箇所に於いては光半導体層3に生起せしめら
れた電子及びホール対の移動により短絡電流が流
れる。従つて、ビーム光7を平面走査し短絡電流
を測定することによつて上記ピンホール5の箇所
を知ることができる。 Next, defective products due to the short circuit are sorted out from non-defective products, and as shown in FIG. 3, the light beam 7 is irradiated from the other main surface of the transparent substrate 1 while scanning the plane with the light beam 7. When the short-circuit current of the optical semiconductor device is measured during plane scanning with this beam light 7, it is found that even if the beam light 7 is irradiated to the short-circuited pinhole 5, the short-circuit current does not flow, and the short-circuit current does not flow at a point separated from the pinhole 5. In this case, a short circuit current flows due to the movement of electron and hole pairs generated in the optical semiconductor layer 3. Therefore, the location of the pinhole 5 can be determined by scanning the plane of the beam 7 and measuring the short circuit current.
最後にピンホール5の箇所を裏面電極層4側か
ら矢印8の如くピーク出力5×106W/cm2のYAG
パルスレーザの出力ビームを輻射し、裏面電極層
4並びにピンホール5、内に侵入した裏面電極材
を消散除去する。即ち、第2図に示した如く薄膜
状光半導体層3の形成時に光半導体層3を貫通し
て生じたピンホール5と同軸的に該光半導体層3
形成後に被着された裏面電極層4にピンホール6
を穿ち、両ピンホール5,6を連通させ、該ピン
ホール5,6内を電気的に絶縁状態とする。その
際レーザビーム8は透光性電極層2に到達し該透
光性電極層2を消散せしめても装置の特性には何
ら悪影響を及ぼすことはなく、また透光性基板1
は充分肉厚なために貫通することはない。 Finally, connect the pinhole 5 with a YAG with a peak output of 5×10 6 W/cm 2 from the back electrode layer 4 side as shown by arrow 8.
The output beam of the pulsed laser is radiated to dissipate and remove the back electrode material that has entered the back electrode layer 4 and the pinhole 5. That is, as shown in FIG. 2, the optical semiconductor layer 3 is coaxial with the pinhole 5 that is formed by penetrating the optical semiconductor layer 3 during the formation of the thin film optical semiconductor layer 3.
A pinhole 6 is formed in the back electrode layer 4 deposited after formation.
The pinholes 5 and 6 are made to communicate with each other, and the insides of the pinholes 5 and 6 are electrically insulated. At this time, even if the laser beam 8 reaches the transparent electrode layer 2 and dissipates the transparent electrode layer 2, it will not have any adverse effect on the characteristics of the device, and the transparent substrate 1
is thick enough that it will not penetrate.
そして好ましくはピンホール5,6を形成後裏
面電極層4の表面を絶縁性樹脂等のパツシベーシ
ヨン膜で被覆し、斯パツシベーシヨン材を上記ピ
ンホール5,6内に充填せしめるのが望ましい。 Preferably, after forming the pinholes 5 and 6, the surface of the back electrode layer 4 is coated with a passivation film such as an insulating resin, and the pinholes 5 and 6 are filled with the passivation material.
尚上記実施例に於ける基板1はガラス.耐熱プ
ラスチツク等の透光性材料からなる場合について
説明したが、ステンレス等の金属材料から形成さ
れる際は該金属材料が裏面電極層4を構成し、光
半導体層3形成後に透光性電極層2が被着され、
斯る透光性電極層2に光半導体層3のピンホール
5と連通するピンホール6が穿たれる。また電極
層にピンホール6を穿つ手段も上述の如くレーザ
ビームに限らず電子ビーム、分子線ビーム等のエ
ネルギビームであつても良い。更に、ビーム光7
の走査と連動して上記エネルギビームの輻射位置
を走査し、短絡電流を入力として斯る短絡電流の
激減により上記エネルギビームの輻射をトリガす
る構成としても良い。 Note that the substrate 1 in the above embodiment is made of glass. The case where the back electrode layer 4 is made of a transparent material such as heat-resistant plastic has been described, but when it is made of a metal material such as stainless steel, the metal material constitutes the back electrode layer 4, and the transparent electrode layer is formed after the optical semiconductor layer 3 is formed. 2 is applied,
A pinhole 6 communicating with the pinhole 5 of the optical semiconductor layer 3 is bored in the transparent electrode layer 2 . Further, the means for making the pinhole 6 in the electrode layer is not limited to the laser beam as described above, but may also be an energy beam such as an electron beam or a molecular beam. Furthermore, beam light 7
The radiation position of the energy beam may be scanned in conjunction with the scanning of the energy beam, and the radiation of the energy beam may be triggered by a sharp decrease in the short-circuit current by inputting the short-circuit current.
(ホ) 効果
本発明は以上の説明から明らかな如く、光半導
体層形成後に被着される電極層に、上記光半導体
層の形成時に貫通して生じたピンホールと同軸的
にピンホールを穿ち、両ピンホールを連通せしめ
両ピンホール内を電気的に絶縁状態となしたの
で、上記光半導体層のピンホール内への上記電極
材の侵入を除去し、透光性電極層と裏面電極層と
の短絡事故を回避することができる。従つて、今
まで短絡事故により不良品とされていたものを簡
単な構成で良品扱いとすることができ、製造時の
歩留りの向上が図れ、薄膜状光半導体層を用いた
ことによるコストダウンと相俟つてより一層の低
廉化が可能となる。(E) Effect As is clear from the above description, the present invention provides a method in which a pinhole is formed in the electrode layer that is deposited after the formation of the optical semiconductor layer, coaxially with the pinhole that was formed through the formation of the optical semiconductor layer. Since both pinholes are connected and the insides of both pinholes are electrically insulated, the penetration of the electrode material into the pinhole of the optical semiconductor layer is eliminated, and the transparent electrode layer and the back electrode layer are Short circuit accidents can be avoided. Therefore, with a simple configuration, products that were previously considered defective due to short-circuit accidents can be treated as good products, improving yields during manufacturing, and reducing costs by using a thin optical semiconductor layer. Together, it becomes possible to further reduce the cost.
第1図は従来例を示し、同図Aは正面図、同図
BはAに於けるA―A′線断面図、第2図は本発
明の一実施例を示す断面図、第3図はその製造工
程の要部を模式的に示す断面図である。
1…透光性基板、2…透光性電極層、3…薄膜
状光半導体層、4…裏面電極層、5,6…ピンホ
ール。
FIG. 1 shows a conventional example, FIG. FIG. 2 is a cross-sectional view schematically showing a main part of the manufacturing process. DESCRIPTION OF SYMBOLS 1... Transparent substrate, 2... Transparent electrode layer, 3... Thin film optical semiconductor layer, 4... Back electrode layer, 5, 6... Pinhole.
Claims (1)
体層、該光半導体層の光入射面に設けられた透光
性電極層、該透光性電極層と共に上記光半導体層
を挾持する裏面電極層、とから成り、上記薄膜状
光半導体層の形成時に該光半導体層を貫通して生
じたピンホールと同軸的に、該光半導体層形成後
に被着される上記何れか一方の電極層にピンホー
ルを穿ち、上記光半導体層のピンホールと一方の
電極層のピンホールを連通させ、該ピンホール内
を電気的に絶縁状態としたことを特徴とする光半
導体装置。1. A thin-film photosemiconductor layer that produces a photoelectric effect when irradiated with light, a transparent electrode layer provided on the light incident surface of the photosemiconductor layer, a back electrode layer that sandwiches the photosemiconductor layer together with the transparent electrode layer, A pinhole is formed in one of the electrode layers to be deposited after the formation of the optical semiconductor layer, coaxially with the pinhole that is formed through the optical semiconductor layer during the formation of the thin optical semiconductor layer. An optical semiconductor device characterized in that a pinhole in the optical semiconductor layer is made to communicate with a pinhole in one of the electrode layers, and the inside of the pinhole is electrically insulated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57147358A JPS5935486A (en) | 1982-08-24 | 1982-08-24 | Photo semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57147358A JPS5935486A (en) | 1982-08-24 | 1982-08-24 | Photo semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5935486A JPS5935486A (en) | 1984-02-27 |
| JPS6253958B2 true JPS6253958B2 (en) | 1987-11-12 |
Family
ID=15428386
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57147358A Granted JPS5935486A (en) | 1982-08-24 | 1982-08-24 | Photo semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5935486A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5986270A (en) * | 1982-11-09 | 1984-05-18 | Semiconductor Energy Lab Co Ltd | Photoelectric conversion device |
| US20070227586A1 (en) * | 2006-03-31 | 2007-10-04 | Kla-Tencor Technologies Corporation | Detection and ablation of localized shunting defects in photovoltaics |
| US20110151591A1 (en) * | 2008-08-29 | 2011-06-23 | Ulvac, Inc. | Photovoltaic cell manufacturing method |
| KR102322144B1 (en) * | 2020-12-18 | 2021-11-05 | (주)솔라플렉스 | Fabricating method for display panel with solar cells combined |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5943102B2 (en) * | 1979-12-14 | 1984-10-19 | 富士電機株式会社 | solar cells |
-
1982
- 1982-08-24 JP JP57147358A patent/JPS5935486A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5935486A (en) | 1984-02-27 |
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