JPS6256664B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to the structure of semiconductor packages, particularly semiconductor packages used in integrated circuits (ICs).

In recent years, as electronic devices have become smaller and their electrical characteristics have been improved, such as faster switching, ICs have become more highly integrated and LSIs and ultra-LSIs have been developed. However, as the degree of integration increases in this way, semiconductor packages that house semiconductor integrated circuit chips (IC chips) become larger with an increased number of external terminals, and although the packages naturally have a multilayer structure, the internal The conductive layer patterns provided tend to become thinner and longer, and their inductance tends to increase.

On the other hand, highly integrated IC chips are equipped with a large number of elements, which increases power consumption. For example, in logic circuits, off-buffer circuits, etc., have abnormally large currents flowing during transients, and also have external capacitors. When the battery is turned on, the storage capacitor discharges and a large current flows. All of these transient currents are concentrated in the ground portion, and during this period the ground level fluctuates greatly, causing noise due to the thin and long conductive layer pattern. The noise generated in this manner has an adverse effect on the signal, and in extreme cases may cause malfunction. In addition, since the current supplied from the power supply unit also concentrates during on-off transitions, the power supply level fluctuates and similarly generated noise adversely affects the signal.

The purpose of the present invention is to reduce the influence of such noise as much as possible and stabilize the operation by providing a grounding conductor or a grounding conductor that surrounds the entire bottom and sides of the IC chip inside the semiconductor package. The present invention proposes a semiconductor package provided with both a conductor and a power supply conductor, which will be described in detail below with reference to the drawings.

Highly integrated IC chips such as LSIs are generally housed in highly reliable ceramic semiconductor packages (ceramic packages). Figure 1 is an external perspective view of one example, and Figure 2 is an example A cross-sectional view is shown. In the figure, 1 is an IC chip, 2 is a conductive wiring formed on the package, 3 is an external lead terminal, 4 is a bonding wire, and 5 is a conductor pattern to which the IC chip 1 is diced. Of the conductive wiring 2, 1
It is connected to one or two conductive wires, and is connected to an external ground terminal connected to the conductive wires. However, as shown in the figure, the conductive wiring 2 is formed long and thin inside the larger package, so it has a large self-inductance, and as mentioned above, due to the transient current, if the ground level fluctuates, the signal will be lost. The conductive wiring that is transmitted is affected by the noise. On the other hand, although the bonding wire 4 is also a thin wire, it is relatively short and is not easily affected.

However, as semiconductor packages become more highly integrated, it is inevitable that conductive wiring becomes thinner and longer, but it is necessary to minimize the influence of noise. FIG. 3 is a sectional view of one embodiment of the present invention, which has a semiconductor package structure in which an IC chip 1 is surrounded by a ground conductor 10. That is, the IC chip is surrounded by a conductive block, including the conventional conductive pattern that is attached to the bottom of the IC chip, and as many ground bonding wires as possible are routed at arbitrary positions on the exposed surface. The connection from the body 10 to the external lead-out terminal (see FIG. 4 below) is also formed widely in a layer different from the conductive wiring 2 for transmitting signals so as to have a low electrical resistance. FIG. 4 is an enlarged view of the cavity part that accommodates the IC chip 1 of the embodiment shown in FIG.
The grounding conductor 10 is made up of a bottom conductor 11, a side conductor 12, and an exposed conductor 13, and the exposed conductor 13 is bonded with a ground wire. be exposed. Connections to external lead-out terminals are made by forming a wide connection conductor 14 in a lower layer separate from the conductive wiring for transmitting signals. If this is done, the connection position to the external terminal will be slightly different (not shown), but this will not cause any problem in terms of the external appearance. Ceramic packages like this are made by applying a conductive/talizing layer to the required surfaces of an unfired ceramic sheet, or by connecting the upper and lower layers with via holes.
It has a multilayer structure in which a large number of unfired ceramic sheets are stacked and fired, and the ground conductor 10 having the structure described above can be easily formed.The side conductor 12 is formed by coating the side surface of the cavity with a conductive metallized layer. Although it is formed by applying an insulating paste thereon, the conductive metallized layer may be left exposed without applying the insulating paste.

The ceramic package with this structure is
Since the grounding conductor 10 is a block with a large area, fluctuations in the grounding level during transient times are absorbed and reduced, and even if the grounding conductor 10 in which the IC chip 1 is housed, such as inside the chip, is grounded. Even if the level changes, it is extremely unlikely to affect the conductive wiring of the package as noise. Therefore,
It is extremely effective in improving the reliability of semiconductor devices such as LSI.

Moreover, FIG. 5 shows the cavity part of another embodiment according to the present invention, in which a is a plan view and b is a plan view thereof.
The BB' cross-sectional view shows a structure in which, in addition to the ground conductor 10, a power supply conductor 15 is also formed in the same manner. The ground conductor 10 has the same structure as above, and the power conductor 15
It is also composed of a bottom conductor 16, a side conductor 17, an exposed conductor 18 to which wire bonding is performed, and a ground conductor 19. In addition, no conductor is formed in the intersection of the ground conductor 10 and the power supply conductor 15 so as not to contact them. The higher the degree of integration of an IC, the greater the amount of current it can supply; however, with this kind of package structure, even if the amount of current increases momentarily during a transient, the capacity of the power conductor 15 increases, so the power supply level (Voltage level) fluctuations are also small, and the noise is reduced. Furthermore, even if there is a change inside the power supply conductor 15, the effect on the conductive wiring of the semiconductor package is reduced. Therefore, the semiconductor package shown in FIG. 5 is of a structure that reduces noise from both ground and power sources.

As explained above, the present invention is of great help in improving reliability, and it can be said that the more highly integrated the IC chip is, the more its effects become more apparent. Incidentally, although the above explanation has been made with respect to a ceramic package, it is of course applicable to other structures as well.

[Brief explanation of the drawing]

FIG. 1 is a perspective view of the external appearance of a general semiconductor package, FIG. 2 is a sectional view thereof, FIG. 3 is a sectional view of a semiconductor package according to an embodiment of the present invention, and FIG. 4 a
5A and 5B are a plan view and a sectional view of the cavity portion thereof, and FIGS. 5A and 5B are a plan view and a sectional view of the cavity portion of another embodiment according to the present invention. In the figure, 1 is
IC chip, 2 is conductive wiring of semiconductor package,
3 is an external lead-out terminal, 4 is a bonding wire, 1
0 is a grounding conductor; 11, 12, 13, and 14 are bottom, side, exposed, and connecting conductors that constitute the grounding conductor 10; 15 is a power supply conductor; 16, 1
Reference numerals 7, 18, and 19 indicate the bottom, side, exposed, and connecting conductors that similarly constitute the power supply conductor 15.

Claims (1)

[Scope of Claims] 1. A semiconductor package, characterized in that a ground conductor is provided inside the package that houses a semiconductor integrated circuit chip, and surrounds the entire bottom and side surfaces of the integrated circuit chip. 2. The package according to claim 1, further comprising a power supply conductor that surrounds the entire bottom and side surfaces of the integrated circuit chip inside the package that houses the semiconductor integrated circuit chip. Semiconductor package.