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JPS6257227B2 - - Google Patents
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JPS6257227B2 - - Google Patents

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Publication number
JPS6257227B2
JPS6257227B2 JP6425681A JP6425681A JPS6257227B2 JP S6257227 B2 JPS6257227 B2 JP S6257227B2 JP 6425681 A JP6425681 A JP 6425681A JP 6425681 A JP6425681 A JP 6425681A JP S6257227 B2 JPS6257227 B2 JP S6257227B2
Authority
JP
Japan
Prior art keywords
circuit
pulse
signal
output
amplitude value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6425681A
Other languages
Japanese (ja)
Other versions
JPS57179669A (en
Inventor
Koichiro Myagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Anritsu Corp
Original Assignee
Anritsu Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Anritsu Corp filed Critical Anritsu Corp
Priority to JP6425681A priority Critical patent/JPS57179669A/en
Publication of JPS57179669A publication Critical patent/JPS57179669A/en
Publication of JPS6257227B2 publication Critical patent/JPS6257227B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/26Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
    • G01R27/2605Measuring capacitance

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Description

【発明の詳細な説明】 本発明は、被測定物の静電容量と装置内の抵抗
とによつて積分回路を構成し、この積分回路と装
置内にあらかじめ設けた比較用積分回路とに同一
矩形パルスを加え、得られた2つの積分波形の差
信号の最大値を検出し、差信号最大値の変化量に
よつて被測定物の静電容量変化を検出するように
した静電容量変化検出装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention configures an integrating circuit by the capacitance of the object to be measured and the resistance inside the device, and the integration circuit is identical to the comparison integrating circuit provided in advance in the device. A capacitance change method in which a rectangular pulse is applied, the maximum value of the difference signal between the two obtained integral waveforms is detected, and the capacitance change of the measured object is detected based on the amount of change in the maximum value of the difference signal. This invention relates to a detection device.

従来、静電容量変化の検出は概知抵抗と被測定
物とにより直列回路、または、ブリツジ回路を構
成し、静電容量のインピーダンス変化を検出する
方法、あるいは、発振回路内の帰還回路に被測定
物を設置し静電容量変化による発振周波数変化を
検出する方法などが行なわれてきた。これらの方
法は連続的な正弦波信号や発振波を用いた連続測
定動作を基本と為し、信号振幅および発振周波数
の安定度が測定精度に大きく影響するため、これ
らの安定化に高度な製作技術と複雑な回路を必要
とした。また、長期間に恒るゆるやかな静電容量
変化の検出においては、適当な時間間隔を設定し
た断続的測定で十分な場合が多く、前記連続測定
動作の検出回路を使用した場合には非測定時に大
半の電力が浪費され、これに伴い不用な発熱も生
ずる。これらの点は検出回路を小形集積化し、電
池等の有限微小電力源で動作させる事を考えた場
合には欠点となる。また、前記検出回路を断続的
に動作させることは、連続測定動作を安定に行う
ための回路を十分活用できないばかりか、断続測
定動作を行う新回路の増設と、過渡応答による出
力信号への影響を検討する必要が生じ、より一
層、高度な技術と複雑な回路構成が必要となる。
Conventionally, capacitance changes have been detected by configuring a series circuit or a bridge circuit with a known resistor and an object to be measured, and detecting changes in capacitance impedance, or by using a feedback circuit in an oscillation circuit. Methods have been used in which a measurement object is installed and changes in oscillation frequency due to changes in capacitance are detected. These methods are based on continuous measurement operations using continuous sine wave signals or oscillation waves, and the stability of the signal amplitude and oscillation frequency greatly affects measurement accuracy, so advanced manufacturing is required to stabilize them. It required technology and complex circuits. Furthermore, when detecting gradual changes in capacitance that persist over a long period of time, intermittent measurements set at appropriate time intervals are often sufficient; At times, most of the power is wasted, and unnecessary heat generation is also generated. These points become disadvantages when it is considered that the detection circuit is integrated into a small size and operated with a finite micro power source such as a battery. Furthermore, operating the detection circuit intermittently does not only make it impossible to fully utilize the circuitry required to stably perform continuous measurement operations, but also requires the addition of a new circuit for intermittent measurement operations, and the effects of transient response on the output signal. It becomes necessary to consider the following, and even more advanced technology and complicated circuit configurations are required.

本発明の目的は、上記欠点を除き、回路構成が
簡易で平均消費電力の小さい断続測定動作を行な
い、かつ、断続周期が任意可変できるようにした
静電容量変化検出装置を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a capacitance change detection device that has a simple circuit configuration, performs intermittent measurement operation with low average power consumption, and allows the intermittent cycle to be arbitrarily varied, eliminating the above-mentioned drawbacks. .

この目的のため本発明では、矩形パルス信号に
よる断続測定法を採用し、被測定物の静電容量変
化を時定数変化の形で検出し、電気信号を出力す
る静電容量検出回路を設け、また、静電容量の変
化量に最適な矩形パルス幅、繰返し周期を任意設
定できるパルス信号発生回路を設けた。さらにま
た、前記検出回路の出力信号最大値を非測定時に
保持し連続階段状の出力波形と為す、信号最大値
保持回路と、この回路を前記矩形パルス信号の周
期に同期させて動作させるためのリセツトパルス
回路を設けた。
For this purpose, the present invention adopts an intermittent measurement method using a rectangular pulse signal, and is equipped with a capacitance detection circuit that detects changes in capacitance of the object to be measured in the form of time constant changes, and outputs an electrical signal. In addition, a pulse signal generation circuit is provided that can arbitrarily set the rectangular pulse width and repetition period that are optimal for the amount of change in capacitance. Furthermore, the present invention further includes a signal maximum value holding circuit that holds the maximum output signal value of the detection circuit when not measuring and forms a continuous step-like output waveform; A reset pulse circuit is provided.

つぎに、この発明を図面により具体的に説明す
る。
Next, this invention will be specifically explained with reference to the drawings.

第1図は本発明の一実施例における構成図であ
る。また、第2図は第1図中a〜d点における電
圧波形を示したものである。発振周期とパルス幅
が任意可変できるパルス発振回路2で発生した矩
形パルスaは、可変抵抗/R3,R4によりそれぞ
れ所定の振幅に調整され、装置内に設置した比較
用積分回路4、および被測定物1と可変抵抗/
R2とで構成される積分回路に加えられる。前記
比較用積分回路4の時定数τsは同回路内の可変
抵抗/R1と可変静電容量/C1とにより,τs
R1C1で与えられる。また、被測定物の静電容量
をC0とすれば被測定物と可変抵抗R2とで構成さ
れる回路の時定数τは、τ=R2C0である。
これら、τs,τの時定数を持つ回路に、同時
に時間幅Tの矩形パルスaを加え、各々の出力信
号b,cの電圧差Vdを求めれば、 Vd=ε−t/τ−ε−t/τ(OtT)……
(1) となる。ただし、矩形パルスaの振幅値は1.0と
する。また、τs,τが共にTより十分小さけ
れば Vd=ε−t/τ−ε−t/τ (Tt)……(2) も成立する。上式(1),(2)による波形は第2図dに
示すような、パルス波形である。このパルス波d
の頂点mの振幅値Hm、発生時刻tmは次式で与え
られる。
FIG. 1 is a block diagram of an embodiment of the present invention. Further, FIG. 2 shows voltage waveforms at points a to d in FIG. 1. A rectangular pulse a generated by a pulse oscillation circuit 2 whose oscillation period and pulse width can be arbitrarily varied is adjusted to a predetermined amplitude by variable resistors /R 3 and R 4 , and then passed through a comparison integration circuit 4 installed in the device, and DUT 1 and variable resistance/
R 2 is added to the integrator circuit. The time constant τ s of the comparison integration circuit 4 is determined by the variable resistance /R 1 and variable capacitance /C 1 in the same circuit, so that τ s =
Given by R 1 C 1 . Furthermore, if the capacitance of the object to be measured is C 0 , then the time constant τ 0 of the circuit composed of the object to be measured and the variable resistor R 2 is τ 0 =R 2 C 0 .
If we simultaneously apply a rectangular pulse a of time width T to these circuits with time constants τ s and τ 0 and find the voltage difference Vd between the respective output signals b and c, Vd=ε−t/τ 0 − ε-t/ τs (OtT)...
(1) becomes. However, the amplitude value of the rectangular pulse a is 1.0. Further, if both τ s and τ 0 are sufficiently smaller than T, Vd=ε−t/τ s −ε−t/τ 0 (Tt) (2) also holds true. The waveform obtained by the above equations (1) and (2) is a pulse waveform as shown in FIG. 2d. This pulse wave d
The amplitude value Hm of the vertex m and the occurrence time tm are given by the following equation.

Hm=(ε−tm/τ−ε−tm/τ) ……(3) m=logτ/τ/(1/τ−1/τ)……(4) (3)式Hmの値と、時定数比(τ/τs)との関
係を第3図にグラフで示す。時定数比(τ/τ
s)は、R1,R2,C1が定数の場合、C0に比例する
数値であるから、第3図のグラフはC0の変化に
対するHmの変化量を示している。また第4図に
τsの値で正規化した(4)式tmとτの関係、すな
わち(tm/τs)と(τ/τs)との関係をグラ
フで示す。これらHm,tmによつて頂点の定まる
パルス波dは、前記第1図の実施例においては、
差動増幅器3の出力信号として得られる。
Hm=(ε-tm/ τ0 -ε-tm/ τs )...(3) m= logτs / τ0 /(1/ τ0-1 / τs )...(4) Equation (3) The relationship between the value of Hm and the time constant ratio (τ 0s ) is shown graphically in FIG. Time constant ratio (τ 0
s ) is a numerical value proportional to C 0 when R 1 , R 2 , and C 1 are constants, so the graph in FIG. 3 shows the amount of change in Hm with respect to the change in C 0 . Further, FIG. 4 shows a graph of the relationship between equation (4) tm normalized by the value of τ s and τ 0 , that is, the relationship between (tm/τ s ) and (τ 0s ). In the embodiment of FIG. 1, the pulse wave d whose apex is determined by these Hm and tm is as follows:
It is obtained as the output signal of the differential amplifier 3.

つぎに、パルス状の出力信号dを階段状の出力
信号に変換する回路について説明する。この信号
波形処理の目的は、前記差動増幅器3で得られた
出力信号dの最大振幅値Hmを保持し、本装置に
接続されて容量変化を表示する表示器や記録器の
応答時間が出力信号dのパルス幅に較べ非常に長
い場合でも、確にHmの値を示すことができるよ
うにすることである。このため前記差動増幅器3
で得られたパルス状出力信号dは最大信号振幅値
保持回路5に送られる。この最大信号振幅値保持
回路5は信号入力端子、リセツト端子および出力
端子を有し、まず、リセツト端子にリセツトパル
スを加えて出力端子の信号電圧を零にし、次に入
力信号を加えると入力信号の最大値に比例した出
力信号電圧を出力し続ける回路である。すなわ
ち、前記パルス状出力信号dを加えれば、その最
大振幅値Hmに比例した電圧信号を出力し続け
る。この出力信号はリセツトパルスを加えれば零
に戻り、回路は入力信号待ちの状態となる。本発
明では、該リセツトパルスをリセツトパルス回路
6により前記パルス発振回路2で発生させた矩形
パルスaの立上り部分を用いて作り出す。第5図
に前記矩形パルスaを繰返し発生させ、かつ、被
測定物の静電容量が変化した場合のリセツトパル
スe,最大信号振幅値保持回路出力のタイミン
グチヤートを示す。同図より、明らかなように矩
形パルスaの時間幅Tはパルス状出力信号dの発
生時刻Tmより大きく、また、リセツトパルス時
間幅Trは、前記Tmより小さくする必要がある。
本装置の検出動作時間はTmであり、この値は前
記第4図に示したようにτs,τの値で決ま
る。実用上のτs,τの値は前記矩形パルスa
の立上り時間より大きな任意時間に設定する。ま
た、前記出力信号の時間Tm1,Tm2における信
号値は測定値としての意味を持たないため、表示
の必要は無い。さらに、前記出力信号の振幅値
すなわちHmの値は前記第3図に示したように、
被測定物の静電容量変化に正比例しないため、変
化量直続の装置にするためには、前記第1図に示
した直線補整用増幅器7を用いるか、表示メータ
等の目盛を前記第3図の特性に合わせて作成す
る。
Next, a circuit for converting the pulsed output signal d into a stepped output signal will be described. The purpose of this signal waveform processing is to hold the maximum amplitude value Hm of the output signal d obtained by the differential amplifier 3, and output the response time of the display or recorder connected to this device to display capacitance changes. To be able to accurately indicate the value of Hm even when the pulse width of the signal d is much longer than the pulse width of the signal d. Therefore, the differential amplifier 3
The pulsed output signal d obtained is sent to the maximum signal amplitude value holding circuit 5. This maximum signal amplitude value holding circuit 5 has a signal input terminal, a reset terminal, and an output terminal.First, a reset pulse is applied to the reset terminal to make the signal voltage at the output terminal zero, and then when an input signal is applied, the input signal is This circuit continues to output an output signal voltage proportional to the maximum value of . That is, when the pulsed output signal d is added, a voltage signal proportional to the maximum amplitude value Hm continues to be output. This output signal returns to zero when a reset pulse is applied, and the circuit enters the state of waiting for an input signal. In the present invention, the reset pulse is generated by the reset pulse circuit 6 using the rising portion of the rectangular pulse a generated by the pulse oscillation circuit 2. FIG. 5 shows a timing chart of the reset pulse e and the output of the maximum signal amplitude value holding circuit when the rectangular pulse a is repeatedly generated and the capacitance of the object to be measured changes. As is clear from the figure, the time width T of the rectangular pulse a is larger than the generation time Tm of the pulsed output signal d, and the reset pulse time width Tr needs to be smaller than the Tm.
The detection operation time of this device is Tm, and this value is determined by the values of τ s and τ 0 as shown in FIG. 4 above. The practical values of τ s and τ 0 are the rectangular pulse a
Set to an arbitrary time greater than the rise time of . Further, since the signal values of the output signal at times Tm 1 and Tm 2 have no meaning as measured values, there is no need to display them. Furthermore, the amplitude value of the output signal, that is, the value of Hm, is as shown in FIG.
Since it is not directly proportional to the capacitance change of the object to be measured, in order to make the device directly connected to the capacitance change, use the linear compensation amplifier 7 shown in FIG. 1, or change the scale of the display meter etc. Create according to the characteristics of the diagram.

以上に述べたように、この発明による静電容量
変化検出装置は、従来装置に比べ簡単な回路構成
となり、パルス信号による断続測定のため平均消
費電力を小さくすることが可能であり、小形軽量
化が実現できる。また、矩形パルス信号の振幅安
定化は正弦波信号に比べ容易であり、さらに、矩
形パルス信号の立上り時間が一定であれば、パル
ス幅・繰返し周期の変動は測定値に影響しないた
め、本装置を構成する各回路の時定数変化を小さ
く抑えることにより測定精度の向上が期待でき
る。さらにまた、本発明の基本動作は被測定物を
含む回路の時定数変化を検出ることであるから、
回路を構成した場合時定数に関与する電気素子、
例えば抵抗、インダクタンス等の測定装置に改造
することも容易である。
As described above, the capacitance change detection device according to the present invention has a simpler circuit configuration than conventional devices, and because it performs intermittent measurement using pulse signals, it is possible to reduce the average power consumption, making it smaller and lighter. can be realized. In addition, stabilizing the amplitude of a rectangular pulse signal is easier than that of a sine wave signal, and if the rise time of a rectangular pulse signal is constant, fluctuations in pulse width and repetition period will not affect the measured value. By keeping changes in the time constants of each circuit constituting the circuit to a small value, measurement accuracy can be expected to improve. Furthermore, since the basic operation of the present invention is to detect a change in the time constant of a circuit including an object under test,
Electrical elements that are involved in the time constant when configuring a circuit,
For example, it is easy to modify it into a measuring device for resistance, inductance, etc.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例を示す図、第2図は測
定用矩形パルスaと、時定数回路通過後のパルス
波形b,cを示す図、第3図はパルス波dの最大
振幅値Hmと時定数比(τ/τs)の関係を示す
グラフ、第4図はパルス波dの最大振幅値発生時
刻tmと、τの関係をτsで正規化したグラフ、
第5図は装置内の各部の波形を示すタイミングチ
ヤートで、イは測定用矩形パルスa、ロは時定数
回路通過後のパルス波形b,c、ハは差動増幅器
出力信号d、ニはリセツトパルス信号e、ホは最
大信号振幅値保持回路出力信号、ヘは直線補整
用増幅器出力信号gを示す。 1は被測定物、2はパルス発振回路、3は差動
増幅器、4は比較用積分回路、5は最大信号振幅
値保持回路、6はリセツトパルス回路、7は直線
補整用増幅器を示す。R1,R2,R3,R4は可変抵
抗、C1は可変静電容量を示す。
Fig. 1 is a diagram showing an embodiment of the present invention, Fig. 2 is a diagram showing a measurement rectangular pulse a and pulse waveforms b and c after passing through a time constant circuit, and Fig. 3 is a diagram showing the maximum amplitude value of the pulse wave d. A graph showing the relationship between Hm and the time constant ratio (τ 0s ), FIG. 4 is a graph showing the relationship between the maximum amplitude value generation time tm of the pulse wave d and τ 0 normalized by τ s ,
Figure 5 is a timing chart showing the waveforms of various parts in the device, where A is the measurement rectangular pulse a, B is the pulse waveforms b and c after passing through the time constant circuit, C is the differential amplifier output signal d, and D is the reset signal. Pulse signal e, E shows the maximum signal amplitude value holding circuit output signal, and F shows the linear correction amplifier output signal g. Reference numeral 1 indicates an object to be measured, 2 a pulse oscillation circuit, 3 a differential amplifier, 4 an integration circuit for comparison, 5 a maximum signal amplitude value holding circuit, 6 a reset pulse circuit, and 7 a linear correction amplifier. R 1 , R 2 , R 3 , and R 4 represent variable resistances, and C 1 represents variable capacitance.

Claims (1)

【特許請求の範囲】[Claims] 1 測定用信号としてパルス信号を用いた静電容
量変化検出装置であつて、該パルス信号を発生す
るパルス発振回路2と;該発振回路よりのパルス
を受領して積分し比較用積分波形信号を出力する
比較用積分回路4と;該比較用積分回路の出力と
被測定物を含む積分回路よりの出力信号を受領し
その差信号を出力する差動増幅器3と;該差動増
幅器の出力信号を受領しその最大振幅値を保持し
て出力する最大信号振幅値保持回路5と;該パル
ス発振回路の出力パルスを受領しこのパルスに同
期させて該振幅値保持回路の動作をリセツトさせ
るリセツトパルス回路6より成ることを特徴とす
る静電容量変化検出装置。
1 A capacitance change detection device that uses a pulse signal as a measurement signal, comprising a pulse oscillation circuit 2 that generates the pulse signal; and a pulse oscillation circuit 2 that receives and integrates the pulse from the oscillation circuit to generate an integrated waveform signal for comparison. a comparison integrator circuit 4 that outputs; a differential amplifier 3 that receives the output of the comparison integrator circuit and an output signal from an integrator circuit including the object under test and outputs a difference signal; and an output signal of the differential amplifier. a maximum signal amplitude value holding circuit 5 that receives the signal, holds the maximum amplitude value, and outputs it; a reset pulse that receives the output pulse of the pulse oscillation circuit and resets the operation of the amplitude value holding circuit in synchronization with this pulse; A capacitance change detection device comprising a circuit 6.
JP6425681A 1981-04-30 1981-04-30 Detecting device for change in electrostatic capacitance Granted JPS57179669A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6425681A JPS57179669A (en) 1981-04-30 1981-04-30 Detecting device for change in electrostatic capacitance

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6425681A JPS57179669A (en) 1981-04-30 1981-04-30 Detecting device for change in electrostatic capacitance

Publications (2)

Publication Number Publication Date
JPS57179669A JPS57179669A (en) 1982-11-05
JPS6257227B2 true JPS6257227B2 (en) 1987-11-30

Family

ID=13252909

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6425681A Granted JPS57179669A (en) 1981-04-30 1981-04-30 Detecting device for change in electrostatic capacitance

Country Status (1)

Country Link
JP (1) JPS57179669A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014059176A (en) * 2012-09-14 2014-04-03 Casio Comput Co Ltd Moisture content determination device and program

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2588612B2 (en) * 1989-10-06 1997-03-05 株式会社イング Detection device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014059176A (en) * 2012-09-14 2014-04-03 Casio Comput Co Ltd Moisture content determination device and program

Also Published As

Publication number Publication date
JPS57179669A (en) 1982-11-05

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