JPS6259487B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a base current correction circuit used as an input section of an operational amplifier or a post-stage amplifier.

As is well known, the input impedance of an operational amplifier is a finite value, and therefore the input bias current is required to be as small as possible.

FIG. 1 shows the configuration of a conventional operational amplifier incorporating a base current correction circuit for reducing the input bias current.

In the figure, 1 and 2 are first and second NPN transistors whose emitters are connected to each other, and 3
is a third NPN transistor whose base is connected to one of the pair of input terminals T _{1 and} T ₂ , and whose emitter is connected to the base of the first transistor 1 . 4 is a fourth NPN transistor whose base is connected to the other input terminal _T2 , and whose emitter is connected to the base of the second transistor 2. Reference numerals 5 and 6 are a pair of PNP transistors whose bases are connected to each other to form a mirror circuit, and one transistor 5 is configured as a diode with its base and collector short-circuited.

Reference numeral 8 denotes a constant current source connected to the emitter of the first transistor 1. 9 is an NPN output transistor; 10 is a resistor connected to the emitter of the output transistor 9; a series circuit of this resistor 10 and the transistor 9 is connected in parallel to both ends of a power supply 11; transistor 9
The connection point with is connected to the output terminal T ₀ .

In this circuit, the emitter currents of transistors 3 and 4 are 1/h _FE of each transistor 1 and 2, and the input bias currents of input terminals T ₁ and T ₂ are 1/h FE of each emitter current of transistors 3 and 4, respectively.
h _FE becomes smaller. However, this conventional device has the disadvantage that the emitter currents of the transistors 3 and 4 are small, which deteriorates the overall frequency characteristics.

This invention was made in order to eliminate the drawbacks of the above-mentioned conventional ones, and it connects each collector of a multi-divided collector type lateral PNP transistor whose emitter is connected to a constant current source to each base of the first and second NPN transistors. It is an object of the present invention to provide a base current correction circuit that can suppress input bias current without causing deterioration of frequency characteristics by connecting them to each other.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 shows an example of a base current correction circuit according to the present invention.

In the figure, 21 is a first NPN transistor whose base is connected to the input terminal _T1 , 22 is a constant current source that generates a current I equal to the collector current I of the first NPN transistor 21, and 23 is the constant current a second NPN with a collector connected to source 22;
It is a transistor. 24 is a multi-divided collector type lateral PNP transistor, the emitter of which is connected to the constant current source 22 and the second NPN transistor 23.
is connected to the connection point with the collector. the above
The first collector 24a of the PNP transistor 24 is connected to the base of the first NPN transistor 21, and the second
The collector 24b of the second NPN transistor 2
Each is connected to the base of 3. Further, the base is biased to a potential that becomes an active region by a circuit not shown.

In the above configuration, if the first and second NPN transistors 21 and 23 are made of an integrated circuit structure, each emitter ground current amplification factor h
The alignment of _FE is very good. Therefore, the explanation will be given assuming that the current amplification factors h _FE of both transistors 21 and 23 are the same.

If the collector current of the first NPN transistor 21 is I, its base current is I/h _FE . The current I of the constant current source 22, which is set to the same current value as the collector current of the first NPN transistor 21, _is , almost becomes the collector current of the second NPN transistor 23. Therefore, the second NPN
The base current of the transistor 23 becomes I/h _FE , which becomes the collector current of one collector 24b of the multi-divided collector type lateral PNP transistor 24. Above lateral PNP transistor 24
If the size of each collector 24a, 24b is equal, the lateral PNP transistor 2 connected to the base of the first NPN transistor 21
The collector current flowing through the collector 24a of No. 4 is also I/
h _FE , and the first NPN transistor 21
Therefore, no current flows to the input terminal _T1 .

FIG. 3 shows an operational amplifier using the circuit shown in FIG. 2 as an input section.

In the figure, 25 is a third NPN transistor whose collector is connected to the emitter of the first NPN transistor 21.
NPN transistor 26 is a fourth transistor for providing a base potential to keep the lateral PNP transistor 24 in the active region; 27 is a fifth transistor whose emitter is connected to the first NPN transistor 21;
NPN transistor whose base is the input terminal T ₂
It is connected to the first collector 24 _a1 of the lateral PNP transistor 24. The area ratio between the first collector currents 24 _a1 and 24 _a2 and the second collector 24b in the lateral PNP transistor 24 is set to 1:3. Also, the second NPN transistor 23 and the third
The area ratio of each emitter of the NPN transistor 25 is set to 1:2.

28 and 29 are PNP transistors forming a mirror circuit, 30 is an NPN output transistor, 31 is a resistor, and 32 is a power supply.

In the operational amplifier with the above configuration, transistor 2
Since the emitter area ratio of 3 and 25 is 1:2,
With respect to the collector current I of the transistor 23, the collector current of the transistor 25 is 2I, and the sum of the base current of the transistor 23 and the base current of the transistor 25 is 3I/h _FE . On the other hand, the first collector 2 of the lateral PNP transistor 24
Since the area ratio of 4 _a1 , 24 _a2 and the second collector 24 b is 1:3, the collectors 24 _a1 , 24 _a2 connected to the respective bases of the transistors 21 and 27
The current flowing through is I/h _FE .

Under normal operating conditions of an operational amplifier, the input terminals
Since T ₁ and T ₂ are set to the same potential, the emitter currents of the transistors 21 and 27 are equal to I, so their base current is I/h _FE , which is equal to the collector current of the lateral PNP transistor 24. Therefore, no input current flows through the input terminals T ₁ and T ₂ .

FIG. 4 shows an example in which the present invention is applied to a downstream amplifier of a P-channel MOS type transistor input operational amplifier.

In the figure, 41 is a first NPN transistor, 42 is a constant current source, 43 is a second PNP transistor, and 44 is a multi-divided collector type lateral PNP transistor. The first collector 44a is connected to the base of the first NPN transistor 41, and the second collector 44b is connected to the base of the second NPN transistor 43.

45 is a MOS type NPN transistor whose gate is connected to one input terminal _T1 , 46 is a MOS type transistor whose gate is connected to the other input terminal _T2 , and 47 is the MOS type transistor 45, 46.
It is a constant current source. 48, 49 are NPN transistors forming a mirror circuit, 50 is a lateral PNP
A diode is connected to the base of the transistor 44 and biases the base potential to the active region. 51 is a constant current source connected to the collector of the first NPN transistor 41, and the connection point between both 51 and 41 is connected to the output terminal _T0. It's connected. 52 is a power source.

In this circuit, the first stage bias current I ₁ is
If the MOS transistors 45 and 46 are to be used with a relatively small voltage between their gates and sources, it is not possible to flow as much as the output current I ₂ .

In this circuit, NPN transistors 48, 49
In order to also correct the base current of , it is most suitable to set the current I flowing through the second NPN transistor 43 to I=I ₂ −I ₁ .

As described above, this invention allows current to flow through the first and second NPN transistors through the collector of the multi-divided collector type lateral PNP transistor, thereby reducing the input bias current while maintaining good frequency characteristics. A base current correction circuit that can be used can be provided.

[Brief explanation of the drawing]

FIG. 1 is an electric circuit diagram showing an operational amplifier incorporating a conventional base current correction circuit, FIG. 2 is an electric circuit diagram showing an example of the base current correction circuit according to the present invention, and FIGS. 3 and 4 are respectively FIG. 3 is an electrical circuit diagram showing a specific different application example of the present invention. 21, 41...first NPN transistor, 2
2, 42... constant current source, 23, 43... second
NPN transistor, 24, 44...Multi-divided collector type lateral PNP transistor, 24a, 24
_a1 , 24 _a2 , 44a...first collector, 24
b, 44b... second collector. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Claims] 1 The first NPN to which the input signal is applied to the base
a second NPN whose collector is connected to a constant current power supply that generates a current approximately equal to the collector current of the first NPN transistor;
The transistor has an emitter connected to the collector of the second NPN transistor, a first collector connected to the base of the first NPN transistor, and a second collector connected to the base of the second NPN transistor. A base current correction circuit comprising a multi-divided collector type lateral PNP transistor biased to a potential in the active range.