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JPS6259496B2 - - Google Patents
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JPS6259496B2 - - Google Patents

Info

Publication number
JPS6259496B2
JPS6259496B2 JP59056646A JP5664684A JPS6259496B2 JP S6259496 B2 JPS6259496 B2 JP S6259496B2 JP 59056646 A JP59056646 A JP 59056646A JP 5664684 A JP5664684 A JP 5664684A JP S6259496 B2 JPS6259496 B2 JP S6259496B2
Authority
JP
Japan
Prior art keywords
transistor
emitter
agc
circuit
pnp transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP59056646A
Other languages
Japanese (ja)
Other versions
JPS59188236A (en
Inventor
Shigeru Goto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59056646A priority Critical patent/JPS59188236A/en
Publication of JPS59188236A publication Critical patent/JPS59188236A/en
Publication of JPS6259496B2 publication Critical patent/JPS6259496B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices
    • H03G3/3052Automatic control in amplifiers having semiconductor devices in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G1/00Details of arrangements for controlling amplification
    • H03G1/0005Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0035Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements
    • H03G1/0082Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements using bipolar transistor-type devices

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Noise Elimination (AREA)
  • Circuits Of Receivers In General (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、車載用の電子式AM受信機(以下受
信機と云う)等のラジオ受信機に関するものであ
る。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a radio receiver such as a vehicle-mounted electronic AM receiver (hereinafter referred to as a receiver).

従来例の構成とその問題点 従来この種のラジオ受信機のフロントエンド部
は第1図に示す様な回路構成を採用している。す
なわち1は車のロツドアンテナであり、2は高周
波増幅段、3は局部発振回路、4は混合回路であ
り、混合回路4の出力端子5から中間信号が取り
出される。6は中間増幅回路からの自動利得制御
(以下AGCと云う。)信号であり、高周波増幅段
2の入力側と接地間にコンデンサ8を介してコレ
クタ,エミツタが接続されたAGC用トランジス
タを駆動するようになつている。
Conventional configuration and its problems Conventionally, the front end section of this type of radio receiver has adopted a circuit configuration as shown in FIG. That is, 1 is a rod antenna of a car, 2 is a high frequency amplification stage, 3 is a local oscillation circuit, and 4 is a mixing circuit. An intermediate signal is taken out from an output terminal 5 of the mixing circuit 4. 6 is an automatic gain control (hereinafter referred to as AGC) signal from the intermediate amplifier circuit, which drives an AGC transistor whose collector and emitter are connected via a capacitor 8 between the input side of the high-frequency amplifier stage 2 and ground. It's becoming like that.

このような従来の構成において、ロツドアンテ
ナ1に入つてくる到来電波のレベルに応じて中間
増幅回路からAGC信号がトランジスタ7に印加
され、そのトランジスタ7のコレクタ,エミツタ
間のインピーダンスを制御し、出力端子5の出力
を一定に保つように動作するものである。しかし
ながらここで問題となるのは、トランジスタ7が
動作しはじめるときである。即ちトランジスタが
動作しはじめるとき第2図に示すようにVBE−I
E特性の非直線部によつて高周波が発生し、これ
がスプリアス特性を悪化させる要因の一つとなつ
ていることである。
In such a conventional configuration, an AGC signal is applied from the intermediate amplifier circuit to the transistor 7 according to the level of the incoming radio wave entering the rod antenna 1, and the impedance between the collector and emitter of the transistor 7 is controlled, and the output terminal It operates to keep the output of 5 constant. However, the problem here is when the transistor 7 starts operating. That is, when the transistor starts operating, V BE -I as shown in Figure 2.
High frequencies are generated by the nonlinear portion of the E characteristic, and this is one of the factors that worsens spurious characteristics.

発明の目的 本発明は上記従来の欠点を解消するもので、大
入力時のスプリアス特性を改善することを目的と
する。
OBJECTS OF THE INVENTION The present invention solves the above-mentioned conventional drawbacks, and aims to improve spurious characteristics at the time of large input.

発明の構成 本発明はアンテナの入力レベルを自動利得制御
用トランジスタで制御するようにしたラジオ受信
機であつて、前記トランジスタをNPN型トラン
ジスタとPNP型トランジスタにより相互に動作開
始時の非直線動作を相殺するように構成したもの
である。
Composition of the Invention The present invention is a radio receiver in which the input level of an antenna is controlled by an automatic gain control transistor, in which the transistors are mutually controlled by an NPN type transistor and a PNP type transistor to control non-linear operation at the start of operation. It is constructed so that they cancel each other out.

実施例の説明 本発明の一実施例を第3図,第4図に示して説
明する。まず、第3図において上記第1図の従来
の構成と同一部分には同一番号が附してあり、本
発明はAGC用トランジスタ7としてNPN型トラ
ンジスタ7aとPNP型トランジスタ7bを用い、
高周波増幅段2の入力側と接地間にコンデンサ8
とトランジスタ7aのコレクタ,エミツタ,トラ
ンジスタ7bのエミツタ,コレクタの直列回路を
接続し、そしてトランジスタ7bのベースAGC
信号が印加されるようにするとともにトランジス
タ7aのベースを接地したものである。
DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described with reference to FIGS. 3 and 4. First, in FIG. 3, the same parts as in the conventional configuration shown in FIG.
Capacitor 8 between the input side of high frequency amplification stage 2 and ground
A series circuit of the collector and emitter of transistor 7a and the emitter and collector of transistor 7b is connected to the base AGC of transistor 7b.
A signal is applied thereto, and the base of the transistor 7a is grounded.

このように構成することにより、トランジスタ
7が動作しはじめる時のエミツタ電流は第4図の
BE−IE特性から明らかなようにそれぞれのト
ランジスタ7a,7bのVBE−IE特性の非直線
部を相殺するように流れるため、高調波歪が著し
く少なくなり、したがつてスプリアス特性が良好
となるものである。
With this configuration, the emitter current when the transistor 7 starts operating is determined by the non-linearity of the V BE -I E characteristics of each transistor 7a and 7b, as is clear from the V BE -I E characteristics in FIG. Since the current flows so as to cancel out the harmonic distortion, harmonic distortion is significantly reduced and spurious characteristics are improved.

発明の効果 本発明は上述のような簡単な構成により大入力
時のAGC回路に起因するスプリアス特性を改善
することができるもので、その効果は大なるもの
である。しかもAGC信号は一極性のものでよ
く、中間増幅回路からのAGC信号をそのまま利
用でき、他に回路付加の必要がなく構成も簡素化
できるものである。
Effects of the Invention The present invention can improve the spurious characteristics caused by the AGC circuit at the time of large input with the above-mentioned simple configuration, and its effects are significant. Moreover, the AGC signal may be unipolar, and the AGC signal from the intermediate amplifier circuit can be used as is, and there is no need to add any other circuits, and the configuration can be simplified.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例を示すブロツク回路図、第2図
は同トランジスタのVBE−IE特性図、第3図は
本発明の一実施例を示すブロツク回路図、第4図
は同トランジスタのVBE−IE特性図である。 1……ロツドアンテナ、2……高周波増幅段、
6……利得制御信号、7……トランジスタ、7a
……NPN型トランジスタ、7b……PNP型トラ
ンジスタ。
Fig. 1 is a block circuit diagram showing a conventional example, Fig. 2 is a V BE -I E characteristic diagram of the same transistor, Fig. 3 is a block circuit diagram showing an embodiment of the present invention, and Fig. 4 is a block circuit diagram of the same transistor. It is a VBE - IE characteristic diagram. 1... Rod antenna, 2... High frequency amplification stage,
6...gain control signal, 7...transistor, 7a
...NPN type transistor, 7b...PNP type transistor.

Claims (1)

【特許請求の範囲】[Claims] 1 アンテナの入力レベルを自動利得制御器で制
御するようにしたラジオ受信機であつて、前記自
動利得制御器はNPN型トランジスタのエミツタ
とPNP型トランジスタのエミツタを接続するとと
もにそのNPN型トランジスタのベースとPNP型
トランジスタのコレクタをそれぞれ接地し、かつ
前記PNP型トランジスタのベースに中間増幅回路
からの一極性の利得制御信号を印加するように構
成したラジオ受信機。
1. A radio receiver in which the input level of an antenna is controlled by an automatic gain controller, wherein the automatic gain controller connects the emitter of an NPN transistor and the emitter of a PNP transistor, and connects the base of the NPN transistor. and a PNP transistor whose collectors are grounded, and a unipolar gain control signal from an intermediate amplifier circuit is applied to the base of the PNP transistor.
JP59056646A 1984-03-23 1984-03-23 Radio receiver Granted JPS59188236A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59056646A JPS59188236A (en) 1984-03-23 1984-03-23 Radio receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59056646A JPS59188236A (en) 1984-03-23 1984-03-23 Radio receiver

Publications (2)

Publication Number Publication Date
JPS59188236A JPS59188236A (en) 1984-10-25
JPS6259496B2 true JPS6259496B2 (en) 1987-12-11

Family

ID=13033106

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59056646A Granted JPS59188236A (en) 1984-03-23 1984-03-23 Radio receiver

Country Status (1)

Country Link
JP (1) JPS59188236A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63175999U (en) * 1987-05-01 1988-11-15

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5227021B2 (en) * 1974-05-13 1977-07-18
JPS50146446U (en) * 1974-05-21 1975-12-04

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63175999U (en) * 1987-05-01 1988-11-15

Also Published As

Publication number Publication date
JPS59188236A (en) 1984-10-25

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