JPS6259949B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic ghost removal circuit aimed at improving the signal-to-noise ratio of residual ghost detection.

First, the automatic ghost removal circuit system on which the present invention is based will be explained using FIG.

FIG. 1 shows only the video detection section in a television receiver, which is the essence of the automatic ghost removal circuit system. For convenience of explanation, the ghost removal conditions in FIG. 1 will be explained first, and then the removal conditions, that is, the configuration and operation of the part that automatically sets the coefficients will be explained.

In FIG. 1, reference numeral 1 denotes an intermediate frequency amplification stage, which has normal characteristics. Reference numeral 2 denotes a carrier wave extraction circuit composed of a narrow band amplifier, which generates a carrier wave having a reference phase. The output signal from the intermediate frequency amplification stage 1 is a combination of a direct wave and a ghost wave, and if the phase difference between the carrier wave phase of the direct wave and the carrier wave phase of the composite wave is φ, the output signal of the carrier wave extraction circuit 2 is The signal is given by cos(ωt+φ).
3 is a π/2 phase delay circuit which delays the carrier signal cos (ωt+φ) from the carrier extraction circuit 2 by π/2 to generate a detection axis signal sin (ωt+φ). 4A,
4B is a first and second phase detection circuit, and the output signal from the carrier extraction circuit 2 is h ₁ =cos(ωt+φ),
Furthermore, the signals from the intermediate frequency amplification stage 1 are phase-detected using the output signal h ₂ =sin (ωt+φ) from the π/2 phase delay circuit 3 as a detection axis signal. 5 is a delay circuit whose delay time is set to be substantially equal to the delay time of the ghost wave.
6A and 6B are coefficient circuits, and 7 and 8 are first and second adder circuits, respectively. The first adder circuit 7 is configured to add the output of the coefficient circuit 6A and the output of the coefficient circuit 6B. Also, the second addition circuit 8
is configured to add the output of the first phase detection circuit 4A and the output of the delay circuit 5. As will be explained in detail below, a signal from which ghost components have been removed is obtained from the second adder circuit 8. Therefore, if the output signal from the second adder circuit 8 is used as a video detection output in a television receiver and then subjected to necessary signal processing and displayed on a cathode ray tube, a ghost-free image can be displayed.

The output of intermediate frequency amplification stage 1 is calculated as follows, where the frequency of the carrier wave in the intermediate frequency band is ω, the delay time of the ghost wave with respect to the direct wave is τ, and the amplitude ratio is G, excluding the carrier component Ccosωt+GCcos(ωt+α)...(1) It is expressed as: f(t)=a(t)cosωt−b(t)sinωt+Ga(t−τ)cos(ωt+α)−Gb(t−τ)sin(ωt+α) (2). Here, the first and second terms represent the in-phase and quadrature components of the direct wave, and the third and fourth terms represent the in-phase and quadrature components of the ghost wave, respectively. The second and fourth terms are incidental because the television signal is a residual sideband signal, and a(t) and b(t) are orthogonal. Also, α is the phase angle of the ghost wave with respect to the direct wave, ωc is the frequency of the carrier wave of the broadcast wave, and τ is the delay time of the ghost wave with respect to the direct wave, ωcτ = −α + 2nπ (n = 0, 1, 2, ...)
…(3) is given by. Intermediate frequency signal f shown by equation (2)
(t) is phase-detected by a phase detection circuit 4A that uses the output h ₁ of the carrier extraction circuit 2 as the detection axis signal, and the above f(t) uses the output h ₂ of the phase shift circuit 3 as the detection axis signal. When the phase detection circuit 4B performs phase detection, the outputs u ₁ from each phase detection circuit 4A, 4B,
u ₂ is u ₁ =a cosφ+b sinφ+Ga〓cos(φ −α)+Gb〓sin(φ−α) …(4) u ₂ =a sinφ−b cosφ+Ga〓sin(φ −α)−Gb〓cos(φ− α) …(5) is given. Here a(t) is a, a(t-
τ) is expressed as a〓.

The outputs u 1 and _{u 2 from} the first and second phase detection circuits 4A and 4B shown in equations (4) and (5) are combined in the first adder circuit 7 through coefficient circuits 6A and 6B, respectively. , is guided to a delay circuit having a delay time substantially equal to the delay time of the ghost wave. The second adder circuit 8 is configured to add the above _u1 and the output of the delay circuit 5. Therefore, the output signal x of the second adder circuit 8 is as follows, where the coefficients of the coefficient circuits 6A and 6B are k ₁ and k ₂ , respectively.

X=u ₁ +K ₁ u ₁ 〓+K ₂ u ₂ 〓=a cosφ+b sinφ +a〓{Gcos(φ−α)+k ₁ cosφ+k ₂ sinφ} +b〓{Gsin(φ−α)+k ₁ sinφ−k ₂ cosφ} +a ₂ 〓{k ₁ Gcos (φ-α) + k ₂ Gsin (φ-
α)} +b ₂ 〓{k ₁ Gsin(φ−α)−k ₂ Gcos(φ−
α)} ...(6) Here, if the coefficients k ₁ and k ₂ of the coefficient circuits 6A and 6B are set so that k ₁ = Gcosα ...(7) k ₂ = Gsinα ...(8), the above equation (6) In a〓,
The term b〓, that is, the third and fourth terms, becomes zero. The fifth and sixth terms have values of about ^G2 . G is normal
Since it is considered to be less than 1/3, this is a sufficiently small value. Further, the first term always has an amplitude about three times or more as compared to the second term, no matter how α changes due to the phase fluctuation of the ghost wave, so the orthogonal component of the direct wave can generally be ignored. Therefore, the first
In the video detection method shown in the figure, the in-phase component and quadrature component of the ghost wave can be removed, and the quadrature component of the direct wave can be made sufficiently smaller than the in-phase component.

As described above, the output signal from the intermediate frequency stage is phase-detected using a pair of detection axis signals whose detection phase is the carrier phase of the composite wave of the direct wave and the ghost wave, and the phase delayed by π/2. The coefficients k ₁ and k ₂ of the circuit are expressed by equation (7).
It was shown that ghost waves can be removed from all video signal frequency components by setting the value as shown in equation (8).

Next, the coefficients k ₁ and k ₂ of the coefficient circuits 6A and 6B are expressed by equation (7).
It will be explained that setting to the value shown in equation (8) is automatically performed.

In FIG. 1, reference numeral 9 denotes a burst signal extraction circuit, which extracts a direct wave burst signal from the output signal from the second addition circuit 8. 1
0 is a color subcarrier generation circuit which generates a continuous wave locked to the phase of the burst signal extracted by the burst signal extraction circuit 9. Reference numeral 11 denotes a second π/2 phase delay circuit which delays the output signal of the color subcarrier generation circuit 10 by π/2. 12A and 12B are third and fourth phase detection circuits, respectively, and color subcarrier generation circuit 1.
Using the output signals from each of the 0 and π/2 phase delay circuits 11 as detection axis signals, the output signal from the second adder circuit 8 is phase-detected. Reference numeral 15 denotes a sampling pulse generation circuit, which generates a sampling pulse at the position of a ghost burst signal. 1
Comparing circuits 3A and 13B determine whether the output signals of the third and fourth phase detection circuits 12A and 12B are positive or negative. 14A and 14B are coefficient value setting circuits, the outputs of which are connected to coefficient circuits 6A and 6B, respectively.

In television broadcasting, a burst signal is inserted at the trailing edge of the horizontal synchronization signal. There are some horizontal scanning lines that contain only a burst signal in addition to the horizontal synchronization signal during the vertical retrace period, so
By using these burst signals during horizontal scanning, only the ghost waves can be detected without being affected by the direct waves and ghost waves of the actual video signal.

Now, focusing on the burst signal, if the frequency of the burst signal is P _B and the in-phase component is expressed as cosp _B t, the orthogonal component is multiplied by sinp _B t, so the burst signal x of the output signal x from the second adder circuit 8 _B is as follows with reference to equation (6).

x _B = u ₁ + K ₁ u ₁ 〓 + K ₂ u ₂ 〓 = cos (p _B t-φ) + {Gcos (p _B t-p _B τ-φ+α) + k ₁ cos (p
_B t −p _B τ−φ)−k ₂ sin(p _B t−p _B τ−φ)} +{k ₁ Gcos(p _B t−2p _B τ−φ+α) −k ₂ Gsin(p _B t− 2p _B τ−φ+α)} (9) The burst signal extraction circuit 9 extracts the first term of the output signal from the second addition circuit 8 shown in equation (9) above. The color subcarrier generation circuit 10 outputs a continuous wave having a phase of cos(p _B t-φ) shown by the first term of the above equation (9) in response to the signal from the burst signal extraction circuit 9. Color subcarrier generation circuit 1
One of the output signals of 0 becomes the detection axis signal h ₃ of the third phase detection circuit 12A as it is, and the other one is converted to the fourth phase after its phase is made π/binary in the π/binary phase circuit 11. becomes the detection axis signal _h4 of the phase detection circuit. That is, the detection axis signals h ₃ and h ₄ of the third and fourth phase detection circuits 12A and 12B are respectively h ₃ =cos(p _B t-φ),
h ₄ =−sin(p _B t−φ). The third and fourth phase detection circuits 12A and 12B use the above h ₃ and h ₄ as detection axis signals and perform phase detection on the output signal x _B from the second addition circuit 8 expressed by the above equation (9). It is configured. Third and fourth phase detection circuits 12A, 12B
Let v ₁ and _{v 2 be} the ghost components _of the burst _signal in the _detection output signal _of
…(10) v ₂ = −Gsin(p _B τ−α)−k ₁ sinp _B τ＋k ₂ cosp _B
τ …(11) is obtained. In equations (10) and (11), v ₁ = 0, and
By setting v ₂ = 0 and solving, we obtain k ₁ = -Gcosα...(12) k ₂ = -Gsinα...(13). Equations (12) and (13) correspond to the coefficients given to the coefficient circuits 6A and 6B in order to cancel the ghost waves shown in the above equations (7) and (8). That is _, if the delay time of the delay circuit is correctly set to the _delay time of the ghost wave, _the output signal If the phase detection circuits 12A and 12B perform phase detection, and the values at the burst signal position of the ghost in each detection output signal become zero at the same time, the coefficient values of the coefficient circuits 6A and 6B can cancel the ghost. This is the required coefficient value.

Therefore, the third and fourth phase detection circuits 12A,
If you observe the output signals v ₁ and v ₂ of 12B and find that v ₁ and v ₂ are not zero but have a certain value, you can achieve the objective by controlling the coefficients until v ₁ and v ₂ become zero. Therefore, basically, the following coefficient setting algorithm can be used as an example of this control.

When the output v ₁ of the third phase detection circuit 12A is positive, the coefficient k ₁ of the coefficient circuit 6A is changed to be smaller, and when the above v ₁ is negative, the above k ₁ is changed to be larger. When the output v ₂ of the fourth phase detection circuit 12B is positive, the coefficient k ₂ of the coefficient circuit 6B is changed to be smaller, and when the above v ₂ is negative, the above k ₂ is changed to be larger.

By doing so, it is possible to obtain the coefficients k ₁ and k ₂ of the coefficient circuits 6A and 6B that simultaneously make the output signals v ₁ and v ₂ of the third and fourth phase detection circuits 12A and 12B zero. Note that in equations (10) and (11), p
In the case of _B τ = nπ + π/2 (n: integer), it is not possible to obtain the coefficients of the coefficient circuits 6A and 6B that simultaneously make v ₁ and v ₂ zero using the above algorithm. The probability of this occurring is extremely small and practically impractical.

The sampling pulse generated at the position of the ghost burst signal by the sampling pulse generation circuit 15 is applied to the comparison circuits 13A and 13B, so that the sampling pulse generated at the position of the ghost burst signal is applied to the third and fourth phase detection circuits 12A and 12B sampled here. Detection output signal v ₁ , v ₂
Determine whether is positive or negative. Coefficient value setting circuits 14A and 14B receive the positive/negative determination signals from comparison circuits 13A and 13B and set the coefficients of coefficient circuits 6A and 6B.
A certain amount of increment of the coefficient control signal is generated in the direction in which k ₁ and k ₂ are increased or decreased, and this is added to the previous control signals of the coefficient value setting circuits 14A and 14B to be used at the time of the next sample. hold until Therefore, by repeating the algorithm shown above, the detection output signals v ₁ and v ₂ of the third and fourth phase detection circuits 12A and 12B can be made zero. Therefore, the coefficient circuits 6A, 6
The coefficient B is automatically set to the desired value shown in equations (12) and (13) above, and ghosts are removed.

Furthermore, the relationship between the comparison circuits 13A and 13B and the coefficient value setting circuits 14A and 14B and the coefficient circuits 6A and 6B will be specifically explained. FIG. 2 is an explanatory diagram showing the relationship among the comparison circuit 13A, the coefficient value setting circuit 14A, and the coefficient circuit 6A. For example, the coefficient value setting circuit 14A is 8
This is a bit reversible counter, and when one pulse is input to the count-up input terminal (CU in the figure), the value of this reversible counter (i.e. coefficient value K ₁ ) increases by one step, and the count-down input terminal (CD in the figure) increases by one step.
When one pulse is input to , the value of the reversible counter (ie, the coefficient value K ₁ ) decreases by one step. In this way, the characteristics of the coefficient value setting circuit are as shown in FIG. 3, and for example, the coefficient value can be set to increase or decrease in 256 steps between 1 and -1.

In the circuit configured as described above, when the detection output v ₁ of the phase detection circuit 12A is determined to be positive or negative by the comparison circuit 13A, if the result is positive, the comparison circuit 13
The coefficient value _k1 , which is input by one pulse from A to the countdown input terminal of the coefficient value setting circuit 14A, is decreased by one step. As a result, the coefficient circuit 6A outputs the video signal u ₁
is multiplied by the coefficient value k ₁ , and the output k ₁ ×u ₁ from the coefficient circuit 6A becomes smaller. Since the value of k ₁ ×u ₁ also includes the burst signal of the residual ghost, the detection output v ₁ also becomes slightly smaller. By repeating this operation, the detection output v ₁ approaches 0, and finally the detection output v ₁ approaches 0 within a range of ±1 step (in the case of an 8-bit counter, only the lower 1 bit changes). ), and as a result, residual ghosts are removed.

By the way, the video signal contains noise, and the detection outputs v ₁ and v ₂ obtained by detecting this also naturally contain noise. Therefore, the comparison circuits 13A, 13
The positive/negative determination by B includes ambiguity due to this noise. Therefore, comparison circuits 13A, 13B
If the output of is directly used as the input signal of the coefficient value setting circuits 14A and 14B, due to this noise, the coefficient values k ₁ and k ₂ will be the average detection outputs v ₁ = 0, v ₂ = 0.
The comparison circuit 13A, 1 that converges in the direction of
For each 3B output pulse, detection output v ₁ = 0, v ₂ = 0
The coefficient values k ₁ and k ₂ do not match, but vary over a fairly wide range (lower 2 to 3 bits if the coefficient value setting circuit is an 8-bit counter). coefficient value
When the values of k ₁ and k ₂ change, the ghost removal conditions are no longer met, and the level of residual ghosts changes, appearing as flicker. Furthermore, as can be seen from equations (10) and (11), the values of k ₁ and k ₂ are related to each other, so in the worst case, the convergence condition may be deviated from.

The present invention is intended to solve such problems, and provides a connection between the comparison circuit and the coefficient value setting circuit.
An integration counter is provided so that the input signal of the coefficient value setting circuit is not affected by noise. FIG. 4 is an explanatory diagram showing the relationship among a comparison circuit, a coefficient value setting circuit, and a coefficient circuit of an automatic ghost removal circuit showing one embodiment of the present invention. is the same as before.

16A, 16B are coefficient value setting circuits 14A, 14
This is an integral counter provided so that the input signal of B is not affected by noise. With this configuration, even if there is ambiguity in the judgment due to noise in the comparison circuit output at each sampling point, it is averaged by the integration counters 16A and 16B, so the output as an integration result does not include the noise. does not appear. Therefore, if this is used as an input signal for setting coefficient values, the above-mentioned problems can be easily and effectively improved. The length of the integral counter may be appropriately selected based on the convergence speed, the permissible value of fluctuation in the amount of residual ghosts, etc.

Although the integral counter and the coefficient value setting counter have been described as being separate, they do not need to be independent circuits. As shown in FIG. 5, the reversible counter 17 may be configured as an integral counter so that the upper digits of the reversible counter 17 are outputted to the coefficient circuit, and the lower digits are unrelated to the coefficient circuit.

In addition, when removing multiple ghosts, multiple coefficient value setting circuits and integral counters are also required, but these can be configured as hardware circuits, or they can be configured as software circuits using a processing device such as a microcomputer. Based on the positive or negative determination result of the residual ghost of each ghost, the coefficient setting value of each coefficient circuit is set in the memory register assigned to each, and the coefficient setting value of each coefficient circuit is set from the upper multiple digits of these registers. A configuration may also be adopted in which the output is read to the coefficient value setting circuit.

As described above, according to the present invention, by providing an integrating counter between the counter used as a coefficient setting circuit and the comparison circuit, the statistical ambiguity of positive and negative judgments due to noise can be removed by this integrating counter. , the signal-to-noise ratio (S/N) of residual ghost detection is improved, and the values of the coefficient value setting circuit, that is, the coefficient values, are converged and fluctuations can be effectively removed.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of the automatic ghost removal circuit system that is the basis of the present invention, and FIG. 2 is an explanatory diagram showing the relationship among a comparison circuit, a coefficient value setting circuit, and a coefficient circuit.
FIG. 3 is a characteristic diagram of the coefficient value setting circuit, FIG. 4 is a partial configuration diagram for explaining one embodiment of the present invention, and FIG. 5 is a partial diagram for explaining another embodiment of the present invention. FIG. In the figure, 1 is an intermediate frequency amplification stage, 2 is a carrier extraction circuit, 3 is a π/2 phase delay circuit, 4A and 4B are first and second phase detection circuits, 5 is a delay circuit, 6A and 6B are coefficient circuits, 7 and 8 are adder circuits, 9 is a burst signal extraction circuit, 10 is a color subcarrier generation circuit, 11 is a phase shift circuit, 12A and 12B are third and fourth phase detection circuits, 13A and 13B are comparison circuits, and 14A ,14
B is a coefficient value setting circuit, 15 is a sampling pulse generation circuit, and 16A and 16B are integral counters. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A detection circuit that detects residual ghosts in a video signal, a comparison circuit that determines whether the output of the detection circuit is positive or negative, and a coefficient control signal that is digitally increased or decreased based on the positive or negative determination signal of the output of the comparison circuit and held for a predetermined period. In the automatic ghost removal circuit, the automatic ghost removal circuit includes a coefficient value setting circuit for increasing or decreasing the coefficient value, and a removal circuit for removing the residual ghost based on the coefficient value control signal increased or decreased by the coefficient value setting circuit, the comparison circuit and the coefficient value setting circuit comprising: An automatic ghost removal circuit characterized in that an integral counter is provided to prevent the input signal of the coefficient value setting circuit from being affected by noise between the two.