JPS6260819B2 - - Google Patents
Info
- Publication number
- JPS6260819B2 JPS6260819B2 JP57200679A JP20067982A JPS6260819B2 JP S6260819 B2 JPS6260819 B2 JP S6260819B2 JP 57200679 A JP57200679 A JP 57200679A JP 20067982 A JP20067982 A JP 20067982A JP S6260819 B2 JPS6260819 B2 JP S6260819B2
- Authority
- JP
- Japan
- Prior art keywords
- amorphous silicon
- electrode
- thin film
- photovoltaic elements
- electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/20—Electrodes
- H10F77/206—Electrodes for devices having potential barriers
- H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F19/00—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules
- H10F19/30—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules comprising thin-film photovoltaic cells
- H10F19/31—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules comprising thin-film photovoltaic cells having multiple laterally adjacent thin-film photovoltaic cells deposited on the same substrate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
- Photovoltaic Devices (AREA)
- Light Receiving Elements (AREA)
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、光電式エンコーダ等に応用する非晶
質薄膜光電変換素子に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an amorphous thin film photoelectric conversion element applied to photoelectric encoders and the like.
従来例の構成とその問題点
第1図は従来例の光ダイオード4を用いる光電
式エンコーダの構成図である。発光ダイオード、
白熱ランプ等の光源1に対向して受光素子である
光ダイオード4を配置し、その間に適当なピツチ
で開孔部2が連続するしやへい板3を配置する。
光ダイオード4は単結晶シリコンでPN接合のダ
イオードを形成し、PN接合に逆バイアスがかか
るようリード線4a,4bに電圧を印加してあ
る。しやへい板3が図で横に移動すると断続光が
フオトダイオード4のPN接合に入射し発生した
キヤリアにより第2図の様な光電流の信号がリー
ド線4a,4bに発生する。即ち、しやへい板3
の移動量に応じた数のパルスが発生してアナログ
的な変位を数値化することができる。この従来例
の欠点は、発生する光電流が小さく、脈流であり
感度が低く、ノイズの影響を受けやすい。1. Configuration of Conventional Example and Its Problems FIG. 1 is a configuration diagram of a photoelectric encoder using a conventional photodiode 4. As shown in FIG. light emitting diode,
A photodiode 4, which is a light receiving element, is arranged facing a light source 1 such as an incandescent lamp, and a shield plate 3 having continuous apertures 2 at an appropriate pitch is arranged therebetween.
The photodiode 4 is a PN junction diode made of single crystal silicon, and a voltage is applied to lead wires 4a and 4b so that a reverse bias is applied to the PN junction. When the shielding plate 3 moves laterally in the figure, intermittent light enters the PN junction of the photodiode 4, and the generated carrier generates a photocurrent signal in the lead wires 4a and 4b as shown in FIG. 2. That is, Shiyahei board 3
A number of pulses are generated according to the amount of movement of the object, and the analog displacement can be quantified. The disadvantage of this conventional example is that the generated photocurrent is small and pulsating, has low sensitivity, and is susceptible to noise.
また光ダイオード4の形状が大きくたとえば外
径は約3mmφ、受光部は約1mmφであり、変位に
対する分解能が悪い。更に光ダイオードの素子の
厚みも2〜3mmありエンコーダ全体の厚みを薄く
することができない。しやへい板3と光源1およ
び光ダイオード4との間隔はそれぞれ0.5〜1mm
ぐらいである。 Further, the photodiode 4 has a large shape, for example, the outer diameter is about 3 mmφ, and the light receiving part is about 1 mmφ, and its resolution with respect to displacement is poor. Furthermore, the thickness of the photodiode element is 2 to 3 mm, making it impossible to reduce the thickness of the entire encoder. The distance between the shield plate 3 and the light source 1 and photodiode 4 is 0.5 to 1 mm, respectively.
That's about it.
発明の目的
本発明は、小型で感度の非常に高いエンコーダ
用光電変換素子を提供するものである。OBJECTS OF THE INVENTION The present invention provides a photoelectric conversion element for an encoder that is small and has extremely high sensitivity.
発明の構成
本発明は、一枚の基板上に複数個の微小な光起
電力素子のパターンを同時に形成すると共に差動
型の電気的結合も同時に得られる非晶質シリコン
薄膜を用いた光電変磁素子である。Structure of the Invention The present invention provides a photoelectric transformer using an amorphous silicon thin film that can simultaneously form a plurality of microphotovoltaic element patterns on a single substrate and also provide differential electrical coupling. It is a magnetic element.
実施例の説明
第3図が実施例である。ガラス、セラミツク、
耐熱高分子フイルム等の絶縁性基板5の上に2つ
の下部電極5a,5bを形成する。形成方法は、
ニツケル、ニツケルクロム合金、クロム、アルミ
ニウム、チタン、ITO(InxSn1―xO2)、SnO2等
を電子ビーム蒸着により真空蒸着したりスパツタ
リング装置で蒸着して形成する。次にプロズマ
CVD装置を用いてシランガス中0.1〜4Torrの圧
力でグロー放電をおこし150〜300℃に加熱した基
板4の上に非晶質シリコン半導体薄膜6を形成す
る。この非晶質シリコンは未結合のダングリング
ボンドがシラン(SiH4)の分解により発生するH
原子で補償されバンドギヤツプ中の局在準位が著
しく減少している。従つて放電する時に不純物元
素を含むガスを混入すればP型あるいはN型の半
導体に不純物制御することができる。そこで、ジ
ボラン(B2H6)を0.2〜2%含むシランガス中でま
ず100〜500ÅのP型非晶質シリコン層を、次に不
純物を含まない3000〜5000Åのi型非晶質シリコ
ン層を、最後にホスフイン(PH3)を0.2〜2%含
むシランガス中で50〜5000ÅのN型非晶質シリコ
ン層を形成し、PiN構造の非晶質シリコン半導体
薄膜6を形成する。更に下部電極と同じ様な方法
で上部電極7a,7bを形成する。第3図の実施
例の場合は、受光面となる上部電極7a,7bは
少なくとも透明電極にする必要がありITOやネサ
(SnO2)を用いる。第4図は第3図に示す光電変
換素子の実施例の断面図である。第3図で一枚の
絶縁性基板5の上に2つの光起電力素子を同時に
形成し、透明な上部電極7aは隣接する光起電力
素子の下部電極5bに電気的に接触し、透明な上
部電極7bはやはり隣接する光起電力素子の下部
電極5aに電気的に接触するパターン形成となつ
ている。従つて第5図の回路図に示すように2つ
の光起電力素子を直列に接続した形になつてい
る。第3図で透明な上部電極7aと7bの間隔
は、開孔部2のピツチの半分になつているため、
しやへい板3が横に移動すると上部電極7aと7
bに交代に光が入射し2つの光起電力素子に交代
に光起電力が発生する。そこでリード線8a,8
bには第8図の点線に示す様な交流の光電流が流
れる。2つの光起電力素子はいわば太陽電池と同
じであるから従来例の様なバイアス電源は必要と
しない。DESCRIPTION OF EXAMPLE FIG. 3 shows an example. glass, ceramic,
Two lower electrodes 5a and 5b are formed on an insulating substrate 5 such as a heat-resistant polymer film. The formation method is
Nickel, nickel-chromium alloy, chromium, aluminum, titanium, ITO (In x Sn 1 - x O 2 ), SnO 2 , etc. are deposited in vacuum by electron beam evaporation or by sputtering equipment. Next is prozma
An amorphous silicon semiconductor thin film 6 is formed on a substrate 4 heated to 150 to 300° C. by generating glow discharge in silane gas at a pressure of 0.1 to 4 Torr using a CVD device. In this amorphous silicon, unbonded dangling bonds are generated by decomposition of silane (SiH 4 ).
The localized levels in the band gap are significantly reduced due to atomic compensation. Therefore, if a gas containing an impurity element is mixed during discharge, the impurities can be controlled to a P-type or N-type semiconductor. Therefore, we first formed a 100-500 Å P-type amorphous silicon layer in silane gas containing 0.2-2% diborane (B 2 H 6 ), and then a 3000-5000 Å i-type amorphous silicon layer containing no impurities. Finally, an N-type amorphous silicon layer with a thickness of 50 to 5000 Å is formed in a silane gas containing 0.2 to 2% of phosphine (PH 3 ) to form an amorphous silicon semiconductor thin film 6 having a PiN structure. Furthermore, upper electrodes 7a and 7b are formed in the same manner as the lower electrode. In the case of the embodiment shown in FIG. 3, the upper electrodes 7a and 7b serving as the light-receiving surfaces must be at least transparent electrodes, and are made of ITO or SnO 2 . FIG. 4 is a sectional view of the embodiment of the photoelectric conversion element shown in FIG. 3. In FIG. 3, two photovoltaic elements are simultaneously formed on one insulating substrate 5, the transparent upper electrode 7a is electrically contacted with the lower electrode 5b of the adjacent photovoltaic element, and the transparent The upper electrode 7b is also patterned to electrically contact the lower electrode 5a of the adjacent photovoltaic element. Therefore, as shown in the circuit diagram of FIG. 5, two photovoltaic elements are connected in series. In FIG. 3, the distance between the transparent upper electrodes 7a and 7b is half the pitch of the aperture 2, so
When the shield plate 3 moves laterally, the upper electrodes 7a and 7
Light is alternately incident on the photovoltaic elements b, and photovoltaic forces are generated alternately in the two photovoltaic elements. Therefore, the lead wires 8a, 8
An alternating current photocurrent as shown by the dotted line in FIG. 8 flows through b. Since the two photovoltaic elements are, so to speak, the same as solar cells, there is no need for a bias power source as in the conventional example.
上記説明で明らかな様に2個以上の多数の光起
電力素子を一枚の絶縁性基板上に形成するのは非
常に容易であり、その実施例が第6図である。一
枚の絶縁性基板9の上にくし型の共通な下部電極
10,11を設けプラズマCVD装置で共通膜と
なる非晶質シリコン薄膜12を設け、更に透明な
上部電極13,14,15を隣接する光起電力素
子の共通な下部電極10に電気的に接触させ、透
明な上部電極16,17,18をやはり隣接する
光起電力素子の共通な下部電極11に電気的に接
触させる。第6図の素子を電気回路図にしたのが
第7図である。それぞれ1つおきの光起電力素子
同志は並列に接続され光のON、OFFも同時であ
るから光電流は積分され、リード線19,20に
は第8図の実線の様な感度の大きな交流の光電流
が流れる。 As is clear from the above description, it is very easy to form two or more photovoltaic elements on a single insulating substrate, and an example thereof is shown in FIG. A comb-shaped common lower electrode 10, 11 is provided on a single insulating substrate 9, an amorphous silicon thin film 12 is provided as a common film in a plasma CVD apparatus, and transparent upper electrodes 13, 14, 15 are further provided. The common lower electrode 10 of adjacent photovoltaic elements is brought into electrical contact, and the transparent upper electrodes 16, 17, 18 are also brought into electrical contact with the common lower electrode 11 of adjacent photovoltaic elements. FIG. 7 is an electrical circuit diagram of the element shown in FIG. 6. Since every other photovoltaic element is connected in parallel and the light is turned on and off at the same time, the photocurrent is integrated, and the lead wires 19 and 20 are connected to a highly sensitive alternating current as shown by the solid line in Figure 8. photocurrent flows.
第6図の上部電極13〜18は、全面に蒸着し
た透明電極をフオトエツチングによりパターン形
成すれば巾50μの微細なパターンにすることがで
き、同じようにしやへい板3の開孔部2をフオト
エツチングで巾50μにすれば、しやへい板3が
0.1mm移動するごとに1パルスの信号を発生する
非常に分解能の高いエンコーダが容易に実現す
る。しやへい板3を円板にして開孔部2をその円
周上に配置し、これと対向する様に円形の絶縁基
板上の外周部に0.1mm〜50μのピツチで光起電力
素子を形成し、回転による変位を検出するエンコ
ーダをつくることも可能である。第6図の光電変
換素子がたとえば大きくて5mm口としても、100
mm口の基板サイズで非晶質シリコン薄膜の形成や
電極のフオトエツチングを行なえば、400個の素
子が1枚の基板から得られ量産的であり、安価で
ある。フオトエツチングであるから素子配置の寸
法精度も高い。 The upper electrodes 13 to 18 in FIG. 6 can be formed into a fine pattern with a width of 50 μm by photo-etching a transparent electrode deposited on the entire surface. If you make the width 50μ by photo etching, the stiff plate 3 will become
An extremely high-resolution encoder that generates one pulse signal every 0.1 mm of movement can be easily realized. The insulation plate 3 is made into a disk, and the apertures 2 are arranged on its circumference, and photovoltaic elements are placed at a pitch of 0.1 mm to 50 μ on the outer circumference of a circular insulating substrate so as to face it. It is also possible to create an encoder that detects displacement due to rotation. Even if the photoelectric conversion element shown in Fig. 6 has a large opening of 5 mm, for example, 100
By forming an amorphous silicon thin film and photoetching electrodes on a substrate size of mm, 400 elements can be obtained from one substrate, making it mass-producible and inexpensive. Since it is photoetched, the dimensional accuracy of the element arrangement is also high.
第4図で絶縁性基板5を透明なガラスにし下部
電極5a,5bを透明電極にすれば、基板側から
光が入射するようにしやへい板3に対向させるこ
とも可能である。また第9図の実施例の様に、ス
テンレス、アルミニウム等の金属板25の上に薄
いSiO2、SiNの様な絶縁膜21を設けて基板と
し、基板の加工性を改良したり電磁誘導のしやへ
いに用いることもできる。 In FIG. 4, if the insulating substrate 5 is made of transparent glass and the lower electrodes 5a and 5b are made of transparent electrodes, it is possible to face the thin plate 3 so that light enters from the substrate side. Further, as in the embodiment shown in FIG. 9, a thin insulating film 21 such as SiO 2 or SiN is provided on a metal plate 25 made of stainless steel or aluminum to form a substrate, which improves the workability of the substrate and improves electromagnetic induction. It can also be used casually.
なお、上記実施例においては、複数の電磁に対
して連続した非晶質シリコン薄膜を形成したが、
電極毎に分離した非晶質シリコン薄膜を用いても
よい。 In addition, in the above example, a continuous amorphous silicon thin film was formed for multiple electromagnetic waves.
A separate amorphous silicon thin film may be used for each electrode.
発明の効果
以上の様に、本発明によれば、複数の光起電力
素子が差動型で結合されるため感度が高く、非晶
質シリコンであるため量産的で低価格であり小型
であり、フオトエツチングによるパターン形成が
できるため分解能の高いすぐれたエンコーダ用光
電変換素子が得られる。Effects of the Invention As described above, according to the present invention, sensitivity is high because multiple photovoltaic elements are coupled in a differential type, and since it is made of amorphous silicon, mass production is possible, low cost, and small size. Since a pattern can be formed by photoetching, an excellent photoelectric conversion element for an encoder with high resolution can be obtained.
第1図は従来例の光ダイオードを用いるエンコ
ーダの構成図、第2図は第1図における光ダイオ
ードの光電流を示す図、第3図は本発明の一実施
例による光電変換素子を用いたエンコーダの構成
図、第4図は第3図における光電変換素子の断面
図、第5図は第3図の電気回路図、第6図は本発
明の一実施例による光電変換素子の上面図、第7
図は第6図の電気回路図、第8図は第7図におけ
る端子19,20に発生する光電流を示す図、第
9図は本発明の異なる実施例の光電変換素子の断
面図である。
5……絶縁板、5a,5b……下部電極、6…
…非晶質シリコン薄膜、7a,7b……上部電
極。
Figure 1 is a block diagram of an encoder using a conventional photodiode, Figure 2 is a diagram showing the photocurrent of the photodiode in Figure 1, and Figure 3 is an encoder using a photoelectric conversion element according to an embodiment of the present invention. A configuration diagram of an encoder, FIG. 4 is a sectional view of the photoelectric conversion element in FIG. 3, FIG. 5 is an electric circuit diagram of FIG. 3, and FIG. 6 is a top view of the photoelectric conversion element according to an embodiment of the present invention. 7th
6 is an electrical circuit diagram of FIG. 6, FIG. 8 is a diagram showing photocurrents generated at terminals 19 and 20 in FIG. 7, and FIG. 9 is a cross-sectional view of a photoelectric conversion element according to a different embodiment of the present invention. . 5... Insulating plate, 5a, 5b... Lower electrode, 6...
...Amorphous silicon thin film, 7a, 7b... Upper electrode.
Claims (1)
上に非晶質シリコン薄膜を形成し、その上に前記
下部電極に対向して複数の上部電極を設け、前記
上部電極と下部電極の少なくとも一方は透明電極
とし、前記非晶質シリコン薄膜とこれをはさむ下
部電極と上部電極で複数の光起電力素子を形成
し、隣接する光起電力素子の極性が順に逆接続と
なるよう電極パターンを形成した光電変換素子。1. A plurality of lower electrodes are provided on an insulating substrate, an amorphous silicon thin film is formed thereon, a plurality of upper electrodes are provided thereon facing the lower electrode, and at least one of the upper electrode and the lower electrode is formed. One side is a transparent electrode, and a plurality of photovoltaic elements are formed by the amorphous silicon thin film and the lower and upper electrodes sandwiching it, and the electrode pattern is formed so that the polarities of adjacent photovoltaic elements are connected in reverse order. The formed photoelectric conversion element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57200679A JPS5989473A (en) | 1982-11-15 | 1982-11-15 | Photoelectric conversion element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57200679A JPS5989473A (en) | 1982-11-15 | 1982-11-15 | Photoelectric conversion element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5989473A JPS5989473A (en) | 1984-05-23 |
| JPS6260819B2 true JPS6260819B2 (en) | 1987-12-18 |
Family
ID=16428440
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57200679A Granted JPS5989473A (en) | 1982-11-15 | 1982-11-15 | Photoelectric conversion element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5989473A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7002549B2 (en) * | 2001-01-18 | 2006-02-21 | Mccahon Stephen William | Optically based machine input control device |
| US7176542B2 (en) * | 2004-04-22 | 2007-02-13 | Hrl Lab Llc | Photo induced-EMF sensor shield |
-
1982
- 1982-11-15 JP JP57200679A patent/JPS5989473A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5989473A (en) | 1984-05-23 |
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