JPS626417B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a thyristor switch that controls AC power using a thyristor, and particularly to a thyristor switch with improved gate control.

FIG. 1 shows a basic circuit that controls AC power using the switching characteristics of a thyristor. In Figure 1, 1-1 to 1-n, 2-1 to 2-n
is a thyristor, 3 and 4 are thyristor arms consisting of thyristors 1-1 to 1-n and 2-1 to 2-n connected in series, 5 is a power transformer, 6 is a load, and V _T is a power transformer , V _S is the voltage of the thyristor arms 3 and 4, and I is the load current.

FIG. 2 shows waveforms at various parts when the circuit in FIG. 1 is controlled by a conventional control circuit (not shown),
G-1 and G-2 are the thyristor arms 3 in Fig. 1,
4, V _T is the secondary voltage waveform of the power transformer 5, I is the load current, and V _S is the terminal voltage waveform of the thyristor arms 3 and 4. In Fig. 1, the gate signal G- is applied to the thyristor arms 3 and 4.
When applying 1, G-2, thyristors 1-1 to 1-
n, 2-1 to 2-n are fired and load current I flows,
AC power is supplied to the load 6. In this state, when gate signals G-1 and G-2 are blocked at time t, thyristors 1-1 to 1-n, 2-1
2-n enters a blocking state, the load current I becomes zero, and the power supply to the load 6 is immediately cut off. At this point, thyristors 1-1 to 1-n, 2-1 to 2
-n becomes blocked, the back electromotive force of the load 6 and the secondary voltage V _T of the power transformer 5 are combined, and the thyristor arms 3 and 4 receive approximately the maximum value of the secondary voltage V _T . In some cases, twice the voltage is applied.

By the way, when blocking the gate signals G-1 and G-2, it is impossible to block them instantaneously, and the time constant usually decreases according to the circuit time constant. That is, as shown in FIG. 3, which is an enlarged view of the vicinity of time t in FIG. 2, the gate signals G-1 and G-2 attenuate with time. Therefore, depending on the timing of blocking the gate signals G-1 and G-2, the following problems occur. That is, the phases of gate signals G-1, G-2 and load current I are as shown in FIG. 3, load current I becomes zero at time _t2 , and gate signals G-1 and G-2 become zero at time _t1. Consider the case where the attenuation starts from . Since the decay time of the gate signals G-1 and G-2 is usually about several μS to several tens of μS depending on the time constant of the gate circuit,
If the difference between times t ₁ and t ₂ is several μS to several tens of μS, the gate signals G-1 and G-2 are insufficient signals lower than the normal values, and the thyristors 1-1 to 1-n, 2- 1~
By flowing to the gate of 2-n. In this state, at time _t2 , a voltage approximately twice the secondary voltage V _T of the power transformer 5 is applied to the thyristor arms 3 and 4, and this voltage becomes the forward voltage of the thyristor arms. The thyristors within the thyristor are fired by this insufficient gate signal, and phenomena such as overvoltage or destruction due to di/dt occur due to uneven firing of the series thyristors.

Therefore, an object of the present invention is to provide a thyristor switch which eliminates the above-mentioned disadvantages, and the present invention will be explained below with reference to the drawings.

FIG. 4 is a block diagram showing an embodiment of the present invention, the main circuit of which is the same as that in FIG. 1. In the figure, 7
is a current detector such as a current transformer that detects the load current I,
8 is a current level detector to which the output of the current detector 8 is applied and detects whether the load current is at a predetermined level; 9 is an operation signal RUN and a current level detector 8
The output signal I _L of is applied and the gate signal G-1, G
This is a gate control circuit that generates -2.

Next, the operation of the present invention constructed as described above will be explained with reference to the operational waveform diagram of FIG.

In Figure 5, RUN, G-1, G-2, V
_T , I, V _S , I _L indicate the respective waveforms corresponding to the same symbols in _FIG .
G-2 is generated and AC power is supplied to load 3.
When AC power is being supplied to the load, the current level detector 8 generates a signal indicating whether the load current I is within a certain level range, as shown in FIG. 5 _IL .

Therefore, when the operation signal is stopped at time _t3 , if the output I _L of the current level detector 8 at this point is a signal below the detection level, the gate signals G-1 and G-2 are not blocked. Thyristors 1-1 to 1- are kept at or above the detection level until time _t4 , and due to variations in firing at _t5 when overvoltage occurs
n, 2-1 to 2-n are prevented from being destroyed. That is, firing of the thyristor due to insufficient gate signals G-1 and G-2 is prevented.

As described above, the present invention prevents the gate signal of the thyristor switch from being blocked at or near the zero point of the load current, thereby preventing the firing variation when an overvoltage is applied when the thyristor is turned off by generating a back electromotive voltage of the load. Thyristor destruction can be prevented.

[Brief explanation of the drawing]

Fig. 1 is a main circuit configuration diagram of a thyristor switch to which the present invention can be applied, Fig. 2 is an operation waveform diagram of Fig. 1 by a conventional control circuit, Fig. 3 is a partially enlarged view of Fig. 2, and Fig. 4 is a configuration diagram showing an embodiment of the present invention,
FIG. 5 is an operational waveform diagram of FIG. 4 for explaining the operation of the present invention. 1-1 to 1-n, 2-1 to 2-n...Thyristor, 3, 4...Thyristor arm, 5...Power transformer, 6...Load, 7...Current detector, 8...Current Level detector, 9...gate control circuit.

Claims (1)

[Claims] 1. In a thyristor switch in which thyristor arms formed by connecting a plurality of thyristors in series are connected in antiparallel, and AC power is supplied to a load having an inductance through the arms connected in antiparallel, the thyristor arm is A current level detector is provided that generates an output signal when the level of the flowing current is above a predetermined value, and a continuous gate signal is output when the operation command signal is applied to the gate control circuit that controls the thyristor switch.
A thyristor switch characterized in that the continuous gate signal is blocked on condition that the operation command signal is stopped and the current level detector is generating an output.