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JPS626647B2 - - Google Patents
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JPS626647B2 - - Google Patents

Info

Publication number
JPS626647B2
JPS626647B2 JP54118261A JP11826179A JPS626647B2 JP S626647 B2 JPS626647 B2 JP S626647B2 JP 54118261 A JP54118261 A JP 54118261A JP 11826179 A JP11826179 A JP 11826179A JP S626647 B2 JPS626647 B2 JP S626647B2
Authority
JP
Japan
Prior art keywords
phosphorus
film
diffusion source
semiconductor substrate
nitride chloride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54118261A
Other languages
Japanese (ja)
Other versions
JPS5642336A (en
Inventor
Hiroo Sasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11826179A priority Critical patent/JPS5642336A/en
Publication of JPS5642336A publication Critical patent/JPS5642336A/en
Publication of JPS626647B2 publication Critical patent/JPS626647B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase

Landscapes

  • Formation Of Insulating Films (AREA)

Description

【発明の詳細な説明】 本発明は半導体基板に燐を拡散する方法に関
し、特に燐を含む拡散源の形成方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of diffusing phosphorus into a semiconductor substrate, and more particularly to a method of forming a diffusion source containing phosphorus.

従来半導体基板中に燐(P)を拡散するには拡
散源としてPOCl3を用いるガス拡散法と、半導体
基板表面に化学気相成長法(CVD法)により燐
シリケートガラス(PSG)膜を形成し、このPSG
膜を拡散源として用いる方法が多く使われてい
る。
Conventionally, phosphorus (P) is diffused into semiconductor substrates by a gas diffusion method using POCl 3 as a diffusion source and by forming a phosphorus silicate glass (PSG) film on the surface of the semiconductor substrate by chemical vapor deposition (CVD). , this PSG
Many methods are used that use membranes as a diffusion source.

ところが上記POCl3は毒性及び可燃性を有し、
更に水と爆発的に反応するためその取扱いには厳
重な注意を必要とする。
However, the above POCl 3 is toxic and flammable,
Furthermore, it reacts explosively with water, so extreme care must be taken when handling it.

また前記PSG膜を半導体基板上にCVD法によ
り形成するには通常モノシラン(SiH4)とホスフ
イン(PH3)等を混合して反応ガスとて用いる
が、これらは気相分解を起こしやすいため、PSG
膜中の燐(P)の濃度分布が一様になりにくい。
Furthermore, to form the PSG film on a semiconductor substrate by the CVD method, a mixture of monosilane (SiH 4 ) and phosphine (PH 3 ), etc. is usually used as a reaction gas, but these are likely to cause gas phase decomposition. P.S.G.
The concentration distribution of phosphorus (P) in the film is difficult to be uniform.

本発明の目的は上記問題点を解消して、取扱い
容易で且つ気相分解を生じない材料を用いた拡散
源の形成方法を提供することにある。
An object of the present invention is to solve the above problems and provide a method for forming a diffusion source using a material that is easy to handle and does not cause gas phase decomposition.

本発明の半導体装置の製造方法の特徴は、窒化
塩化燐を用いてCVD法により燐を含む薄膜を形
成し、該薄膜を拡散源として半導体基板内に燐を
導入する工程を含むことにある。
A feature of the method for manufacturing a semiconductor device of the present invention is that it includes a step of forming a thin film containing phosphorus by a CVD method using phosphorous nitride chloride, and introducing phosphorus into a semiconductor substrate using the thin film as a diffusion source.

以下本発明の半導体装置の製造方法を実施例に
より説明する。
The method for manufacturing a semiconductor device of the present invention will be explained below using examples.

第1図乃至第5図は上記実施例を工程の順に示
す要部断面図である。
FIGS. 1 to 5 are sectional views of essential parts showing the above embodiment in the order of steps.

第1図において1はP型シリコン基板、2は該
シリコン基板1表面に形成された所定の開口3を
有するシリコン酸化膜(SiO2膜)である。
In FIG. 1, 1 is a P-type silicon substrate, and 2 is a silicon oxide film (SiO 2 film) having a predetermined opening 3 formed on the surface of the silicon substrate 1. In FIG.

これをプラズマ反応槽内に入れて凡そ400
〔℃〕に加熱し、反応ガスとして例えば水を気化
させて窒化塩化燐〔(NPCl2)n、但しn≧3で
あるが、以下nの値については記述を省略する〕
と混合したガスを用い、反応圧力を凡そ20
〔Torr〕にして高周波電力を印加し、プラズマ化
学気相成長(プラズマCVD)を行うことにより
第2図に示すようにシリコン基板1全表面に五酸
化燐(P2O5)膜4を形成する。
Put this in the plasma reaction tank and it will take approximately 400 minutes.
[°C] and vaporize water as a reaction gas to produce phosphorous nitride chloride [(NPCl 2 )n, where n≧3, but the description of the value of n will be omitted below]
Using a gas mixed with
By applying high-frequency power at [Torr] and performing plasma chemical vapor deposition (plasma CVD), a phosphorus pentoxide (P 2 O 5 ) film 4 is formed on the entire surface of the silicon substrate 1 as shown in FIG. do.

次いで窒化塩化燐〔(NPCl2)n〕とモノシラ
ン(SiH4)と酸素(O2)との混合ガスを反応ガス
とし、反応圧力を凡そ20〔Torr〕、反応温度を凡
そ400〔℃〕でプラズマCVDを行い、第3図に示
すようにPSG膜5を形成し、その後ホトエツチン
グ法を用いて前記開口3の部分のPSG膜を除去す
る。
Next, a mixed gas of phosphorous nitride chloride [(NPCl 2 )n], monosilane (SiH 4 ), and oxygen (O 2 ) was used as the reaction gas, and the reaction pressure was about 20 [Torr] and the reaction temperature was about 400 [℃]. Plasma CVD is performed to form a PSG film 5 as shown in FIG. 3, and then the PSG film at the opening 3 is removed using a photoetching method.

このあと通常の方法に従つて熱処理を行うこと
により、前記P2O5膜4が拡散源となり、燐
(P)がシリコン基板1の前記開口3部に導入さ
れ、第4図に示すごとくn型領域6が形成され、
該n型領域6表面にはP2O5膜4′が残留し、前記
P2O5膜4のPSG膜5に覆われた部分は溶融し
て、前記PSG膜と一体化されて燐(P)を多量に
含んだPSG膜5′が形成される。
After that, heat treatment is performed in accordance with a normal method, so that the P 2 O 5 film 4 becomes a diffusion source, and phosphorus (P) is introduced into the opening 3 of the silicon substrate 1, and as shown in FIG. A mold region 6 is formed;
The P 2 O 5 film 4' remains on the surface of the n-type region 6, and the
The portion of the P 2 O 5 film 4 covered with the PSG film 5 is melted and integrated with the PSG film to form a PSG film 5' containing a large amount of phosphorus (P).

次いで第5図に示すごとく前記P2O5膜4′を弗
酸(HF)を水(H2O)で希釈した溶液で除去
し、n型領域6表面を露出させる。
Next, as shown in FIG. 5, the P 2 O 5 film 4' is removed with a solution of hydrofluoric acid (HF) diluted with water (H 2 O) to expose the surface of the n-type region 6.

上記工程において窒化塩化燐(NPCl2)nは気
相分解を起こさないので膜厚及び濃度分布が一様
なP2O5膜を形成することができ、従つてこれを
拡散源として用いることにより均一な拡散を行う
ことができる。
In the above process, phosphorus nitride chloride (NPCl 2 ) n does not cause gas phase decomposition, so it is possible to form a P 2 O 5 film with a uniform thickness and concentration distribution. Therefore, by using this as a diffusion source, Uniform diffusion can be achieved.

なお上記実施例において窒化塩化燐(NPCl2
nをプラズマ反応槽に導入するには、窒化塩化燐
を気化容器に入れ、ヒータで加熱して溶融せし
め、例えば窒素(N2)のようなキヤリアガスを上
記窒化塩化燐融液中を通してプラズマ反応槽に送
り込むことにより気化した窒化塩化燐(NPCl2
nをプラズマ反応槽中に導入するという方法を用
いればよい。
In the above examples, phosphorus nitride chloride (NPCl 2 )
To introduce phosphorus nitride chloride into the plasma reaction tank, phosphorus nitride chloride is placed in a vaporization container, heated with a heater to melt it, and a carrier gas such as nitrogen (N 2 ) is passed through the phosphorus nitride chloride melt into the plasma reaction tank. Phosphorous nitride chloride (NPCl 2 ) vaporized by pumping into
A method of introducing n into a plasma reaction tank may be used.

以上説明したごとく本発明によれば取扱い容易
で且つ気相分解を生じない材料を用いて拡散源を
形成できるので、作業上の危険性が排除され、し
かも均一な拡散を行なうことが可能となり半導体
素子の特性が均一化する。
As explained above, according to the present invention, the diffusion source can be formed using a material that is easy to handle and does not cause gas phase decomposition, thereby eliminating operational risks and making it possible to uniformly diffuse the semiconductor. The characteristics of the element become uniform.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図乃至第5図は本発明の半導体装置の製造
方法の実施例を示す要部断面図である。 1……半導体基板、4,4′……五酸化燐膜、
5,5′……燐シリケートガラス膜、6……n型
領域。
1 to 5 are sectional views of essential parts showing an embodiment of the method for manufacturing a semiconductor device of the present invention. 1... Semiconductor substrate, 4,4'... Phosphorus pentoxide film,
5, 5'...phosphorus silicate glass film, 6... n-type region.

Claims (1)

【特許請求の範囲】[Claims] 1 窒化塩化燐を用いて化学気相成長法により燐
を含む薄膜を半導体基板上に形成し、該薄膜を拡
散源として半導体基板内に燐を導入する工程を含
むことを特徴とする半導体装置の製造方法。
1. A semiconductor device comprising the steps of forming a thin film containing phosphorus on a semiconductor substrate by chemical vapor deposition using phosphorous nitride chloride, and introducing phosphorus into the semiconductor substrate using the thin film as a diffusion source. Production method.
JP11826179A 1979-09-14 1979-09-14 Manufacturing method of semiconductor device Granted JPS5642336A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11826179A JPS5642336A (en) 1979-09-14 1979-09-14 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11826179A JPS5642336A (en) 1979-09-14 1979-09-14 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5642336A JPS5642336A (en) 1981-04-20
JPS626647B2 true JPS626647B2 (en) 1987-02-12

Family

ID=14732240

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11826179A Granted JPS5642336A (en) 1979-09-14 1979-09-14 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5642336A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6021321A (en) * 1983-07-12 1985-02-02 Toray Eng Co Ltd Heating or cooling method of metallic object by fluidized bed furnace
JPS60138974A (en) * 1983-12-27 1985-07-23 Fuji Electric Corp Res & Dev Ltd Manufacture of insulated gate type field effect transistor
JPS629627A (en) * 1985-07-06 1987-01-17 Sony Corp Manufacture of semiconductor device
JPH0797565B2 (en) * 1985-07-12 1995-10-18 ソニー株式会社 Method for manufacturing semiconductor device

Also Published As

Publication number Publication date
JPS5642336A (en) 1981-04-20

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