JPS6310394B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a circuit that detects whether the frequencies of two digital signals match or are integer multiples.

Conventional configurations and their problems Conventionally, a circuit that compares the frequency of one signal with a fixed set value can be easily configured, but a circuit that compares the frequencies of two signals that both fluctuate in frequency requires a considerably complicated circuit. required. for example,
There are two known methods: counting two signals for a certain period of time and comparing the counts using a digital comparison circuit, or converting the frequency of each signal into a voltage and making a judgment based on the voltage difference, but in both cases, the circuit It is complex and requires many circuit elements, and also has the disadvantage that the frequency range of the input signal is limited.

OBJECTS OF THE INVENTION The present invention solves these conventional problems and provides a frequency comparison circuit that operates reliably for two input signals in a wide frequency range and that can be manufactured at low cost with a simple circuit configuration. be.

Structure of the Invention The present invention provides a frequency dividing circuit for each of two input signals, divides the frequency of each into about 1/8 or 1/16, obtains pulses with equal duty ratios, and outputs one of the output pulses. By resetting the other frequency divider circuit to its initial state at the rising or falling edge, it takes advantage of the fact that when the frequencies of the two input signals are equal, the two frequency dividers output pulses with almost equal phase and duty ratio. Then, this state is detected by an exclusive OR circuit, its output is smoothed by an integrator circuit, and the output voltage is compared by an analog comparator circuit, and as a result, it is determined whether or not the frequencies of the input signals match. It is configured to do so.

DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In FIG. 1, 1 and 2 are 4-bit binary counters, 3 is an exclusive OR circuit,
4 indicates a display LED. R ₁ and C ₁ form a differentiating circuit, and are connected to the clear terminal of counter 2. Figures 2 and 3 show the same and different frequencies of the input signals in Figure 1, respectively. This is a timing chart of the signals at points A to F.

First, we will discuss the case where the frequencies of the input signals are equal or very close. In this case, the first
In the figure, the frequencies of the output pulses of counter 1 and counter 2 are equal, and by clearing counter 2 at the falling edge of the output pulse of counter 1 by the differentiating circuit of R ₁ and C ₁ , the phases are also almost the same. Therefore, as shown in Fig. 2, the duty ratio of the output signal F of the exclusive OR circuit 3 is at most 1/16 or less, and the outputs of the integration circuits R ₂ and C ₂ are at a very low level. . On the other hand, when the frequencies of the two input signals are different, as shown in FIG. The duty ratio of F increases by that amount, and the output voltages of the integrating circuits R ₂ and C ₂ increase.
Figure 3 shows a case where the frequency of signal B is lower than the frequency of signal A, but in the reverse case as well, the waveform of signal E deviates greatly from the waveform of signal C, so the duty ratio of signal F is As expected, the output voltage of the integrating circuit increases. Integrating circuit R ₂ ,
When the output voltage of C ₂ increases, TR ₁ detects this and the indicator LED ₄ lights up to indicate that the frequencies of the two input signals have shifted. In this embodiment, the detection limit is a frequency difference of 1/16 of the input signal frequency, but the detection limit can be further reduced by increasing the number of bits of the frequency dividing counter. Also,
If you change the division ratio of counter 1 and counter 2, 2
It is also possible to detect a state in which the frequencies of two input signals have a constant ratio.

Effects of the Invention As is clear from the description of the above embodiments, the frequency comparison circuit according to the present invention operates in principle based on the ratio of two input signal frequencies, and therefore operates stably over a wide frequency range. It can be realized with an extremely simple circuit configuration compared to conventional methods,
It is highly practical for frequency detection applications in various signal processing circuits, such as detecting the lock state of PLL circuits.

[Brief explanation of the drawing]

The accompanying drawings illustrate embodiments of the invention, and
Figure 1 shows its schematic circuit diagram, Figures 2 and 3
Each figure shows a timing chart at each point in FIG. 1 when the frequencies of the two input signals are equal and when the frequencies are different. 1 and 2...4-bit binary counter, 3
...Exclusive OR circuit, 4...Display LED.

Claims (1)

[Claims] 1 Frequency divider circuits A and B that divide the frequency of two digital signals by an integer, respectively, and frequency divider circuit B that is set to an initial state periodically at the rise or fall of the output pulse of the frequency divider circuit A. an exclusive OR circuit that outputs the exclusive OR of the respective outputs of the frequency divider circuits A and B; an integration circuit that smoothes the output of the exclusive OR circuit; A frequency comparison circuit comprising a voltage comparison circuit that operates when the output exceeds a certain set value.