JPS6310441B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an input signal switching device with a duplex configuration, and more particularly to an input signal switching device configured so as not to cause a large disturbance to a control system when switching signals.

Signals are multiplexed in important parts of plant control systems. For example, in a nuclear power plant, signals are triplexed and the correct signal is selected by majority vote. Duplicating signals is performed in plants that do not require as much reliability as nuclear plants, or in plants that require reliability but cannot afford to spend much on instrumentation. In a duplex system, it is not possible to determine which signal is correct as in the case of a triplex system. Therefore, when the deviation between the two signals suddenly increases, the operator normally switches to the signal side that is considered to be correct. In such conventional methods, even if it is possible to switch to the correct signal, it is impossible to avoid the influence of disturbances that occur at the time of switching.

The present invention has been made in view of these points, and it is possible to output the signal that is considered safe when one of the dual signals suddenly changes, or output the signal (intermediate value) at the time of the sudden signal change. In this embodiment, an input signal holding/switching device is realized in which a circuit is provided to eliminate the influence of disturbances occurring during switching. Hereinafter, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is an electrical configuration diagram showing an embodiment of the present invention. In the figure, 1 to 3 are each a signal
Input terminals e ₁ to e ₃ are input terminals, 4 is the duplex signal e ₁ and
This is a deviation monitor that determines whether the difference with e ₂ is within the tolerance. This deviation monitor is a dual signal
The difference ΔH between e ₁ and e ₂ is the smaller value L of e ₁ and e ₂
For example, when the amount exceeds 0.5%, an alarm is output. Originally, e ₁ and e ₂ are signals from the same point, so theoretically they should match, but
Since the instrumentation routes are different, discrepancies occur due to instrumental differences. Taking these circumstances into consideration,
For example, the tolerance is set to 0.5%.

5 is a first low selector that receives the first signal e ₁ and second signal e ₂ ; 6 is a second low selector that receives the second signal e ₂ and third signal e _{3; 7 is a second low selector that receives the second signal e 2 and third signal e 3} ; A third low selector receives the third signal _e3 and the first signal _e1 , and 8 is a high selector that receives the outputs of the first to third low selectors. Contacts to which the first to third signals are connected as they are are contacts to which the output of the high selector 8 is connected, and SW is a switch for selecting one of these contacts. The output Vo of the switch becomes the output of the device of the present invention. 9 is a delay element that receives the output of the switch SW, and its output is connected to the input terminal ₃ as the third signal e3. The delay element 9 is provided to stabilize the system. The operation of the device configured as described above will be explained as follows.

First, the operation during normal operation will be explained. FIG. 2 is a diagram showing the operation during normal operation. When the dual signals e ₁ and e ₂ are stable and do not change,
The third signal e ₃ matches either e ₁ or e ₂ . Next, the operation when the signal increases will be explained. Assuming that e ₃ matches e ₂ when the signal is stable, when the signal increases, e ₃ follows e ₂ with a delay of the delay time, as shown in f ₁ . FIG. 3 is a diagram showing the signal flow at this time. In the figure, the thick line indicates the signal (the same applies hereafter).

On the other hand, if e ₃ is equal to e ₁ when the signal is stable, when the signal increases, e ₃ exhibits a flat characteristic as shown by f ₂ from the time the signal increases, and eventually the e ₂ side Switch to. That is, when the signal increases, e ₃ always matches the smaller signal. FIG. 4 is a diagram showing the signal state of the _f2 portion showing flat characteristics. An explanation will be added regarding Fig. 4. e ₁ and
e ₃ collides with each other at the third low selector, but e ₃
Since it is delayed by a certain amount of time than e ₁ , e ₁ > e ₃ . Therefore, e ₃ is output from the third low selector, and the following high selector 8 outputs e ₃ which is the maximum signal.
is selected and output. _e3 is fed back to the input side via delay element 9. From then on, e ₃ forms a loop as shown in the figure, so its value remains constant, and this state continues until e ₂ increases and catches up with e ₃ .

Next, the operation when the signal decreases will be explained. e ₃ is
Assuming that e matches ₁ , when the signal decreases,
e ₃ follows with a delay of the delay time as shown in FIG. FIG. 5 is a diagram showing the signal flow at this time. That is, when the signal decreases, e ₃ matches the larger signal. Even if e ₃ matches e ₂ when the signal is stable, as the signal begins to decrease, e ₃ matches the larger signal e ₁ . _f3 is a diagram showing the movement of the signal at this time, and the flow of the signal at this time constitutes a loop similar to that shown in FIG. Then, when e ₃ collides with e ₁ , it follows e ₁ and decreases.

The signal switching operation when a sudden signal change occurs in a device exhibiting such an operation will be described below. FIG. 6 is a diagram showing a switching operation during signal conversion.
The figure shows four sudden change states a to d.
Each case will be explained below using examples. First, a is a case where e ₁ increases rapidly while e ₃ follows e ₂ and increases. In this case, since the circuit of the present invention is configured to match the smaller signal when the signal increases, e ₃ becomes e ₂ regardless of the sudden change in e ₁ .
follow. e ₂ is output as the output Vo.
In general, if a sudden change like a is a sudden change in the process itself, e ₂ should also change suddenly like e ₁ , so it is reasonable to operate in this way.

Figure b shows a case where e ₁ decreases rapidly, contrary to figure a. At this time, since e ₁ <e ₂ at the point of sudden change, the circuit shown in FIG. 1 forms a loop as shown in FIG. 4, and e ₃ is output as the output Vo. At this time, e ₃ retains the value at the time of sudden change (intermediate value). On the other hand, since an alarm is generated from the deviation monitor 4, the operator repairs the failure in any signal system (probably the _e1 route). During this time,
Since the output Vo is held at a constant value, no disturbance is caused to the system.

Figure c shows a case where e ₃ follows e ₁ and e ₁ suddenly increases while the signal is decreasing. At this time, _e3 is held from the time of the signal sudden change, and this held intermediate value is output. Figure d shows the case where e ₁ suddenly decreases. In this case, e ₃ switches from e ₁ to e ₂ at the sudden change point, and Vo switches from e ₁ to e ₂ . In this case as well, as explained for a, it is safe because e ₃ follows the slower signal change.

As explained in detail above, according to the present invention, a circuit is provided that outputs the signal that is considered safe when one of the duplicated signals changes suddenly, or outputs the intermediate value when the signal suddenly changes. Thus, it is possible to realize an input signal holding and switching device that eliminates the influence of disturbances that occur during switching.

[Brief explanation of the drawing]

Fig. 1 is an electrical configuration diagram showing an embodiment of the present invention, Fig. 2 is a diagram showing the operation during normal operation, Figs. 3 to 5 are diagrams showing the flow of signals, and Fig. 6 is a diagram showing the signal flow. It is a figure which shows the switching operation at the time of a sudden change. 1 to 3...Input terminal, 4...Deviation monitor, 5 to 7...
Low selector, 8...high selector, 9...delay element, SW...switch.

Claims (1)

[Claims] 1: a signal input section receiving first to third signals e ₁ to _{e 3} ; a first low selector 5 receiving first signal e ₁ and second signal e ₂ ; a second low selector 6 receiving the second signal e ₂ and the third signal e ₃ ; a third low selector ₇ receiving the first signal e ₁ and the third signal e 3; a high selector 8 that receives the output signals of the third to third low selectors, and a switch circuit SW that selects any one of the signals from the high selector and the first to third signals _e1 to _e3 .
and a feedback circuit that feeds back the output of the switch circuit as the third signal via a delay element 9, and obtains the output of the switch circuit SW as the output signal.