JPS6311773B2 - - Google Patents
Info
- Publication number
- JPS6311773B2 JPS6311773B2 JP54154039A JP15403979A JPS6311773B2 JP S6311773 B2 JPS6311773 B2 JP S6311773B2 JP 54154039 A JP54154039 A JP 54154039A JP 15403979 A JP15403979 A JP 15403979A JP S6311773 B2 JPS6311773 B2 JP S6311773B2
- Authority
- JP
- Japan
- Prior art keywords
- gaas
- insulating film
- oxidation
- mos
- capacitance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6302—Non-deposition formation processes
- H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
- H10P14/6314—Formation by oxidation, e.g. oxidation of the substrate of a metallic layer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01358—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being a Group III-V material
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6302—Non-deposition formation processes
- H10P14/6324—Formation by anodic treatments, e.g. anodic oxidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6938—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
- H10P14/6939—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
- H10P14/69391—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing aluminium, e.g. Al2O3
Landscapes
- Formation Of Insulating Films (AREA)
Description
【発明の詳細な説明】
本発明は半導体基板への絶縁膜形成法に関し、
特にGaAs基板へAlの酸化膜を形成する方法に関
するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming an insulating film on a semiconductor substrate,
In particular, it relates to a method of forming an Al oxide film on a GaAs substrate.
GaAs基板に絶縁膜を形成することによる
GaAs表面の不動態化(パツシペーシヨン)は、
MOS型電界効果トランジスタのゲート絶縁膜形
成あるいは種々の電子デパイスや発光・受光素子
の表面保護に極めて重要な意義を有している。そ
こで、近年この種の絶縁膜形成法について盛んに
研究されており、その方法は大別してGaAsの一
部を直接酸化する方法と他の絶縁膜を装荷する方
法に大別される。熱酸化法、電解溶液中での陽極
酸化法あるいはプラズマ酸化法などが前者の例で
あり、CVD法、スパツタリング法、真空蒸着法、
分子線蒸着法あるいはグロー放電法などが後者の
例である。そして、絶縁物材料としてはSiO,
SiO2,Si3N4,SiO2/Si3N4,SiN,SiON,
Al2O3,SiO2/Al2O3,PSG,GaN,Ta2O5など
が使用される。 By forming an insulating film on a GaAs substrate
Passivation of GaAs surface is
It has extremely important significance in forming gate insulating films of MOS field effect transistors and protecting the surfaces of various electronic devices and light emitting/receiving elements. Therefore, in recent years, this type of insulating film formation method has been actively researched, and the methods can be broadly divided into two methods: a method of directly oxidizing a part of GaAs, and a method of loading another insulating film. Examples of the former include thermal oxidation, anodic oxidation in an electrolytic solution, or plasma oxidation; CVD, sputtering, vacuum evaporation,
Examples of the latter include molecular beam evaporation and glow discharge. And, as the insulating material, SiO,
SiO 2 , Si 3 N 4 , SiO 2 /Si 3 N 4 , SiN, SiON,
Al2O3 , SiO2 / Al2O3 , PSG , GaN, Ta2O5 , etc. are used.
ところで、この種の絶縁膜に要求される特性で
最も重要なものの一つは、絶縁膜と半導体との界
面準位密度が充分に低いことであり、特にMOS
FETのゲート絶縁膜に用いようとする場合は、
このことが本質的に重要で、界面準位密度が大き
いと相互コンダクタンスが小さくなるという欠点
が生ずる。また界面準位が著しく大きいと表面反
転が起こらず、反転型のMOS FETとしての機
能を果たすことができなくなる。 By the way, one of the most important properties required for this type of insulating film is that the interface state density between the insulating film and the semiconductor is sufficiently low, especially in MOS
When using it as a gate insulating film for FET,
This is essentially important, as a large interface state density results in a disadvantage that the mutual conductance becomes small. Furthermore, if the interface state is extremely large, surface inversion will not occur and the device will not be able to function as an inversion type MOS FET.
しかしながら、前述した従来の絶縁膜形成法で
は、絶縁膜と半導体との界面に多量の界面準位が
存在している。即ち、界面特性を知るために
MOSダイオードを製作しその容量―電圧特性
(以下CV特性という)を測定する方法が知られて
いるが、従来方法により製作したものでは、その
CV特性が大きなヒステリシスを示し、また容量
の変化領域における傾きの最大値が小さく然も容
量変化の絶縁値も小さくなつて、明らかに界面準
位密度の大きいことが確認されている。また、界
面準位密度が充分に低く反転の現象が起きる場合
には、少数キヤリアが応答する低周波領域で、
MOS容量は酸化膜容量まで増加することが知ら
れているけれども、従来方法によるMOSダイオ
ードでは容量の増加は示さない。即ち、反転を起
こさないという欠点がある。 However, in the conventional insulating film forming method described above, a large amount of interface states exist at the interface between the insulating film and the semiconductor. In other words, in order to know the interfacial properties
There is a known method of fabricating MOS diodes and measuring their capacitance-voltage characteristics (hereinafter referred to as CV characteristics), but those manufactured using conventional methods cannot
It has been confirmed that the CV characteristics exhibit large hysteresis, and that the maximum value of the slope in the capacitance change region is small and the insulation value of capacitance change is also small, clearly indicating a large interface state density. In addition, if the interface state density is low enough to cause an inversion phenomenon, in the low frequency region where minority carriers respond,
Although it is known that MOS capacitance increases up to oxide film capacitance, conventional MOS diodes do not show any increase in capacitance. That is, there is a drawback that no reversal occurs.
このように従来の絶縁膜形成法では、絶縁膜と
半導体との界面準位密度を充分に小さくすること
ができず、従つて電子デパイス等の実際の製作に
適用することが困難であつた。 As described above, the conventional insulating film forming method cannot sufficiently reduce the interface state density between the insulating film and the semiconductor, and is therefore difficult to apply to the actual manufacture of electronic devices and the like.
本発明はこのような従来の欠点を改善したもの
であり、その目的は、GaAs基板への界面準位密
度の極めて低い絶縁膜形成法を提供することにあ
る。本発明を簡単に説明すると、まず表面処理し
たGaAs基板もしくは半導体層上に、Alを所望の
厚さに真空蒸着する。次いで、これを例えば電解
溶液を用いて陽極酸化し、Alを絶縁体である酸
化物に変える。このとき、Alが完全に陽極酸化
されるように然もGaAsがあまり陽極酸化されな
いように、即ち、陽極酸化がちようどGaAsとAl
との界面まで達するようにすることが大切であ
る。一般に、同一の陽極酸化条件では、Alの酸
化膜厚と陽極電圧とは比例し、陽極電圧により酸
化膜厚を制御することが可能であるから、これを
利用して陽極酸化が上述した範囲で為されるよう
制御することができる。そして最後にGaAs及び
Alの酸化物を熱処理すれば、界面準位密度を極
めて低く押えた状態でGaAs上にAlの酸化物を形
成することができる。 The present invention improves these conventional drawbacks, and its purpose is to provide a method for forming an insulating film on a GaAs substrate with an extremely low density of interface states. Briefly explaining the present invention, first, Al is vacuum-deposited to a desired thickness on a surface-treated GaAs substrate or semiconductor layer. Next, this is anodized using, for example, an electrolytic solution to convert Al into an oxide, which is an insulator. At this time, make sure that Al is completely anodized but GaAs is not anodized too much.
It is important to reach the interface with the Generally, under the same anodic oxidation conditions, the thickness of the Al oxide film is proportional to the anodic voltage, and the oxide film thickness can be controlled by the anode voltage.Using this, it is possible to maintain the anodic oxidation within the above range. can be controlled so that it is done. And finally GaAs and
By heat-treating the Al oxide, it is possible to form the Al oxide on GaAs while keeping the interface state density extremely low.
次に具体的に数値を掲げて本発明の実施例につ
いて詳細に説明する。 Next, examples of the present invention will be described in detail using specific numerical values.
GaAs基板(キヤリア濃度6.6×1017cm-3のP型
GaAs)を通常用いられる方法で脱脂洗浄し、エ
ツチングを行なつて表面処理した後、その表面に
Alを厚さ800Åに真空蒸着した。次に、これを酒
石酸、エチレングリコール及び水の混合液を用い
て陽極酸化し、Alを絶縁体であるAlの酸化物に
変化させた。このときの陽極電圧は、Alのみが
陽極酸化されるように125Vとした。また、この
陽極酸化には定電流源を用い、3mA/cm2の電流
密度で行なつた。 GaAs substrate (P type with carrier concentration 6.6×10 17 cm -3
After degreasing and cleaning the surface (GaAs) using a commonly used method and etching the surface,
Al was vacuum deposited to a thickness of 800 Å. Next, this was anodized using a mixture of tartaric acid, ethylene glycol, and water to change the Al into an oxide of Al, which is an insulator. The anode voltage at this time was set to 125V so that only Al was anodized. A constant current source was used for this anodic oxidation at a current density of 3 mA/cm 2 .
次に、これをN2雰囲気中において400℃で30分
間熱処理を施した。尚、熱処理温度は熱処理時間
によつても異なるが、30分間の熱処理に対して
は、300℃未満の熱処理では界面準位密度が大き
くなり反転が起きないことが確認された。また
500℃より高い温度での熱処理では、電圧印加時
に絶縁膜が絶縁破壊を起こし易くなることも確認
された。従つて、実用上好ましい範囲としては、
ほぼ300℃〜500℃である。 Next, this was heat-treated at 400° C. for 30 minutes in a N 2 atmosphere. Although the heat treatment temperature varies depending on the heat treatment time, it was confirmed that heat treatment for 30 minutes at a temperature of less than 300°C increases the interface state density and does not cause inversion. Also
It was also confirmed that heat treatment at temperatures higher than 500°C makes the insulating film more likely to cause dielectric breakdown when voltage is applied. Therefore, the practically preferable range is as follows:
The temperature is approximately 300℃~500℃.
以上のようにして形成したAl酸化物上にメタ
ルマスクを用いてAl電極を蒸着しまた裏面に
AuGeNiを蒸着してMOSダイオードを製作し、
そのCV特性を測定した結果を第1図の線図に示
す。なお同図に於いて横軸は印加電圧、縦軸は容
量を示す。同図から明らかなように、本実施例方
法で製造したMOSダイオードのCV特性は、各周
波数領域(図では5Hz,50Hz,500Hz,5KHz,
50KHzの測定結果を示す)においてヒステリシス
が小さく、また容量変化の絶対値が大きい等、界
面準位密度が極めて低い場合の特性を示してい
る。更に、順方向の印加電圧に対し低周波で容量
が絶縁膜容量まで増加しており、明らかに反転の
特性を示している。 An Al electrode was deposited on the Al oxide formed in the above manner using a metal mask, and the back side was
Fabricate a MOS diode by vapor depositing AuGeNi,
The results of measuring the CV characteristics are shown in the diagram of FIG. In the figure, the horizontal axis represents applied voltage and the vertical axis represents capacitance. As is clear from the figure, the CV characteristics of the MOS diode manufactured by the method of this example are in each frequency range (in the figure, 5Hz, 50Hz, 500Hz, 5KHz,
The hysteresis is small and the absolute value of capacitance change is large at 50KHz measurement results), indicating characteristics when the interface state density is extremely low. Furthermore, the capacitance increases to the insulating film capacitance at low frequencies with respect to the applied voltage in the forward direction, clearly showing an inversion characteristic.
第2図及び第3図は、陽極酸化終了時の陽極電
圧が85V及び150Vである以外は、全て上記実施
例の試料と同一条件で製造したMOSダイオード
のCV特性を示している。第2図の試料は、陽極
電圧が85Vと低いことからAlの酸化が完全に終了
しておらず、絶縁膜と半導体との間に金属を挾み
込んだ構造をしている為、容量はほとんど変化し
ていない。従つて、MOS FETのゲート電極等
には使用することができない。また第3図の試料
は、陽極電圧が高い為にGaAs内部まで陽極酸化
され、その結果、低周波での容量の増加は見られ
ず反転特性を示してない。 FIGS. 2 and 3 show the CV characteristics of MOS diodes manufactured under the same conditions as the samples of the above embodiments, except that the anode voltages at the end of anodization were 85 V and 150 V. In the sample shown in Figure 2, the anode voltage is as low as 85V, so the oxidation of Al has not completed completely, and the structure has a metal sandwiched between the insulating film and the semiconductor, so the capacitance is low. Little has changed. Therefore, it cannot be used as a gate electrode of a MOS FET. In addition, the sample shown in FIG. 3 is anodized to the inside of GaAs due to the high anode voltage, and as a result, no increase in capacitance at low frequencies is observed and no inversion characteristics are observed.
以上の結果から判るように、本発明においては
陽極酸化をどこで停止させるかが重要であり、
Alの酸化がちようど終了するところまで陽極酸
化を行なうことによつてのみ界面準位密度の小さ
い絶縁膜を得ることができるものである。但し、
実験に依れば、陽極電圧がAlの酸化がちようど
終了する電圧値とその1.1倍程度の電圧値との間
の範囲にあれば、即ち、GaAsが多少酸化された
場合であつても、界面準位密度は充分小さく押え
られ、反転を起こすに充分であることが確認され
ている。またAlとGaAsの陽極酸化の速度が異な
るため、陽極電圧の時間変化を記録計に書かせる
と、Alの酸化終了前と終了後とでその傾きが異
なる。従つてAlの酸化の終点を簡単に検出する
ことができる。またAlとGaAsの表面反射率が異
なるため、酸化膜の下がAlのときは干渉色は示
さないが、下がGaAsのときは干渉色を示す。従
つて干渉色が見えはじめることはAlの酸化が終
了したことを示しており、光学的にAlの酸化の
終了を検出することもできる。このようなことか
ら陽極酸化の停止制御は思いのほか簡単に行なう
ことができる。 As can be seen from the above results, in the present invention, it is important to know where to stop the anodic oxidation.
An insulating film with a low interface state density can only be obtained by carrying out anodic oxidation until the oxidation of Al ends. however,
According to experiments, if the anode voltage is in the range between the voltage value at which Al tends to oxidize and a voltage value about 1.1 times that voltage, that is, even if GaAs is slightly oxidized, It has been confirmed that the interface state density is suppressed to a sufficiently low level and is sufficient to cause inversion. Furthermore, since the rates of anodic oxidation of Al and GaAs are different, when the time change of the anode voltage is recorded on a recorder, the slope is different before and after the oxidation of Al is completed. Therefore, the end point of Al oxidation can be easily detected. Also, since the surface reflectance of Al and GaAs is different, interference colors are not shown when the oxide layer is Al underneath, but interference colors are shown when the bottom is GaAs. Therefore, the beginning of the appearance of interference colors indicates that the oxidation of Al has ended, and the end of the oxidation of Al can also be detected optically. For this reason, it is possible to control the stoppage of anodic oxidation more easily than expected.
尚、本発明は、GaAs上に蒸着されたAlをちよ
うど界面まで低温中で陽極酸化することが本質で
あり、従つて、先の実施例に述べた陽極酸化法の
みに限定されず、その他の手法たとえばプラズマ
酸素中での陽極酸化法によつても本発明の目的を
達成することが可能である。 The essence of the present invention is to anodize Al deposited on GaAs at a low temperature right up to the interface, and therefore is not limited to the anodic oxidation method described in the previous embodiment. It is also possible to achieve the object of the invention by other methods, such as anodization in plasma oxygen.
以上説明したように、本発明は、GaAsにAlを
真空蒸着し、次にAlの酸化がちようど終了し終
わるまで陽極酸化し、その後熱処理する工程を含
むものであり、反転の特性が得られることからも
明らかなように、界面準位密度を非常に小さくす
ることができる効果がある。従つて、MOS型電
界効果トランジスタのゲート絶縁膜あるいはその
他各種の電子デバイスの表面保護膜形成に実用化
し得るものであり、その工業的価値は極めて大き
なものである。 As explained above, the present invention includes a step of vacuum-depositing Al on GaAs, then anodizing until the oxidation of Al is completed, and then heat-treating, thereby obtaining inverted characteristics. As is clear from the above, there is an effect that the interface state density can be made extremely small. Therefore, it can be put to practical use in forming gate insulating films of MOS type field effect transistors or surface protective films of various electronic devices, and its industrial value is extremely large.
第1図は本発明の絶縁膜形成法を用いて製作し
たGaAs MOSダイオードのCV特性を示す線図、
第2図及び第3図は陽極酸化最終電圧のみを第1
図の場合と異ならせて製作したGaAs MOSダイ
オードのCV特性を示す線図である。
Figure 1 is a diagram showing the CV characteristics of a GaAs MOS diode manufactured using the insulating film forming method of the present invention.
Figures 2 and 3 show only the final voltage of anodization.
FIG. 2 is a diagram showing the CV characteristics of a GaAs MOS diode manufactured differently from the case shown in the figure.
Claims (1)
に前記Alの酸化がちようど終了し終わるまで陽
極酸化する工程と、該工程後に熱処理する工程と
を含むことを特徴とする半導体基板への絶縁膜形
成法。1. Insulating a semiconductor substrate characterized by comprising the steps of vacuum evaporating Al on GaAs, anodic oxidation until the oxidation of Al is completed after the step, and heat treatment after the step. Film formation method.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15403979A JPS5676539A (en) | 1979-11-28 | 1979-11-28 | Formation of insulating film on semiconductor substrate |
| GB8037987A GB2064219B (en) | 1979-11-28 | 1980-11-27 | Method of forming an insulating film on a semiconductor substrate |
| FR8025340A FR2471047B1 (en) | 1979-11-28 | 1980-11-28 | METHOD FOR FORMING AN INSULATING FILM ON A SEMICONDUCTOR SUBSTRATE, AND SEMICONDUCTOR DEVICE THUS OBTAINED, IN PARTICULAR A FIELD-EFFECT TRANSISTOR |
| DE19803044961 DE3044961A1 (en) | 1979-11-28 | 1980-11-28 | METHOD FOR FORMING AN INSULATING FILM ON A SEMICONDUCTOR SUBSTRATE AND THE PRODUCTS OBTAINED THEREOF |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15403979A JPS5676539A (en) | 1979-11-28 | 1979-11-28 | Formation of insulating film on semiconductor substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5676539A JPS5676539A (en) | 1981-06-24 |
| JPS6311773B2 true JPS6311773B2 (en) | 1988-03-16 |
Family
ID=15575572
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15403979A Granted JPS5676539A (en) | 1979-11-28 | 1979-11-28 | Formation of insulating film on semiconductor substrate |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JPS5676539A (en) |
| DE (1) | DE3044961A1 (en) |
| FR (1) | FR2471047B1 (en) |
| GB (1) | GB2064219B (en) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3681147A (en) * | 1970-01-22 | 1972-08-01 | Ibm | Method for masking semiconductor regions for ion implantation |
| DE2932569C2 (en) * | 1979-08-10 | 1983-04-07 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Method for reducing the density of the rapid surface states in MOS devices |
-
1979
- 1979-11-28 JP JP15403979A patent/JPS5676539A/en active Granted
-
1980
- 1980-11-27 GB GB8037987A patent/GB2064219B/en not_active Expired
- 1980-11-28 DE DE19803044961 patent/DE3044961A1/en not_active Withdrawn
- 1980-11-28 FR FR8025340A patent/FR2471047B1/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| FR2471047A1 (en) | 1981-06-12 |
| JPS5676539A (en) | 1981-06-24 |
| FR2471047B1 (en) | 1985-10-25 |
| GB2064219A (en) | 1981-06-10 |
| GB2064219B (en) | 1984-02-15 |
| DE3044961A1 (en) | 1981-09-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6075691A (en) | Thin film capacitors and process for making them | |
| CA1159917A (en) | Capacitor structures with dual dielectrics | |
| US5349494A (en) | Semiconductor device with capacitor insulating film and method for fabricating the same | |
| JPH0379869B2 (en) | ||
| Kaplan et al. | Chemical Vapor Deposition of Tantalum Pentoxide Films for Metal‐Insulator‐Semiconductor Devices | |
| US4751200A (en) | Passivation of gallium arsenide surfaces with sodium sulfide | |
| Meng et al. | Leakage mechanisms and dielectric properties of Al 2 O 3/TiN-based metal-insulator-metal capacitors | |
| US3397446A (en) | Thin film capacitors employing semiconductive oxide electrolytes | |
| JPH0722183B2 (en) | Method for manufacturing dielectric layer for semiconductor device | |
| JPS6311773B2 (en) | ||
| Okamura et al. | Hysteresis free SiO2/InSb metal‐insulator‐semiconductor diodes | |
| Ma et al. | MIS structures based on spin‐on SiO2 on GaAs | |
| KR100585114B1 (en) | Capacitor of semiconductor device having high dielectric film made of VTS or VAT material and manufacturing method thereof | |
| JPS6214093B2 (en) | ||
| JPH084087B2 (en) | InSb element manufacturing method | |
| Katsuta et al. | Dc and ac conduction in amorphous titanium dioxide thin films | |
| GB2064218A (en) | A method of Forming an Insulating Film on a Semiconductor Device | |
| Gosney et al. | Aluminum oxide films made from evaporated sapphire | |
| JPH03212976A (en) | Treatment method of cis structure containing transparent conductive oxide film | |
| KR19990023842A (en) | Capacitor and Thin Film Capacitor Manufacturing Method | |
| Bayraktaroglu et al. | Study of the properties of GaAs–anodic Al2O3 interfaces | |
| JPH0353787B2 (en) | ||
| JP3430850B2 (en) | Three-terminal nonlinear element and method of manufacturing the same | |
| SU1397970A1 (en) | Method of manufacturing storage cell | |
| US6413787B1 (en) | Method for fabricating dielectric film |