JPS6315652B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a PCM recording/playback device that automatically restores normal operation after a malfunction.

In conventional digital circuits, there is a reset circuit that performs reset by opening and closing a power switch;
Alternatively, a manual reset switch is provided to perform the initial reset. Therefore,
If the circuit malfunctions due to noise or the like during operation, the power switch or reset switch must be operated to restore normal operation.
If a malfunction like this occurs in a PCM recording/playback device, all subsequent signals will be erroneous, so it will have to be reset again, but if it is necessary to obtain it at that time, it will pose a major functional problem.

The purpose of the present invention is to eliminate the above-mentioned drawbacks of the prior art, and to provide a PCM recording and playback system that is automatically reset without the need for a circuit even if a circuit malfunctions, and that stabilizes the operation during recording and playback. We are in the process of providing equipment.

The present invention provides a signal generating device that generates a reset signal at regular intervals based on a television vertical synchronization signal, and uses this signal to reset write and read address counters every vertical period.

Hereinafter, the present invention will be explained in detail with reference to the drawings.

FIG. 1 shows one embodiment of the present invention, and is a system block diagram of a recording section of a PCM recording and reproducing apparatus. In the figure, reference clock 1 is used to generate a sampling signal, a TV synchronization signal, a write clock, and a read clock based on the reference clock. 11 performs digital encoding of the input analog signal. The encoded signal is temporarily stored in the shift register 12 and then stored in the memory 10 by the write clock generated by the write clock generating circuit 3. On the other hand, according to the synchronization signal generated by the TV synchronization signal generation circuit 4, a readout clock is generated in the readout clock generation circuit 6, the data is read out from the memory 10, and the data is added to the TV synchronization signal in the output circuit 13 to generate a video signal. Output.

7 is a write address counter, and 8 is a read address counter, one of which is selected by a multiplexer 9 to designate the address of the memory 10. 5 is a reset signal generation circuit according to the present invention, which is realized by a commonly used vertical synchronization separation circuit or the like. This signal is connected to the address counters 7 and 8 to reset them.

A PCM recording/playback device time-compresses data obtained by sampling during the vertical period of a television synchronization signal and sends it out as a video signal.
The amount of time compression determines the amount of memory required. Figure 2 shows this relationship in a time chart.
14 is a sampling signal, and 15 is an output that is time-compressed and sent out.

Here, if the capacity of the memory 10 is set to an integer ratio of the total number of bits of data sent out during one vertical period, the write and read counters 7 and 8 will always indicate a constant address after the end of one vertical period. become. Therefore, if the address counter is set so that a fixed address is set by the reset signal, and the reset signal is sent once per vertical period, the address set by the reset and the clock can be counted during normal operation. The operation is performed in accordance with the address obtained by . In this circuit, if the address counter malfunctions due to noise, etc., all subsequent data will be erroneous, but the address counter will be set to a normal value by the next reset signal, so it will start operating normally again. . The reset signal is shown at 16 in FIG. 2, and the noise is shown at 17.

Although the recording circuit has been described in this embodiment, it can also be used in the playback circuit to reset both address counters every vertical period when digital data written in the memory is time expanded and played back. , and is effective.

As described above, in the present invention, by providing a reset signal generation circuit synchronized with the television vertical synchronization signal, it is possible to stabilize the operation in which the circuit is reset every vertical period, thereby improving performance. This contributes to

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the recording section of the PCM recording/playback device according to the present invention, and FIG.
This is a time chart. 4... TV synchronization signal generation circuit, 5... Reset signal generation circuit, 7... Write address counter, 8
...Read address counter, 10...Memory, 1
4...Sampling signal, 15...Output data, 16
...Reset signal, 17...Noise.

Claims (1)

[Claims] 1. It has a memory for storing digitized signals, an address counter for specifying a write address of this memory, and an address counter for specifying a read address, and the digital data of one vertical period of a television synchronization signal is stored in the memory. This memory is used to obtain and record time-compressed output, and the reproduced data is time-expanded and played back using this memory.
The PCM recording/playback device has a signal generation circuit that generates a reset signal for resetting both of the above address counters at regular intervals with reference to the television vertical synchronization signal, and the reset signal generated by this signal generation circuit resets both of the address counters. A PCM recording/playback device characterized in that an address counter of a PCM is reset every vertical period.