JPS6318340B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device formed on an amorphous substrate. For example, it is used in self-scanning photoelectric conversion devices for facsimiles, scanning circuits for liquid crystal flat display devices, and the like.

With the full-scale development of large area or long image devices, there is a demand for large area or long active element arrays.

For example, recently, attempts have been made to lengthen one-dimensional light-receiving element arrays for image reading in the transmitting section of facsimile machines. Conventionally, a MOS type or CCD type (charge transfer type) silicon sensor has been used as a one-dimensional light receiving element array. However, the sensor length is currently 30 mm, and the limit of the sensor length that can be produced technically is determined by the size of the single crystal silicon wafer that can be produced.
It is about mm. In any case, the image is reduced using a lens optical system, and the document width (for example, A4 size, 210
There is no choice but to adopt a method of reading with a shorter sensor (mm). In this case, the optical path length is long, for example 200 mm,
This is a major cause that prevents miniaturization of devices. Recently, with the aim of downsizing devices, development of one-dimensional photodetector arrays using close-contact reading has gained momentum. This replaces silicon sensors.
This method uses a thin film photodiode array such as Se-As-Ts or CdS to realize a one-dimensional sensor with a length equal to the width of the original, and reads the image by bringing the original into close contact with the sensor. Since this method does not use a lens optical system, it is possible to miniaturize the device, and it also has the following advantages: it is easy to adjust the optical system, there is no problem with blurring around the lens periphery, and high resolution is possible. It has the following characteristics. However, because there is no suitable long active element array, it is difficult to realize a long self-scanning sensor that integrates the sensor part and the scanning circuit part, and this makes it difficult to realize the long self-scanning sensor that integrates the sensor part and the scanning circuit part. This is a major obstacle to the practical application of shaku sensors. In order to realize a self-scanning long sensor, the development of a long active element array suitable for this purpose is awaited.

Another example is the development of liquid crystal display devices and electroluminescent display devices as thin image display devices that can replace conventional cathode ray tubes.
Prototypes of display devices combined with thin film transistor arrays of CdSe and the like and display devices combined with transistor arrays of single-crystal silicon integrated circuits are already being produced. In the former case, there are problems such as the inability to realize a defect-free thin film transistor array and the unstable operating characteristics of the thin film transistors. Also, in the latter case,
Because there is a limit to the size of single-crystal silicon wafers that can be manufactured, the current maximum element size limit is 75 mm x 75 mm, which is too small when considering application to flat panel televisions. In order to apply liquid crystal display devices and electroluminescent display devices to flat panel televisions, the development of a suitably large-area active element array is awaited.

An object of the present invention is to provide a method of forming a practical polycrystalline silicon film using an amorphous substrate at a low substrate temperature, and forming a semiconductor device using the polycrystalline silicon film as a material. .

In order to achieve the above object, in the present invention,
Using an amorphous substrate such as glass, a polycrystalline silicon film is formed at low temperature and under high vacuum. Here, the term "substrate" refers to something that has physical strength by itself and can support itself. In the present invention, a light-transmitting substrate or a non-light-transmitting substrate is used as necessary.

As mentioned above, single crystal materials cannot be used to obtain large area or long semiconductor devices. Further, in order to obtain good operating characteristics, it is necessary to use a material with a mobility of about 1 cm ² /V·sec or more, so amorphous materials with low mobility are also inappropriate. Therefore, it is necessary to use a polycrystalline material as the raw material because it can be made into a large area and has a mobility of about 1 cm ² /V·sec or more. Among polycrystalline materials, polycrystalline silicon has the advantage that its physical and chemical properties are suitable for application to semiconductor devices, and that the highly developed technology of the silicon semiconductor industry can be used as is or with slight modification. Therefore, it is suitable as the semiconductor material of the present invention.

In particular, for application to image devices, it is desirable to have a structure in which a semiconductor device can be formed on a light-transmitting substrate such as glass if necessary. However, conventionally, the mobility was 1 cm ² /V・
In order to obtain a polycrystalline silicon film of sec or more, 900
It was necessary to go through a process at high temperatures of over ℃. For example, according to the low-temperature vapor phase growth method, the mobility of a polycrystalline silicon film formed at a growth temperature of 880°C is 1 cm ² /V.
less than sec. Therefore, in the conventional technology, the mobility is 1 cm ² /V not only on ordinary glass with a softening point temperature of 630°C, but also on super hard glass (JIS class 1 hard glass) with a softening point temperature of 820°C.・It was difficult to form a polycrystalline silicon film with a thickness of sec or more.

In the present invention, the degree of vacuum during vapor deposition is 1× in pressure.
A polycrystalline silicon film with a mobility of 1 cm ² /V・sec or more can be obtained by vacuum deposition at a substrate temperature lower than the softening point temperature of the glass used, by deposition in a high vacuum of less than 10 ^-8 torr. provide a way to obtain In particular, _O2 in the residual gas during deposition has a negative effect on material properties, so in the present invention, the oxygen partial pressure is set to 1×
Keep it below 10 ^-9 torr.

The deposition rate is usually 1000A/hour or more.
Use 10000A/hour. Preferably 1000A/
Hour to 4000A/hour is used.

Deposition rate issues are primarily related to source technology. That is, when trying to increase the deposition rate, the degree of vacuum tends to decrease at the same time. If the degree of vacuum can be maintained at a specified value, for example, 50000Å/
Hour or more may also be used. Also, the substrate temperature during vapor deposition is 400℃ or higher, preferably 500℃ or higher.
Use temperatures above ℃. A desired polycrystalline silicon film can be obtained by such a manufacturing method.

Although there are many details that are unclear as to why a desired high-quality polycrystalline silicon film can be formed by such a manufacturing method, it is speculated as follows. That is, it is thought that this is because residual gas molecules colliding with the substrate surface can be substantially ignored under the conditions of this manufacturing method.

In order to fabricate a semiconductor device by processing a polycrystalline silicon film, it is necessary to go through several steps, but in the present invention, the heat treatment temperature in these steps is set to 820°C, which is the softening point of ultra-hard glass. I held it lower. When a glass substrate with a low softening point is used, it is possible to keep the softening point even lower, for example, 550° C. or lower. In the following, a MOS field effect transistor will be described as an example of a semiconductor device.

Gate oxide films are generally obtained by thermal oxidation of silicon substrates, but thermal oxidation requires high temperatures of 1000°C or more, so it cannot be used for the current purpose. In the present invention, SiH ₄ and O ₂ are reacted at a temperature of 300°C to 500°C, or SiH ₄ and NO ₂ are reacted at a temperature of 400°C to 800°C,
A SiO ₂ film is grown in a vapor phase, and this vapor-grown SiO ₂
The film is used as a gate oxide film. SiO ₂ films obtained by vapor phase growth have conventionally been used to prevent deterioration, and have never been used as gate oxide films.

Furthermore, conventionally, in order to form a source region and a drain region, a method of forming a p ⁺ layer or an n ⁺ layer by thermal diffusion has been generally performed. However, this method requires heat treatment at about 1150°C, so it cannot be used for the current purpose.
In the present invention, instead of thermal diffusion, a method of forming a p ⁺ layer or an n ⁺ layer by ion implantation is used. After ion implantation, heat treatment is performed to activate electrically, but the heat treatment temperature is
It is necessary to keep the temperature lower than the softening point of the substrate used. Therefore, in the present invention, for example, by implanting ions such as BF ₂ ⁺ that can be highly activated by heat treatment at a low temperature of about 550°C, or by implanting B ⁺ ions, for example, a reverse annealing effect (reverse annealing effect) can be applied. 500℃ to 600℃ just before the annealing effect)
A method such as heat treatment at a temperature of about °C is adopted. In the case of P ⁺ ions, As ⁺ ions, etc., reverse
Although the annealing effect is not as pronounced as in the case of B ⁺ ions, heat treatment at about 500°C to 600°C can be sufficient to activate it. Therefore, both the p ⁺ layer and the n ⁺ layer can be formed in a low temperature process of about 500°C to 600°C. Of course, when using a substrate having a softening point higher than 800°C, such as ultra-hard glass, heat treatment may be performed at a temperature of 800°C.

Hereinafter, the present invention will be explained in detail with reference to Examples.

Example The first example describes a case where a polycrystalline silicon film is formed on a glass substrate and a p-channel MOS field effect transistor is created in this polycrystalline silicon.
This will be explained using the cross-sectional diagram for explaining the process in the figure.

First, the substrate is placed in a vacuum evaporation device capable of achieving an ultra-high vacuum. General equipment may be used. On a normal hard glass (JIS class 2 hard glass) substrate 1, the substrate temperature is 550°C, the degree of vacuum during evaporation is 9 × 10 ^-9 torr, the partial pressure of oxygen during evaporation is 1 × 10 ^-10 torr, and the deposition rate is 3000 Å/
A silicon film 2 is deposited to a thickness of 6000 Å by vacuum evaporation under conditions of 1 hour (FIG. 1a).
The formed silicon film 2 is n-type polycrystalline silicon and has a mobility greater than 1 cm ² /V·sec.
Next, a SiO ₂ film 3 is deposited to a thickness of 5000 Å by vapor phase growth at a substrate temperature of 415° C. (FIG. 1b). Next, as shown in FIG. 1c, windows for the source and drain regions are formed in this SiO ₂ film. Then 150KeV
A p ⁺ layer 4 was formed in ^the source and ^drain regions by implanting BF ₂ ⁺ ions with an energy of
form. Next, as shown in FIG. 1e, the SiO ₂ is removed leaving the field oxide film 5. A SiO ₂ film 6 is again grown for the gate oxide film using the vapor phase growth method.
A thickness of 2000 Å is deposited (FIG. 1f). Furthermore, holes for electrode contact are made by a photoetching process as shown in Figure 1g, and after Al is deposited on the entire surface, the Al is processed by a photoetching process to form a source electrode 7, a drain electrode 8, and a gate electrode 9. do. After this, heat treatment is performed at 400° C. for 30 minutes in an H ₂ atmosphere. Through the above steps, a MOS field effect transistor was fabricated in polycrystalline silicon.
This semiconductor device exhibits good and stable characteristics as a transistor.

Figure 2 shows an example of the characteristics of the prototype MOSFET.
Drain current I _D with gate voltage V _G as a parameter
This is the drain voltage V _DS characteristic. In this characteristic example
By increasing the SiO ₂ film thickness to 7000Å,
The threshold voltage is increased to 80V.

Here, the softening point temperature of the substrate glass is
Normally hard glass heated to 780°C was used, but throughout the process no heat treatment is performed at temperatures higher than 550°C, so the glass substrate does not soften. Also,
The substrate will not soften even if inexpensive ordinary glass (soda glass) with a softening point of 630°C, ultra-hard glass with a softening point of 820°C, or quartz glass with a softening point of 1500°C is used as the substrate. So it is possible as well. From the viewpoint of practicality, it is also important that the manufacturing cost of semiconductor devices be low. In this respect, it is most advantageous to use inexpensive ordinary glass or the like as the substrate, second advantageous to use ordinary hard glass or ultrahard glass, and disadvantageous to use expensive quartz glass or the like. According to the present invention, it is also possible to manufacture a semiconductor device using an inexpensive glass substrate with a low softening point.

Regarding the light transmittance of the substrate glass, any of ordinary transparent glass, filter glass that transmits only light in a certain wavelength range, and non-transparent glass can be used.

In each process, including the process of forming a polycrystalline silicon film, due to the manufacturing method, it is necessary to increase the area of semiconductor devices,
There are no technical problems that would prevent lengthening. Further, if necessary, by using a light-transmitting substrate, light can be input from the substrate side.

As described above, according to the present invention, it is possible to easily and inexpensively form a large area or long semiconductor device having good and stable operating characteristics on a glass substrate. In addition, if necessary,
It is also possible to create a structure in which light enters from the substrate side.

Although the case where a glass substrate is used has been described above, it is also possible to use a ceramic substrate of Al ₂ O ₃ or the like.

In addition, in the above example, impurities were not intentionally added to the polycrystalline silicon film used as the raw material, but at the same time, a very small amount of impurities was added during silicon vapor deposition.
It is possible to intentionally add p-type impurities and n-type impurities by vapor depositing Ga, Sb, or the like. Furthermore, it is of course possible to control the impurity concentration.

For example, a depletion type MOS field effect transistor as shown below was manufactured. Silicon and a small amount of Ga were simultaneously deposited on a glass substrate at a substrate temperature of 500°C to form a p-type polycrystalline Si film. An n-channel MOS field effect transistor is manufactured using this polycrystalline film as a material. The basic manufacturing process is as described above. For the source and drain regions, P ⁺ ions with an energy of 100 KeV were applied 1× to the polycrystalline Si described above.
An n ⁺ layer was formed by implanting at a dose of 10 ¹⁶ /cm ² and annealing at 600°C. Also,
The gate oxide film was 2000 Å thick. The obtained characteristics are of a depletion type with a threshold voltage value of -25V, and low voltage drive of approximately V _G =10V is possible.

Next, as an application example, a one-dimensional self-scanning light receiving element in which a photodiode and a scanning integrated circuit are integrated will be described.

FIG. 3 is a plan view thereof, and FIG. 4 is a sectional view AA′ of the plan view.

21 is a transparent glass substrate on which Example 1 is printed.
polycrystalline silicon MOSFET by the method described in
A scanning IC section 22 and a photo sensor section 23 are formed. FIG. 5 shows an example of the circuit configuration. The area within the broken line in FIG. 6 is an example of a scanning IC section, and 30 is a photo sensor array. In addition,
In the figure, 24 is the lower electrode of the photo sensor, for example made of Cr.
Use metals such as 25 is a transparent electrode, for example
Using _SnO2 . 26 is a photoconductive film, for example Se-As
-Te-based amorphous semiconductor film may be used. This photoconductive film can be easily formed by vapor deposition. 27 is an upper metal electrode.

When using a NESA film for a transparent electrode, a NESA transparent conductive film is first formed on a substrate. Next, wiring for connection to the scanning IC is formed, and aligned with this to form the scanning IC section. The manufacturing method is as described above. After completing the scanning IC, the photoconductor film 26
Then, an upper metal electrode 27 is formed by vapor deposition to complete a self-scanning light receiving element.

This device is useful as a photoelectric conversion device such as a facsimile transmitter or OCR to convert image information on a flat image recording medium into a time-series electrical signal.

Example 2 An example in which the present invention is applied to a pn junction diode will be described. FIG. 6 is a sectional view of the element.

A transparent glass substrate 11 is prepared, and on its upper surface
A Cr film is deposited to a thickness of about 2000 Å. The substrate temperature is 200°C and vacuum evaporation is used. The electrode 12 is processed into a desired shape using a normal photo-etching method. This substrate is placed in a vacuum evaporation device, and the degree of vacuum is 8×.
Ga and Si were simultaneously deposited in an atmosphere of 10 ^-9 Torr,
A polycrystalline silicon film containing Ga (p
Mold) 13 is formed. The substrate temperature is 550℃.
Next, Sb and Si are simultaneously deposited in the same atmosphere as described above to form a polycrystalline silicon film (n-type) containing Sb with a thickness of 1 μm. The board temperature is 550
℃ and eggplant. Note that Ga and Sb are introduced to make silicon p-type or n-type, and are usually p-n.
It is sufficient to introduce it to form a bond. Furthermore, Al is vapor-deposited on these laminated layers. The substrate temperature at this time was 200°C. The electrode is processed into a desired shape using a well-known photoetching method.

In this way, a pn junction diode is completed.

All of the above steps are performed at low temperatures below 550°C. As described in the first embodiment, according to the present invention, a large area or long pn junction diode array can be formed easily and at low cost.

The examples so far have simply shown examples of diode arrays with p-n junctions, but of course it is also possible to form pnp bipolar transistors and npn bipolar transistors on glass substrates, etc. using the method of the present invention. . In addition, by low-temperature vapor phase growth method,
It is also possible to form an integrated circuit by combining two or more semiconductor elements by separating the elements using a SiO ₂ film.

As described above, according to the present invention, a practical polycrystalline silicon film can be formed on an amorphous substrate at a low substrate temperature. By forming a semiconductor device using the polycrystalline silicon film as a material, it is possible to increase the area and length of the semiconductor device. Expansion of the range of applications of semiconductor devices according to the present invention brings great industrial benefits.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a device for explaining a process for explaining an embodiment of the present invention, FIG. 2 is a diagram showing drain current versus drain voltage characteristics of a field effect transistor according to an embodiment of the present invention, and FIG. 4 and 4 are a plan view and a sectional view showing an example in which the present invention is applied to a photoelectric conversion element, FIG. 5 is a diagram showing an example of a circuit used in the example of a photoelectric conversion element, and FIG. FIG. 2 is a sectional view showing an example. 1: Amorphous substrate, 2: Polycrystalline silicon film, 3:
SiO ₂ film, 4: impurity region, 5: oxide film, 6: gate oxide film.

Claims (1)

[Claims] 1. An amorphous substrate is placed in a vacuum container, and silicon is mainly deposited on the substrate under vacuum at a pressure of 1×10 ^-8 Torr or less and at a substrate temperature of 400°C or more and 820°C or less. A method for manufacturing a semiconductor device, comprising the step of depositing a polycrystalline film, and forming at least one active element using the polycrystalline film as a material. 2. The method of manufacturing a semiconductor device according to claim 1, wherein a glass substrate is used as the amorphous substrate.