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JPS6318899B2 - - Google Patents
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JPS6318899B2 - - Google Patents

Info

Publication number
JPS6318899B2
JPS6318899B2 JP55076868A JP7686880A JPS6318899B2 JP S6318899 B2 JPS6318899 B2 JP S6318899B2 JP 55076868 A JP55076868 A JP 55076868A JP 7686880 A JP7686880 A JP 7686880A JP S6318899 B2 JPS6318899 B2 JP S6318899B2
Authority
JP
Japan
Prior art keywords
output
signal
reference signal
oscillator
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55076868A
Other languages
Japanese (ja)
Other versions
JPS573433A (en
Inventor
Michio Nakanishi
Osamu Yamanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP7686880A priority Critical patent/JPS573433A/en
Publication of JPS573433A publication Critical patent/JPS573433A/en
Publication of JPS6318899B2 publication Critical patent/JPS6318899B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/20Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a harmonic phase-locked loop, i.e. a loop which can be locked to one of a number of harmonically related frequencies applied to it

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Description

【発明の詳細な説明】 この発明はマイクロ波帯無線通信機等におい
て、周波数変換器の局部発振器等によく使用され
ている位相同期形マイクロ波信号発生器に関し、
特にその障害(同期外れ)検出回路に関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a phase synchronized microwave signal generator that is often used as a local oscillator of a frequency converter in microwave band wireless communication equipment, etc.
In particular, it relates to the fault (out of synchronization) detection circuit.

第1図に従来より用いられている位相同期形信
号発生器の回路構成を示す。図中1は基準信号発
振器で、通常水晶発振器または周波数シンセサイ
ザー等で構成され、その出力は増幅器2で増幅さ
れた後、高調波発生器3に印加され、ここで高調
波を発生させた後、位相比較器4に印加される。
一方、5は通常、半同軸回路等を用いた発振器
で、バラクタによつてその発振周波数を制御でき
るいわゆる電圧制御発振器(Voltage
Controlled Oscillator,以下VCOと称す)であ
る。VCO5の出力は逓倍器6に印加され、この
逓倍器6によりM逓倍されて所要の出力周波数が
得られる。所要周波数によつては逓倍器6を用い
ず、VCO5の出力をそのまま使用している場合
もある。VCO5の出力は一方で位相比較器4側
にも取り出され、位相比較器4によつて基準信号
の高調波との位相差が検出され、その出力はルー
プフイルタ7に印加される。ループフイルタ7は
その位相差信号を増幅した後、その出力をVCO
5のバラクタに印加し、最終的にはVCO5の周
波数は基準信号発振器1の基準信号の高調波に同
期するように発振器は構成されている。
FIG. 1 shows the circuit configuration of a conventionally used phase-locked signal generator. In the figure, 1 is a reference signal oscillator, which is usually composed of a crystal oscillator or a frequency synthesizer, and its output is amplified by an amplifier 2 and then applied to a harmonic generator 3, where harmonics are generated. It is applied to the phase comparator 4.
On the other hand, 5 is usually an oscillator using a semi-coaxial circuit, etc., and the oscillator 5 is a so-called voltage controlled oscillator whose oscillation frequency can be controlled by a varactor.
Controlled Oscillator (hereinafter referred to as VCO). The output of the VCO 5 is applied to a multiplier 6, which multiplies it by M to obtain a desired output frequency. Depending on the required frequency, the multiplier 6 may not be used and the output of the VCO 5 may be used as is. On the other hand, the output of the VCO 5 is also taken out to the phase comparator 4 side, the phase difference with the harmonic of the reference signal is detected by the phase comparator 4, and the output is applied to the loop filter 7. After the loop filter 7 amplifies the phase difference signal, the output is sent to the VCO.
The oscillator is configured such that the frequency of the VCO 5 is finally synchronized with the harmonics of the reference signal of the reference signal oscillator 1.

基準信号の出力がない場合や何らかの原因で同
期が外れた場合には、ループフイルタ7は正帰還
回路によつて掃引発振を起こし、それによつて
VCO5の出力信号は同期するまで掃引をするよ
うに構成されている。
If the reference signal is not output or if the synchronization is lost for some reason, the loop filter 7 causes a sweep oscillation by the positive feedback circuit, and thereby
The output signal of the VCO 5 is configured to sweep until synchronization occurs.

ここでその同期外れを起した場合、それを障害
として検出するために従来の方法では検出回路8
が用いられている。この検出回路8はループフイ
ルタ7の出力に直結されたキヤパシタ・ダイオー
ド検波器8aおよびシユミツトトリガ回路8bよ
りなり、発振器が同期している間はループフイル
タ7の出力は直流となるため検波器8aには何も
入力されないが、発振器の同期が外れるとループ
フイルタ7が掃引発振を起こすために交流入力が
検波器8aに印加され、その出力が次段のシユミ
ツトトリガ回路8bを駆動して障害信号を発生す
る。
If the synchronization occurs here, in order to detect it as a failure, in the conventional method, the detection circuit 8
is used. This detection circuit 8 consists of a capacitor diode detector 8a and a Schmitt trigger circuit 8b, which are directly connected to the output of the loop filter 7. While the oscillator is synchronized, the output of the loop filter 7 becomes DC, so the detector 8a Although nothing is input, when the oscillator is out of synchronization, the loop filter 7 causes sweep oscillation, so AC input is applied to the detector 8a, and its output drives the Schmitt trigger circuit 8b in the next stage to generate a fault signal. .

この従来回路においては掃引信号の発生により
障害を検出するようにしているので、少なくとも
発振器が1周期以上掃引してからでないと障害が
検出されないため、例えば送信機等において掃引
信号が送信される以前に出力を断とすることは不
可能であり、また何らかの原因で同期していない
にもかかわらず、掃引信号が発生しない場合、例
えばループフイルタのオフセツト電圧が発生した
ような場合には検出できないという欠点があつ
た。
In this conventional circuit, a fault is detected by the generation of a sweep signal, so the fault is not detected until after the oscillator has swept at least one cycle. For example, before the sweep signal is transmitted by a transmitter, etc. It is impossible to turn off the output at any time, and if the sweep signal does not occur even though it is not synchronized for some reason, for example, if the offset voltage of the loop filter occurs, it cannot be detected. There were flaws.

本発明はこのような従来のものの欠点を除去す
るためになされたもので、基準信号を逓倍した信
号とVCOの出力とを混合して得た信号からビー
ト信号を検出するビート信号検出回路を設け、さ
らには基準信号検出回路を設けることにより、同
期が外れた場合に掃引の開始と同時に障害を検出
することができ、かつ掃引信号が発生しない場合
にも障害を有効に検出できる位相同期形マイクロ
波信号発生器を提供することを目的としている。
The present invention has been made to eliminate such drawbacks of the conventional system, and includes a beat signal detection circuit that detects a beat signal from a signal obtained by mixing a signal multiplied by a reference signal and the output of a VCO. Furthermore, by providing a reference signal detection circuit, it is possible to detect a fault at the same time as the start of the sweep if synchronization is lost, and also to effectively detect a fault even when a sweep signal is not generated. The purpose of the present invention is to provide a wave signal generator.

以下、本発明の一実施例を図について説明す
る。
Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

第2図は本発明の一実施例による位相同期形マ
イクロ波信号発生器を示す。図中の1〜7は第1
図と全く同じであるが、本発明においては第1図
の検出回路8の代りに9〜13の各回路を用いて
いる。ここで9は増幅器2の出力を逓倍する逓倍
回路、10は逓倍回路9の出力とVCO5の出力
とを混合する混合器、11は混合器10の出力を
増幅する増幅器、12はキヤパシタ・ダイオード
検波器12aとシユミツトトリガ回路12bとに
よつて構成されるビート信号検出回路、13は増
幅器2の出力より基準信号を検出する基準信号検
出回路である。
FIG. 2 shows a phase-locked microwave signal generator according to an embodiment of the present invention. 1 to 7 in the diagram are the first
Although it is exactly the same as the figure, in the present invention, each circuit 9 to 13 is used in place of the detection circuit 8 of FIG. Here, 9 is a multiplier circuit that multiplies the output of amplifier 2, 10 is a mixer that mixes the output of multiplier circuit 9 and the output of VCO 5, 11 is an amplifier that amplifies the output of mixer 10, and 12 is a capacitor diode detector. A beat signal detection circuit 13 is a reference signal detection circuit that detects a reference signal from the output of the amplifier 2.

次に動作について説明する。逓倍回路9は増幅
器2の出力の一部を取り出し、これをN逓倍して
必要な高調波を得ている。この逓倍回路9は高調
波発生回路3と等価であるが、高調波発生回路3
の場合には異なる次数の高調波を抑圧する必要が
ない点において逓倍回路9とは異なる。この逓倍
回路9の出力は混合器10に印加される。この混
合器10には一方で新たな結合器によつて取り出
されたVCO5の出力信号が印加されている。ま
たこの混合器10の出力には増幅器11が接続さ
れ、さらにその出力にはキヤパシタ・ダイオード
検波器12aとシユミツトトリガ回路12bとに
よつて構成されるビート信号検出回路12が接続
されている。この回路構成によれば発振器が同期
している間は、逓倍回路9出力と発振器5出力と
は周波数が全く一致しているため混合器10の出
力は直流となり、ビート信号検出回路12は動作
しない。しかし発振器の同期が外れた場合には、
逓倍回路9の出力と発振器5の出力は周波数が異
なつてくるために混合器10の出力にはその差信
号、すなわちビート信号が現われる。このビート
信号を増幅し、ビート信号検出回路12にて検出
してやれば、掃引発振の開始と同時に障害を検出
することができる。
Next, the operation will be explained. The multiplier circuit 9 takes out a part of the output of the amplifier 2 and multiplies it by N to obtain the necessary harmonics. This multiplier circuit 9 is equivalent to the harmonic generation circuit 3, but the harmonic generation circuit 3
This case differs from the multiplier circuit 9 in that there is no need to suppress harmonics of different orders. The output of this multiplier circuit 9 is applied to a mixer 10. On the one hand, the output signal of the VCO 5 is applied to this mixer 10, which is extracted by a new combiner. An amplifier 11 is connected to the output of the mixer 10, and a beat signal detection circuit 12 comprising a capacitor diode detector 12a and a Schmitt trigger circuit 12b is further connected to the output. According to this circuit configuration, while the oscillator is synchronized, the frequencies of the output of the multiplier circuit 9 and the output of the oscillator 5 are exactly the same, so the output of the mixer 10 becomes DC, and the beat signal detection circuit 12 does not operate. . However, if the oscillator gets out of synchronization,
Since the output of the multiplier circuit 9 and the output of the oscillator 5 have different frequencies, a difference signal, that is, a beat signal, appears in the output of the mixer 10. If this beat signal is amplified and detected by the beat signal detection circuit 12, a failure can be detected at the same time as the sweep oscillation starts.

また、基準信号検出回路13は、基準信号がな
い場合またはこれが極端に低くなつて逓倍回路9
が動作しない場合(この場合も当然発振器は同期
外れとなる)に動作するようにしてやれば、ビー
ト信号検出回路12が働かない場合に障害信号を
出すことができる。
Further, the reference signal detection circuit 13 detects the multiplier circuit 9 when there is no reference signal or when the reference signal becomes extremely low.
If the oscillator is made to operate when the beat signal detection circuit 12 does not operate (naturally, the oscillator will be out of synchronization in this case as well), it is possible to issue a failure signal when the beat signal detection circuit 12 does not operate.

また増幅器11の帯域は発振器5の掃引周波数
範囲と同程度にしてやることにより、すべてのビ
ート信号を検出することができ、同期していなく
て掃引信号が発生しないような場合にも障害の検
出は可能である。
Furthermore, by setting the band of the amplifier 11 to be similar to the sweep frequency range of the oscillator 5, all beat signals can be detected, and even if the sweep signal is not generated due to lack of synchronization, failures can be detected. It is possible.

実際このような回路構成により従来方式によれ
ば数十ミリ秒の検出時間であつたものを、数マイ
クロ秒にまで短縮することができた。
In fact, with this circuit configuration, the detection time, which was several tens of milliseconds according to the conventional method, could be shortened to several microseconds.

なお上記実施例では、バラクタを用いた位相同
期形信号発生器について説明したが、本発明は位
相同期形発振器であればどのような発振器にも適
用することができる。
In the above embodiment, a phase-locked signal generator using a varactor has been described, but the present invention can be applied to any phase-locked oscillator.

以上のように、この発明によれば、基準信号を
逓倍した信号とVCOの出力とを混合して得た信
号からビート信号を検出するビート信号検出回路
を設け、さらには基準信号検出回路を設けたの
で、高速の同期外れ検出が可能であり、ダイオー
ドスイツチ等と組合せれば通信機等において発振
器の同期が外れた時掃引信号が送出される前もし
くはわずかの出力信号のずれの間に出力を断とす
ることができる。特に基準信号として周波数シン
セサイザ等を用い、出力周波数を何度も切れ換え
るような装置において特に有用である。
As described above, according to the present invention, there is provided a beat signal detection circuit that detects a beat signal from a signal obtained by mixing a signal obtained by multiplying a reference signal and the output of a VCO, and further a reference signal detection circuit is provided. Therefore, high-speed out-of-synchronization detection is possible, and when combined with a diode switch etc., when the oscillator in a communication device is out of synchronization, the output can be detected before the sweep signal is sent out or during a slight deviation in the output signal. It is possible to refuse. This is particularly useful in devices that use a frequency synthesizer or the like as a reference signal and switch the output frequency many times.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の位相同期形マイクロ波信号発生
器の回路構成図、第2図はこの発明の一実施例に
よる位相同期形マイクロ波信号発生器の回路構成
図である。 1……基準信号発振器、3……高調波発生器、
4……位相比較器、5……VCO、7……ループ
フイルタ、9……逓倍器、10……混合器、12
……ビート信号検出回路、13……基準信号検出
回路。なお図中、同一符号は同一又は相当部分を
示す。
FIG. 1 is a circuit diagram of a conventional phase-locked microwave signal generator, and FIG. 2 is a circuit diagram of a phase-locked microwave signal generator according to an embodiment of the present invention. 1... Reference signal oscillator, 3... Harmonic generator,
4... Phase comparator, 5... VCO, 7... Loop filter, 9... Multiplier, 10... Mixer, 12
...Beat signal detection circuit, 13...Reference signal detection circuit. In the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【特許請求の範囲】 1 基準信号を発振する基準信号発振器と、上記
基準信号の高周波を発生する高周波発生器と、こ
の高周波発生器の出力と電圧制御発振器の出力と
を位相検波する位相比較器と、この位相比較器の
出力が入力されその出力を上記電圧制御発振器に
印加するループフイルタと、上記基準信号を逓倍
する逓倍器と、この逓倍器の出力と上記電圧制御
発振器の出力とを混合する混合器と、この混合器
の出力からビート信号を検出するビート信号検出
回路とを備えたことを特徴とする位相同期形マイ
クロ波信号発生器。 2 上記基準信号発振器の出力から基準信号を検
出する基準信号検出回路を備えたことを特徴とす
る特許請求の範囲第1項記載の位相同期形マイク
ロ波信号発生器。
[Claims] 1. A reference signal oscillator that oscillates a reference signal, a high frequency generator that generates a high frequency of the reference signal, and a phase comparator that detects the phase of the output of this high frequency generator and the output of the voltage controlled oscillator. A loop filter receives the output of the phase comparator and applies the output to the voltage controlled oscillator, a multiplier multiplies the reference signal, and mixes the output of the multiplier with the output of the voltage controlled oscillator. 1. A phase synchronized microwave signal generator comprising: a mixer for detecting a beat signal; and a beat signal detection circuit for detecting a beat signal from the output of the mixer. 2. The phase-locked microwave signal generator according to claim 1, further comprising a reference signal detection circuit for detecting a reference signal from the output of the reference signal oscillator.
JP7686880A 1980-06-06 1980-06-06 Phase synchronizing type microwave signal generator Granted JPS573433A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7686880A JPS573433A (en) 1980-06-06 1980-06-06 Phase synchronizing type microwave signal generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7686880A JPS573433A (en) 1980-06-06 1980-06-06 Phase synchronizing type microwave signal generator

Publications (2)

Publication Number Publication Date
JPS573433A JPS573433A (en) 1982-01-08
JPS6318899B2 true JPS6318899B2 (en) 1988-04-20

Family

ID=13617617

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7686880A Granted JPS573433A (en) 1980-06-06 1980-06-06 Phase synchronizing type microwave signal generator

Country Status (1)

Country Link
JP (1) JPS573433A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59199006A (en) * 1983-04-25 1984-11-12 Shigeji Inouchi Forcible settlement of natant dreg and its removing method
JPH062562B2 (en) * 1985-10-08 1994-01-12 岡村製油株式会社 Method for producing transparent metal oxide
WO1989012930A1 (en) * 1988-06-15 1989-12-28 Matsushita Electric Industrial Co., Ltd. Phase synchronous oscillator

Also Published As

Publication number Publication date
JPS573433A (en) 1982-01-08

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