Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JPS632107B2 - - Google Patents
[go: Go Back, main page]

JPS632107B2 - - Google Patents

Info

Publication number
JPS632107B2
JPS632107B2 JP1797681A JP1797681A JPS632107B2 JP S632107 B2 JPS632107 B2 JP S632107B2 JP 1797681 A JP1797681 A JP 1797681A JP 1797681 A JP1797681 A JP 1797681A JP S632107 B2 JPS632107 B2 JP S632107B2
Authority
JP
Japan
Prior art keywords
base paper
original
gap
drawn
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1797681A
Other languages
Japanese (ja)
Other versions
JPS57133693A (en
Inventor
Tadahiro Uyama
Ryuhei Tomizuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MATSUKUEITO KK
Original Assignee
MATSUKUEITO KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MATSUKUEITO KK filed Critical MATSUKUEITO KK
Priority to JP1797681A priority Critical patent/JPS57133693A/en
Publication of JPS57133693A publication Critical patent/JPS57133693A/en
Publication of JPS632107B2 publication Critical patent/JPS632107B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Preparing Plates And Mask In Photomechanical Process (AREA)

Description

【発明の詳細な説明】 本発明は、コンピユータ技術を利用した、所謂
CAD法を採用してプリント基板の写真原版を作
製するプリント基板用写真原版作製方法に関する
ものである。
[Detailed Description of the Invention] The present invention utilizes computer technology.
The present invention relates to a method for producing a photographic original plate for a printed circuit board, which employs a CAD method to produce a photographic original plate for a printed circuit board.

斯かる方法では、第1図に示すようにそれぞれ
基本格子となる縦線1Vと横線1Hが2.54mmの間隔
aで用紙上に印刷されてなるインチ系メツシユ原
紙Pに、電気回路図に基く設計原図を縦来のアー
トワーク作製の場合と同様に人手によつて縮尺2
倍で描くことがまず行われる。
In this method, as shown in Fig. 1, an electrical circuit diagram is printed on inch mesh base paper P on which vertical lines 1 V and horizontal lines 1 H , each serving as a basic grid, are printed at intervals of 2.54 mm. The original design drawing is manually scaled to 2 scale as in the case of vertical artwork production.
Drawing at double is done first.

プリント基板が集積回路(IC)塔載用のもの
である場合、ICのピン間の間隔が規格によつて
2.54mmと定められているため、第2図に示すよう
にICピン挿入孔10はその中心を基本格子の交
点C1及びC2に定めることによつて描かれる。一
方、プリント配線パターン11はその始端と終端
を図示しない基本格子の交点に定めると共に、そ
の屈曲点を図示の交点C3及びC4に定めることに
よつて描かれる。12はピン挿入孔10の回りに
形成されるランドで、デツプ半田等によりICの
ピンを配線パターンに電気的に接続するために使
用される。図には示されていないが、原図にはこ
れら以外にデスクリート素子のリード線を挿入す
るための孔等も基本格子の交点上に描かれる。
If the printed circuit board is for mounting an integrated circuit (IC), the spacing between the pins of the IC depends on the standard.
Since the diameter is determined to be 2.54 mm, the IC pin insertion hole 10 is drawn by setting its center at the intersections C 1 and C 2 of the basic grid, as shown in FIG. On the other hand, the printed wiring pattern 11 is drawn by setting its starting end and ending point at the intersections of a basic lattice (not shown), and by setting its bending points at the shown intersections C 3 and C 4 . A land 12 is formed around the pin insertion hole 10 and is used to electrically connect the pin of the IC to the wiring pattern using deep solder or the like. Although not shown in the figure, in addition to these, holes for inserting lead wires of discrete elements are also drawn on the intersections of the basic lattice in the original drawing.

CAD法では次に、上述のようにして作製した
設計原図を第3図に示すようなデジタイザDのデ
ジタイザ板D1に張り付けてデジタイズ作業が行
われる。デジタイズ作業は、設計原図に描かれて
いるピン挿入孔10や配線パターン11の屈曲点
などにあたる交点C1〜C4等にカーソルK(又はプ
ローブ)を当ててこれらの交点の位置を読取るこ
とで、写真原版の作製に必要な情報を設計原図か
ら読取るためのもので、この作業で読取つた情報
はメモリーに記憶される。その後、この記憶され
た情報は読出され、フオトプロツターによつて写
真原版を描くために利用される。
In the CAD method, next, the original design drawing prepared as described above is attached to a digitizer plate D1 of a digitizer D as shown in FIG. 3, and digitizing work is performed. Digitizing work is done by placing a cursor K (or probe) on the intersection points C1 to C4 , etc., which correspond to the bending points of the pin insertion hole 10 and wiring pattern 11, drawn on the original design drawing, and reading the positions of these intersection points. This is to read the information necessary for producing the original photographic plate from the original design drawing, and the information read in this process is stored in memory. This stored information is then read out and utilized by the photoplotter to render the photographic master.

CAD法は、上述したように写真原版をフオト
プロツターで描くため、アートワークによつて写
真原版を作製する方法に比べてより複雑で実装密
度の高いプリント基板の写真原版を作製するのに
適し、今日では広く使用されるようになつてきて
いる。
As mentioned above, the CAD method uses a photo plotter to draw the original photo, and is therefore more suitable for creating photo originals for printed circuit boards that are more complex and have a higher packaging density than the method of creating original photo plates using artwork. It is becoming widely used.

ところで、最近のICは消費電力が小さくなつ
てきているため、配線パターンの巾を狭くしても
ジユール熱による発熱は問題となる程大きくなら
ない。このため、原図設計の自由度を増大した
り、プリント基板の実装密度のより一層の向上を
計るために、配線パターンの巾を小さくしてIC
のピン間の間隙、すなわちピン間隙に2本以上上
の配線パターンを通したプリント基板に対する要
求が高まつてきている。
By the way, the power consumption of recent ICs has become smaller, so even if the width of the wiring pattern is narrowed, the heat generated by Joule heat does not become large enough to become a problem. For this reason, in order to increase the degree of freedom in original design and further improve the mounting density of printed circuit boards, the width of the wiring patterns has been reduced and IC
There is an increasing demand for printed circuit boards in which two or more upper wiring patterns are passed through the gaps between the pins, that is, the pin gaps.

ここで再び第1図の原紙について考えてみる
と、この原紙では、後のデジタイズ作業によつて
読取ることのできる配線パターンは、基本格子の
他に、基本格子間の中央に引いた線に相当するが
実際には印刷されていない破線で示す半格子2に
も描くことができる。ところが、この半格子2を
用いてピン間隙に2本の配線パターンを作ろうと
すると、配線パターンとランド12が接触した
り、ランドの径又は配線パターンの巾が極端に小
さくなり過るようになるため、第1図の原紙は上
述のような要求のプリント基板用写真原版の作製
に適用できない。
If we consider the original paper in Figure 1 again, in this original paper, the wiring pattern that can be read in the later digitizing process corresponds to the basic grid as well as the line drawn in the center between the basic grids. However, it can also be drawn on the half lattice 2 shown by broken lines, which is not actually printed. However, when attempting to create two wiring patterns in the pin gap using this half-lattice 2, the wiring pattern and the land 12 may come into contact with each other, or the diameter of the land or the width of the wiring pattern may become extremely small. Therefore, the base paper shown in FIG. 1 cannot be applied to the production of a photographic original plate for a printed circuit board that meets the above-mentioned requirements.

このため、第4図に示すように、5.08mmの間隔
bの基本格子となる縦線1V′及び横線1H′と、基
本格子間を5等分する補助格子2′とを用紙に印
刷したメツシユ原紙P′を使用して、第5図に示す
ように、ピン間隙に2本の配線パターン11を通
すことが考えられた。
For this reason, as shown in Fig. 4, vertical lines 1 V ' and horizontal lines 1 H ', which form the basic grid with an interval b of 5.08 mm, and auxiliary grids 2', which divide the basic grid into five equal parts, are printed on the paper. It was considered to use the mesh base paper P' prepared in this manner to pass two wiring patterns 11 through the pin gaps, as shown in FIG.

ところが、この第4図の原紙は、一般に使用さ
れている第1図のインチ系メツシユ原紙と全く違
つていて、特別の仕様によつて作らなければなら
ないため高価になる。また、ピン間隙の中心に格
子がないため、ピン間隙に1本の配線パターンを
通そうとすると、パターンが一方のランドの方に
片寄つて設けられるようになつてバランスが悪く
なる他、同じ理由で3本の配線パターンをピン間
隙に通すことができないという問題がある。
However, the base paper shown in FIG. 4 is completely different from the generally used inch mesh base paper shown in FIG. 1, and it is expensive because it must be made according to special specifications. Also, since there is no grid in the center of the pin gap, if you try to pass one wiring pattern through the pin gap, the pattern will be biased toward one land, which will cause an imbalance, and for the same reason. However, there is a problem in that three wiring patterns cannot be passed through the pin gaps.

この問題は、ピン間隙を10等分する補助格子を
形成することによつて解消するかに思われるが、
10等分すると格子間の間隙が原紙上で0.508mmと
極めて小さくなるため、縮尺2倍での設計原図の
作製が難かしくなるばかりでなく、デジタイズ作
業での読取りにエラーが生じるという別の問題を
生起するようになる。勿論、縮尺4倍で描けばこ
のようなことはないが、設計原図が大きくなり過
ぎ、取扱いが面倒になる。
This problem seems to be solved by forming an auxiliary grid that divides the pin gap into 10 equal parts, but
When dividing into 10 equal parts, the gap between the grids becomes extremely small at 0.508mm on the base paper, which not only makes it difficult to create a design original at twice the scale, but also causes errors in reading during digitizing work, which is another problem. begins to occur. Of course, this problem would not occur if the drawings were drawn at four times the scale, but the original design drawings would become too large and difficult to handle.

本発明は上述した点に鑑みてなされたもので、
その目的とするところは、従来一般的に使用され
ているインチ系メツシユ原紙を大巾に変更しない
原紙に縮尺2倍で描いた設計原図に基き、ICの
ピン間隙に1乃至3本のプリント配線パターンを
通したプリント基板の写真原版をCAD法により
作製することのできるプリント基板用写真原版作
製方法を提供することにある。
The present invention has been made in view of the above points, and
The purpose of this is to draw one to three printed wiring lines between the pin gaps of the IC based on a design drawing drawn at double scale on a standard sheet of standard inch mesh paper, which has not been changed to a large width. It is an object of the present invention to provide a method for producing a photographic original plate for a printed circuit board, which can produce a photographic original plate for a printed circuit board through a pattern by a CAD method.

以下本発明の実施例を第6図乃至第10図a及
びbについて説明する。
Embodiments of the present invention will be described below with reference to FIGS. 6 to 10 a and b.

第6図は本発明の方法に使用するインチ系メツ
シユ原紙P″を示し、基本格子となる縦線1Vと横
線1Hとによつて形成されるマス目の中心にそれ
ぞれクロスマーク3を付している点を除き、第1
図に示す原紙Pと同じである。従つて、第6図の
原紙P″を作るには、刷り上つた第1図の原紙P
にクロスマーク3を追加印刷するだけでよいの
で、原紙P″が高価なものとなることはない。ま
た、クロスマーク3を無視すれば、第1図の原紙
Pと同じように使用することができる。
Figure 6 shows inch mesh base paper P'' used in the method of the present invention, with cross marks 3 placed at the centers of the squares formed by vertical lines 1V and horizontal lines 1H , which form the basic grid. 1 except that
It is the same as the base paper P shown in the figure. Therefore, in order to make the base paper P'' in Figure 6, the printed base paper P'' in Figure 1 must be
Since it is only necessary to additionally print cross mark 3, base paper P'' does not become expensive.Also, if cross mark 3 is ignored, it can be used in the same way as base paper P in Figure 1. can.

第6図の原紙P″では、第7図に示すように、
クロスマーク3と基本格子とに内接する半径
0.635mmの円20を、デジタイザD(第3図)のカ
ーソルKの十字カーソル線kの交点を中心として
描くことにより、デジタイズ作業の際の読取りに
当つて基本格子間の間隔の4分の1までの識別が
可能になる。従つて、第6図の原紙P″を用いて
縮尺2倍の設計原図を描くと、第8図に示すよう
にICのピン間の間隙を8等分する0.635mmの間隔
Cの補助格子2″を設けたと同等の効果が得られ
る。
For the base paper P'' in Figure 6, as shown in Figure 7,
Radius inscribed in cross mark 3 and basic grid
By drawing a 0.635 mm circle 20 centered at the intersection of the cross cursor line k of the cursor K of the digitizer D (Figure 3), it is possible to draw a circle 20 of 0.635 mm with the intersection of the cross cursor line k of the cursor K of the digitizer D (Fig. It becomes possible to identify up to Therefore, if we draw a double-scale original design using the original paper P'' in Figure 6, we will create an auxiliary grid 2 with an interval C of 0.635 mm that divides the gap between the IC pins into eight equal parts, as shown in Figure 8. The same effect can be obtained as if `` is provided.

第6図の原紙P″を使用してピン間隙に1本の
配線パターンを通した原図を描くと、第2図と全
く同じものが得られる。そして、ピン間隙に2本
の配線パターン11を通すときには、第8図に示
すように、ピン間の中心の補助格子2″の両側の
2本を使用して原図が描ける。しかし、この場合
のランド12の径dと配線パターン11の巾e
は、1本の場合と同じにするとランド12とパタ
ーン11及びパターン11同志が接近し過ぎるよ
うになるため、それぞれ1.2〜1.3mmと0.2〜0.25mm
に選定される。
If you draw an original drawing with one wiring pattern passing through the pin gap using the base paper P'' in Figure 6, you will get exactly the same thing as in Figure 2. Then, two wiring patterns 11 will be drawn between the pin gaps. When passing, as shown in FIG. 8, the original drawing can be drawn using two wires on both sides of the auxiliary grid 2'' located at the center between the pins. However, in this case, the diameter d of the land 12 and the width e of the wiring pattern 11
are 1.2 to 1.3 mm and 0.2 to 0.25 mm, respectively, because if they are the same as in the case of one piece, the land 12 and the pattern 11 and the patterns 11 will be too close to each other.
selected.

次に、ピン間隙に3本の配線パターン11を通
す場合には、第9図に示すように、ピン間隙にあ
る補助格子2″のうちの中央の3本を使用して原
図を作ることができる。この場合のランドル12
の径dとパターン11の巾eはそれぞれ1.2mm及
び0.15mmに選定される。
Next, when passing three wiring patterns 11 through the pin gaps, as shown in FIG. Yes, Randall 12 in this case.
The diameter d of the pattern 11 and the width e of the pattern 11 are selected to be 1.2 mm and 0.15 mm, respectively.

なお、プリント基板が両面プリント型の場合に
は、IC塔載面、すなわちIC取付面側で間隙に2
乃至3本の配線パターン11を通すようにすれ
ば、第10図a及びbにそれぞれ破線で示すよう
に、デツプ半田面側に大きな径のランド12を形
成することができるため、プリント基板に対する
ICの取付強度が不足することはない。
If the printed circuit board is double-sided printed, there should be two holes in the gap on the IC mounting surface, that is, the IC mounting surface.
If three wiring patterns 11 are passed through, it is possible to form a land 12 with a large diameter on the solder depth side, as shown by broken lines in FIGS.
There is no lack of IC mounting strength.

上述したように、本発明のプリント基板用写真
原版作製方法によれば、インチ系メツシユ原紙の
各マス目の中心にクロスマークを付してICのピ
ン間の間隙を8等分する補助格子を形成し、ピン
間隙にある補助格子のうち中央の3本を利用して
ピン間隙を通るプリント配線パターンを描いてい
るため、ピン間隙に1乃至2本の配線パターンを
通すことが可能であるはかりでなく、従来不可能
とされていた3本の配線パターンを同じ原紙を用
い、しかも縮尺2倍でピン間隙に通すことが可能
になる他、メツシユ原紙の大巾な変更も不用で安
価な原紙の使用ですむなど多くの有用な効果が得
られる。
As described above, according to the method for producing a photographic original plate for a printed circuit board of the present invention, a cross mark is attached to the center of each square of inch mesh base paper to create an auxiliary grid that divides the gap between the IC pins into eight equal parts. The scale uses the central three of the auxiliary grids in the pin gap to draw a printed wiring pattern that passes through the pin gap, making it possible to pass one or two wiring patterns through the pin gap. In addition to making it possible to pass three wiring patterns through the pin gaps using the same base paper, which was previously considered impossible, and at twice the scale, it also eliminates the need for major changes to the mesh base paper, making it an inexpensive base paper. Many useful effects can be obtained, such as the use of .

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は一般的インチ系メツシユ原紙を示す
図、第2図は第1図の原紙を使用して作製した設
計原図の一例を示す図、第3図はデジタイザの概
略を示す斜視図、第4図は従来のメツシユ原紙の
変形例を示す図、第5図は第4図の原紙を使用し
て描いた原図の一例を示す図、第6図は本発明の
方法に使用するインチ系メツシユ原紙を示す図、
第7図は第6図の原紙の使い方を説明するための
図、第8図及び第9図は第6図の原紙を使用して
描いた設計原図の例をそれぞれ示す図、第10図
a及びbは本発明の方法によつて作製した写真原
版により作つた両面プリント基板の例をそれぞれ
示す平面図である。 P′……インチ系メツシユ原紙、1V……縦線、
H……横線、2″……補助格子、3……クロスマ
ーク、10……ピン挿入孔、11……プリント配
線パターン。
Figure 1 is a diagram showing a general inch mesh base paper, Figure 2 is a diagram showing an example of a design original created using the base paper in Figure 1, and Figure 3 is a perspective view showing an outline of a digitizer. Figure 4 shows a modified example of a conventional mesh base paper, Figure 5 shows an example of an original diagram drawn using the base paper of Figure 4, and Figure 6 shows an inch mesh used in the method of the present invention. Diagram showing the original paper,
Figure 7 is a diagram for explaining how to use the base paper in Figure 6, Figures 8 and 9 are diagrams showing examples of original design drawings drawn using the base paper in Figure 6, and Figure 10a. 3 and b are plan views respectively showing examples of double-sided printed circuit boards made from photographic original plates made by the method of the present invention. P′...inch mesh base paper, 1 V ...vertical line,
1 H ...Horizontal line, 2''...Auxiliary grid, 3...Cross mark, 10...Pin insertion hole, 11...Printed wiring pattern.

Claims (1)

【特許請求の範囲】[Claims] 1 インチ系メツシユ原紙上に縮尺2倍で描いた
設計原図に基き集積回路塔載用プリント基板の写
真原版をCAD法により作製する方法において、
前記インチ系メツシユ原紙の各マス目の中心にク
ロスマークを付して前記集積回路のピン間の間隙
を8等分する補助格子を形成し、前記間隙にある
補助格子のうちの中央の3本を利用して前記間隙
を通るプリント配線パターンを描くことを特徴と
するプリンリ基板用写真原版作製方法。
In a method for producing a photographic original of a printed circuit board for integrated circuit tower using a CAD method based on an original design drawing drawn at double scale on a 1-inch mesh base paper,
A cross mark is attached to the center of each square of the inch mesh base paper to form an auxiliary grid that divides the gap between the pins of the integrated circuit into eight equal parts, and three central grids of the auxiliary grid in the gap are formed. A method for producing a photographic original plate for a printed circuit board, characterized in that a printed wiring pattern passing through the gap is drawn using the following method.
JP1797681A 1981-02-12 1981-02-12 Method of producing photographic original board for printed board Granted JPS57133693A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1797681A JPS57133693A (en) 1981-02-12 1981-02-12 Method of producing photographic original board for printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1797681A JPS57133693A (en) 1981-02-12 1981-02-12 Method of producing photographic original board for printed board

Publications (2)

Publication Number Publication Date
JPS57133693A JPS57133693A (en) 1982-08-18
JPS632107B2 true JPS632107B2 (en) 1988-01-16

Family

ID=11958748

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1797681A Granted JPS57133693A (en) 1981-02-12 1981-02-12 Method of producing photographic original board for printed board

Country Status (1)

Country Link
JP (1) JPS57133693A (en)

Also Published As

Publication number Publication date
JPS57133693A (en) 1982-08-18

Similar Documents

Publication Publication Date Title
JPS632107B2 (en)
CN114357924B (en) A method and apparatus for creating component packages
JPS6141095Y2 (en)
JPH0347338Y2 (en)
JPH0683888A (en) Mounting data generating machine
JPH0824212B2 (en) Cutting method through hole board and method for manufacturing printed circuit board
JP3003058B2 (en) Substrate CAD system
EP0329414A3 (en) An improved circuit board
JPS59179074U (en) blueprint paper
JPS59163887A (en) Method of wiring printed board pattern
JPS59148369U (en) blueprint paper
JPS62266891A (en) Pad seal for printed wiring board design and method of forming pattern drawing by using the same
JPS607199Y2 (en) template
JPS6131332Y2 (en)
JPH0720936Y2 (en) Printed wiring board
JPS5826540Y2 (en) printed board pattern
JPS5945961U (en) printed wiring board
JPS58207694A (en) Method of designing connection of printed board wiring
JPS62193291A (en) Designation of axis of coordinated of printed board
JPS59161892A (en) Pattern circuit board
JPS6076065U (en) Printed board
JPS6017985A (en) Method of producing printed board
JPS60106371U (en) printed wiring board
JPH05218607A (en) Printed-circuit board
JPH02105259A (en) Data generating method for pattern exposing device