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JPS632153B2 - - Google Patents
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JPS632153B2 - - Google Patents

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Publication number
JPS632153B2
JPS632153B2 JP56178350A JP17835081A JPS632153B2 JP S632153 B2 JPS632153 B2 JP S632153B2 JP 56178350 A JP56178350 A JP 56178350A JP 17835081 A JP17835081 A JP 17835081A JP S632153 B2 JPS632153 B2 JP S632153B2
Authority
JP
Japan
Prior art keywords
resistance value
resistor
electrode
semiconductor layer
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56178350A
Other languages
Japanese (ja)
Other versions
JPS5880803A (en
Inventor
Shuichi Kanamori
Masamichi Mori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP56178350A priority Critical patent/JPS5880803A/en
Publication of JPS5880803A publication Critical patent/JPS5880803A/en
Publication of JPS632153B2 publication Critical patent/JPS632153B2/ja
Granted legal-status Critical Current

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  • Semiconductor Integrated Circuits (AREA)

Description

【発明の詳細な説明】 本発明は半導体層を含む抵抗体例えば拡散層を
含む抵抗体の抵抗値修正法に関するもので、特に
拡散層の所定領域に直接又は間接的に設けられた
金属から成る電極を少なくとも一つ含む抵抗体の
抵抗値を連続的に高精度に修正する抵抗値修正法
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for modifying the resistance value of a resistor including a semiconductor layer, such as a resistor including a diffusion layer, and particularly relates to a method for modifying the resistance value of a resistor including a semiconductor layer, and in particular a resistor made of a metal provided directly or indirectly in a predetermined region of the diffusion layer. The present invention relates to a resistance value correction method for continuously and highly accurately correcting the resistance value of a resistor including at least one electrode.

従来、混成集積回路に使用される薄膜抵抗体の
抵抗値修正法としては陽極化成法やレーザトリミ
ング法等が提案されている。またモノリシツク集
積回路においては、抵抗体として多結晶シリコン
を用い電流を通電することにより抵抗値を修正す
る方法が提案されている。
Conventionally, anodization methods, laser trimming methods, and the like have been proposed as methods for modifying the resistance value of thin film resistors used in hybrid integrated circuits. Furthermore, in monolithic integrated circuits, a method has been proposed in which the resistance value is modified by using polycrystalline silicon as a resistor and passing a current through the resistor.

しかしモノリシツク集積回路で抵抗体としてよ
く用いられる拡散層を含む抵抗体の抵抗値を直接
的に修正する方法は未だ提案されていない。拡散
層を含む抵抗体の抵抗値を間接的に修正する方法
としては次の方法が提案されている。即ち、第1
の方法としては、第1図に示すように目的とする
最終抵抗値よりも大きな抵抗値の拡散層抵抗1
と、これにボンデイングパツド2を介し抵抗値の
小さな調節用拡散層抵抗3を複数直列に接続した
抵抗体を形成し、調節用拡散層抵抗3の両端のボ
ンデイングパツド2をアルミニウム細線等のボン
デイングワイヤ4で順次短絡させることによつて
抵抗値を修正し目的の抵抗値を得る方法がある。
第2の方法としては、第2図に示すように拡散層
抵抗1に抵抗値の大きな調節用拡散層抵抗3を調
節用アルミ配線5を介して並列に接続した抵抗体
を形成し、調節用アルミ配線5をレーザで溶断す
ることにより抵抗値を修正し目的の抵抗値を得る
方法がある。しかしいずれの方法においても、抵
抗値を離散的にしか修正することができず、修正
精度が悪く、また調節用拡散層抵抗が必要なため
抵抗体の占有面積が大きくなりLSIに適用する場
合に集積度の向上が困難である欠点があつた。ま
た従来の抵抗値修正方法を用いてアナログLSIを
実現する場合には調節用抵抗分コストが高くなる
等の欠点があつた。
However, no method has yet been proposed for directly modifying the resistance value of a resistor including a diffusion layer, which is often used as a resistor in monolithic integrated circuits. The following method has been proposed as a method for indirectly modifying the resistance value of a resistor including a diffusion layer. That is, the first
As shown in Fig. 1, the method is as follows:
Then, a plurality of adjusting diffused layer resistors 3 having a small resistance value are connected in series to this via bonding pads 2 to form a resistor, and the bonding pads 2 at both ends of the adjusting diffused layer resistors 3 are connected with thin aluminum wire or the like. There is a method of modifying the resistance value by sequentially shorting the bonding wire 4 to obtain the desired resistance value.
As a second method, as shown in FIG. There is a method of modifying the resistance value by fusing the aluminum wiring 5 with a laser to obtain the desired resistance value. However, in either method, the resistance value can only be modified discretely, the modification accuracy is poor, and the area occupied by the resistor becomes large due to the need for a diffusion layer resistance for adjustment, making it difficult to apply to LSI. The drawback was that it was difficult to improve the degree of integration. Furthermore, when realizing an analog LSI using the conventional resistance value correction method, there were drawbacks such as an increase in cost due to the adjustment resistance.

本発明の目的は、抵抗体の抵抗値を連続的にか
つ高精度に調節することができる抵抗値修正法を
提供することにある。
An object of the present invention is to provide a resistance value correction method that allows the resistance value of a resistor to be adjusted continuously and with high precision.

本発明の他の目的は、調節用抵抗が不要で高集
積化に好適な抵抗値修正法を提供することにあ
る。
Another object of the present invention is to provide a resistance value correction method that does not require an adjusting resistor and is suitable for high integration.

上記目的を達成するために本発明の抵抵抗値修
正法は、目的の抵抗値よりも低い抵抗値を有する
半導体層とこの半導体層の所定領域上に設けられ
た金属から成る第1電極と前記半導体層の他の所
定領域上に設けられた第2電極とを備えた抵抗体
の第1電極を陽極とし第2電極を陰極とし前記抵
抗体に直流電流を通電することによりボイズを発
生させ抵抗体の抵抗値を修正することを特徴とす
る。
In order to achieve the above object, the resistance value correction method of the present invention includes: a semiconductor layer having a resistance value lower than the target resistance value; a first electrode made of metal provided on a predetermined region of the semiconductor layer; and a second electrode provided on another predetermined region of the semiconductor layer, the first electrode of the resistor is an anode, the second electrode is a cathode, and a DC current is passed through the resistor to generate a resistor. It is characterized by modifying the resistance value of the body.

以下、本発明を実施例にしたがつて説明する。 Hereinafter, the present invention will be explained based on examples.

第3図は本発明の抵抗値修正法に用いる抵抗体
の平面図で、第4図は第3図のXX′での断面図で
ある。10は基板で例えば結晶方位(100)比抵
抗10〜20Ωcmのn型単結晶シリコンであり、11
は基板10に形成される半導体層で例えば不純物
としてリンを基板10に拡散させ拡散層の深さが
約2.9μm表面濃度が約1×1021cm-8の拡散層であ
りその抵抗値は目的の抵抗値より低い値であり、
12は半導体層11の構成元素(この場合はシリ
コン)とvacancyを含む金属例えばスパツタ法で
形成され2〜3%のシリコンが入つているアルミ
ニウム(以下「Al(Si)」と略する。)からなる厚
さ1.5μmの第1電極でこの第1電極12は半導体
層11及び基板10の表面に被着された絶縁膜1
3に穿孔されたコンタクトホール14を通して半
導体層11の一端に直接接触しており、半導体層
11の他端は絶縁膜13に穿孔された他のコンタ
クトホール15を通じて第2電極16に直接接触
している。第2電極はAl(Si)等の金属でもよ
く、多結晶シリコンや非晶質シリコンであつても
よい。
FIG. 3 is a plan view of a resistor used in the resistance value correction method of the present invention, and FIG. 4 is a sectional view taken at XX' in FIG. 10 is a substrate, for example, n-type single crystal silicon with a crystal orientation (100) and a resistivity of 10 to 20 Ωcm;
is a semiconductor layer formed on the substrate 10, for example, by diffusing phosphorus as an impurity into the substrate 10, the depth of the diffusion layer is about 2.9 μm, the surface concentration is about 1×10 21 cm -8 , and its resistance value is the objective. is lower than the resistance value of
12 is a metal containing the constituent element of the semiconductor layer 11 (silicon in this case) and vacancy, such as aluminum (hereinafter abbreviated as "Al (Si)"), which is formed by a sputtering method and contains 2 to 3% silicon. The first electrode 12 has a thickness of 1.5 μm, and the first electrode 12 is an insulating film 1 deposited on the surface of the semiconductor layer 11 and the substrate 10.
3, and the other end of the semiconductor layer 11 is in direct contact with the second electrode 16 through another contact hole 15 formed in the insulating film 13. There is. The second electrode may be made of metal such as Al (Si), or may be made of polycrystalline silicon or amorphous silicon.

第4図の構成の抵抗体の第1電極12を陽極と
し第2電極16を陰極とし前記抵抗体に実際に使
用する電流よりはるかに大きな電流値、例えばコ
ンタクトにおける平均電流密度で4×104A/cm2
の直流電流を流す。このように抵抗体に大きな直
流電流を流すと第1電極12と半導体層11の接
する端部17において電流密度が高くなり、半導
体層11から第1電極12へ流入する電子が端部
17の第1電極中のシリコン(以下「Si」と略す
る。)を移動させるので端部17中のSi濃度が低
下し、これを補うように基板10中のSiが第1電
極12中へ溶出する。その結果端部17の基板1
0中にボイドが形成される。それと同時に端部1
7の第1電極12中のアルミニウム(以下「Al」
と略する。)も流入する電子により第1電極12
中を移動させられる。このときAlの移動は第1
電極12中に存在するvacancyとAlが置換される
ことによつて進行し、このvacancyが端部17に
移動して来て多数のvacancyが集合して端部17
の第1電極12中にボイドが形成される。
The first electrode 12 of the resistor configured as shown in FIG. 4 is an anode, the second electrode 16 is a cathode, and the current value is much larger than the current actually used in the resistor, for example, the average current density at the contact is 4×10 4 A/ cm2
A direct current of . When a large direct current is passed through the resistor in this way, the current density becomes high at the end 17 where the first electrode 12 and the semiconductor layer 11 are in contact, and the electrons flowing from the semiconductor layer 11 to the first electrode 12 are Since the silicon (hereinafter abbreviated as "Si") in one electrode is moved, the Si concentration in the end portion 17 decreases, and the Si in the substrate 10 is eluted into the first electrode 12 to compensate for this. As a result, the end 17 of the substrate 1
A void is formed in 0. At the same time, end 1
Aluminum (hereinafter referred to as “Al”) in the first electrode 12 of No. 7
It is abbreviated as ) also flows into the first electrode 12 due to the inflowing electrons.
You can move inside. At this time, the movement of Al is the first
The process progresses as the vacancy and Al existing in the electrode 12 are replaced, and this vacancy moves to the end 17 and a large number of vacancies gather to form the end 17.
A void is formed in the first electrode 12 of.

第5図は、このように大きな直流電流を流しボ
イドが形成された後の抵抗体の断面を示したもの
で、18が通電により形成されたボイドであり、
18aは基板10中のボイドで、18bは第1電
極12中のボイドである。このボイドの長さは通
電する直流電流値が大きくなるほどまた通電時間
が長くなるほど長くなる。第5図の構造の抵抗体
では、ボイド中に電流が流れないため第1電極1
2及び第2電極16間の電流路の長さが第4図の
構造のものに比べ大体ボイド18の長さlの分だ
け長くなるので抵抗体の抵抗値が大きくなる。し
たがつて通電時間を適当に設定し直流電流を通電
することにより抵抗体の抵抗値を所定値だけ修正
して目的とする抵抗値を得ることができる。また
形成されるボイド18の長さによつて抵抗値を修
正するので連続的にかつ精度よく抵抗値を修正す
ることができる。
FIG. 5 shows the cross section of the resistor after a large DC current is applied and voids are formed, and 18 is the void formed by the current flow.
18a is a void in the substrate 10, and 18b is a void in the first electrode 12. The length of this void increases as the DC current value increases and as the current conduction time increases. In the resistor with the structure shown in Fig. 5, since no current flows in the void, the first electrode 1
Since the length of the current path between the void 18 and the second electrode 16 is longer than that of the structure shown in FIG. 4 by approximately the length l of the void 18, the resistance value of the resistor increases. Therefore, by appropriately setting the energization time and energizing the DC current, the resistance value of the resistor can be modified by a predetermined value to obtain the desired resistance value. Furthermore, since the resistance value is corrected depending on the length of the void 18 formed, the resistance value can be corrected continuously and accurately.

上記実施例において直流電流を抵抗体に流す際
に、抵抗体を恒温槽に入れ抵抗体の周囲温度をあ
る一定の高い所定の温度、例えば300℃に保つた
ままで通電してもよい。このように抵抗体の周囲
温度を高温にして通電した場合には直流電流の通
電による自己発熱分と周囲温度の相乗効果により
Si又はAlの移動(以下「エレクトロマイグレー
シヨン」という)を容易に起こすことができより
短い時間でボイドを形成することができるので短
時間で抵抗値の修正を行うことができる。ただし
この温度は第1電極12を構成する材料である
Al(Si)が基板10と反応を起こさないような温
度例えば約450℃以下であることが必要である。
In the above embodiment, when direct current is applied to the resistor, the resistor may be placed in a constant temperature bath and the current may be applied while the ambient temperature of the resistor is maintained at a certain high predetermined temperature, for example, 300°C. In this way, when the ambient temperature of the resistor is high and the current is applied, due to the synergistic effect of self-heating due to the application of DC current and the ambient temperature,
Since the movement of Si or Al (hereinafter referred to as "electromigration") can be easily caused and voids can be formed in a shorter time, the resistance value can be corrected in a shorter time. However, this temperature is the material that makes up the first electrode 12.
It is necessary that the temperature is such that Al (Si) does not react with the substrate 10, for example, about 450° C. or lower.

なお、上記実施例に用いた抵抗体は第4図に示
した構造のものであつたが、第6図に示す構造の
抵抗体を用いてもよい。即ち絶縁膜13に穿孔さ
れたコンタクトホール14を通じて半導体層11
にオーミツクコンタクト層19及び拡散障壁層2
0を介して第1電極が設けられている。オーミツ
クコンタクト層19としては例えば厚さ500Åの
チタンを用い、拡散障壁層20としては第1電極
12より比抵抗が充分大きくエレクトロマイグレ
ーシヨンを起こしにくい材料例えば窒化チタンを
用い、この厚さは例えば500Åとする。その他の
部分で第4図と同一の構成のものについては同じ
番号を付し説明は省略する。
Although the resistor used in the above embodiment had the structure shown in FIG. 4, a resistor having the structure shown in FIG. 6 may also be used. That is, the semiconductor layer 11 is connected through the contact hole 14 formed in the insulating film 13.
Ohmic contact layer 19 and diffusion barrier layer 2
A first electrode is provided through 0. For example, titanium with a thickness of 500 Å is used as the ohmic contact layer 19, and a material such as titanium nitride, which has a resistivity sufficiently larger than that of the first electrode 12 and is less likely to cause electromigration, is used as the diffusion barrier layer 20. The thickness shall be 500Å. Other parts having the same configuration as those in FIG. 4 are given the same numbers and their explanations will be omitted.

第7図はこのような構造の抵抗体に大きな直流
電流を流した後の抵抗体の断面図である。第1電
極12中のSiは流入する電子により移動させられ
るが拡散障壁層20があるため基板10中のSiは
第1電極12へは移動できず基板10中にはボイ
ドは形成されない。一方第1電極12中のAlは
流入する電子により移動させられ第1電極12中
にはボイド18が形成される。このようにボイド
は第1電極12中にのみ形成され、基板10中に
はボイドが形成されないため、ボイドによる半導
体層11の断線を防止できかつ半導体層の抵抗値
に与える悪影響を除くことができるので抵抗体の
抵抗値の修正バラツキを少なくできより高精度に
抵抗値を修正できる。
FIG. 7 is a cross-sectional view of a resistor having such a structure after a large DC current is passed through the resistor. Although the Si in the first electrode 12 is moved by the inflowing electrons, the presence of the diffusion barrier layer 20 prevents the Si in the substrate 10 from moving to the first electrode 12, and no voids are formed in the substrate 10. On the other hand, Al in the first electrode 12 is moved by the inflowing electrons, and voids 18 are formed in the first electrode 12. In this way, voids are formed only in the first electrode 12 and no voids are formed in the substrate 10, so it is possible to prevent disconnection of the semiconductor layer 11 due to voids and to eliminate the adverse effect on the resistance value of the semiconductor layer. Therefore, variations in correction of the resistance value of the resistor can be reduced and the resistance value can be corrected with higher accuracy.

またオーミツクコンタクト層19と拡散障壁層
20の抵抗値と半導体層11の抵抗値の和が抵抗
体の抵抗値となるので本実施例のものの方が先の
実施例のものに比べて抵抗値変化率が小さい。そ
のため通電時間の少々の変動があつても抵抗値変
化の変動を極めて少なくすることができるのでよ
り高精度な抵抗値修正が可能である。また本実施
例によれば、第1電極12が基板10に直接には
接触していないので、前記第1の実施例に比べて
抵抗体の周囲温度をより高くすることができ、そ
の結果短時間での抵抗値修正が可能となる。な
お、上記2つの実施例において第1電極は
vacancyを含みSiを含まないAlであつてもよく、
他にエレクトロマイグレーシヨンを起こしやすい
材料であつてもい。オーミツクコンタクト層とし
ては他に白金シリサイドを用いてもよい。
Also, since the sum of the resistance values of the ohmic contact layer 19 and the diffusion barrier layer 20 and the resistance value of the semiconductor layer 11 is the resistance value of the resistor, the resistance value of this example is higher than that of the previous example. The rate of change is small. Therefore, even if there is a slight variation in the energization time, the variation in the resistance value can be extremely reduced, so that the resistance value can be corrected with higher precision. Furthermore, according to this embodiment, since the first electrode 12 is not in direct contact with the substrate 10, the ambient temperature of the resistor can be made higher than in the first embodiment, and as a result, the It is possible to modify the resistance value over time. In addition, in the above two embodiments, the first electrode is
It may be Al that contains vacancy and does not contain Si,
It may also be a material that is prone to electromigration. Platinum silicide may also be used as the ohmic contact layer.

第8図は抵抗体の周囲温度を300℃として電流
密度4×104A/cm2で通電した場合の抵抗値の変
化率と通電時間との関係を示したものである。a
は第1電極としてAl(Si)を用いた場合であり、
bは第1電極をAl(Si)とし第1電極12と半導
体層11との間にオーミツクコンタクト層19及
び拡散障壁層20を設けた場合の特性図である。
曲線aに示すように通電時間を長くすればするほ
ど抵抗値の変化率は大きくなる。したがつて適当
な時間直流電流を通電して抵抗体形成時の抵抗値
より大きくなるよう修正して目的の抵抗値を有す
る抵抗体を得ることができる。曲線bは曲線aに
比べ抵抗値の変化率の時間に対する変化がゆるや
かであるから、通電時間が多少変動しても高精度
な抵抗値制御が可能であることを示している。
FIG. 8 shows the relationship between the rate of change in resistance value and the current application time when current is applied at a current density of 4×10 4 A/cm 2 with the ambient temperature of the resistor being 300°C. a
is the case when Al (Si) is used as the first electrode,
b is a characteristic diagram when the first electrode is made of Al (Si) and an ohmic contact layer 19 and a diffusion barrier layer 20 are provided between the first electrode 12 and the semiconductor layer 11.
As shown by curve a, the longer the current application time, the greater the rate of change in resistance value. Therefore, a resistor having a desired resistance value can be obtained by applying a direct current for an appropriate period of time to correct the resistance value to be greater than the resistance value at the time of forming the resistor element. Since curve b shows a gradual change in the rate of change in resistance value over time compared to curve a, this shows that highly accurate resistance value control is possible even if the energization time varies somewhat.

第9図は、第8図の曲線aの特性を示す構造の
半導体装置におけるボイドの長さと抵抗値変化と
の関係を示したものである。縦軸は第1電極12
の端から第2電極16の端までの距離Lでボイド
18の長さlを割つた値を示し、横軸は抵抗値の
変化率を示している。図から、通電により形成さ
れるボイド18の長さが長くなるにしたがい抵抗
値の変化が大きくなることがわかる。
FIG. 9 shows the relationship between void length and resistance value change in a semiconductor device having a structure exhibiting the characteristic of curve a in FIG. 8. The vertical axis is the first electrode 12
The value obtained by dividing the length l of the void 18 by the distance L from the end of the second electrode 16 to the end of the second electrode 16 is shown, and the horizontal axis shows the rate of change in resistance value. From the figure, it can be seen that as the length of the void 18 formed by energization increases, the change in resistance value increases.

以上述べたようにして抵抗値が修正された抵抗
体はその後の使用時に通電される電流によつて抵
抗値が殆ど変動しないことが必要である。ところ
で本発明に利用したエレクトロマイグレーシヨン
が発生する条件は次の式にしたがうことがよく知
られている。
It is necessary that the resistance value of the resistor whose resistance value has been corrected as described above hardly fluctuates due to the current applied during subsequent use. By the way, it is well known that the conditions under which the electromigration used in the present invention occurs is according to the following equation.

t=A/J2exp(Ea/kT) Aは定数、Jは電流密度、Eaは活性化エネル
ギ、kはボルノマン定数、Tは絶対温度である。
この式から実使用状態における抵抗値の安定性を
見積ることができる。即ち、実使用の電流密度が
4×103A/cm2、実使用温度が50℃の場合には、
活性化エネルギを1.4eVとすると、第8図の特性
aと同一の抵抗値変化を示す時間は抵抗値変化の
ための通電時間の約1011倍となり、実使用上は殆
ど抵抗値の変化はないことになる。
t=A/J 2 exp (Ea/kT) A is a constant, J is a current density, Ea is an activation energy, k is Bornoman's constant, and T is an absolute temperature.
From this equation, it is possible to estimate the stability of the resistance value under actual usage conditions. In other words, when the actual current density is 4×10 3 A/cm 2 and the actual operating temperature is 50°C,
When the activation energy is 1.4 eV, the time required to show the same resistance change as characteristic a in Figure 8 is approximately 10 to 11 times the energization time for the resistance change, and in actual use there is almost no resistance change. There will be no.

第10図は半導体装置又はLSIに本発明の抵抗
値修正法を適用する場合の抵抗体を含む回路の一
例を示したもので、トランジスタのベース抵抗を
修正する場合の回路例である。21はトランジス
タで、22はベースに接続された抵抗体で、23
は前記抵抗体の第1電極及び第2電極にそれぞれ
接続されるパツドである。
FIG. 10 shows an example of a circuit including a resistor when the resistance value modification method of the present invention is applied to a semiconductor device or LSI, and is an example of a circuit when modifying the base resistance of a transistor. 21 is a transistor, 22 is a resistor connected to the base, 23
are pads connected to the first and second electrodes of the resistor, respectively.

以上説明したように、本発明によれば、半導体
層の所定領域上に設けられた金属層から成る第1
電極を陽極として抵抗体に直流電流を通電してボ
イドを発生させこのボイドの長さによつて抵抗体
の抵抗値を修正するものであるため、抵抗値を連
続的にかつ高精度に修正できる利点がある。
As explained above, according to the present invention, the first
Since the electrode is used as an anode and direct current is passed through the resistor to generate voids and the resistance value of the resistor is adjusted based on the length of the void, the resistance value can be adjusted continuously and with high precision. There are advantages.

更に用いる抵抗体としては、従来のもののよう
に余分な調節用抵抗体が不要であるため素子の占
有面積を少なくすることができ集積度を向上させ
ることができる。また特にアナログLSIにおいて
は、従来必要であつた高価な調節用抵抗を用いな
くてすむので、本発明を用いて小型で高密度のア
ナログLSIを廉価で実現できる等種々の利点があ
る。
Furthermore, since an extra resistor for adjustment unlike the conventional resistor is not required, the area occupied by the element can be reduced and the degree of integration can be improved. In particular, in analog LSIs, there is no need to use expensive adjustment resistors that were conventionally required, so the present invention has various advantages such as the ability to realize small, high-density analog LSIs at low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は従来の抵抗値修正法に用い
る抵抗体の平面図、第3図は本発明の抵抗値修正
法の一実施例に用いる抵抗体の平面図、第4図は
第3図の抵抗体の断面図、第5図は第4図の抵抗
体の抵抗値を修正した後の抵抗体の断面図、第6
図は本発明の抵抗値修正法の他の実施例に用いる
抵抗体の断面図、第7図は第6図の抵抗体の抵抗
値を修正した後の抵抗体の断面図、第8図は抵抗
体の抵抗値の変化率と通電時間の関係を示す図、
第9図はボイドの長さと抵抗値の変化率との関係
を示す図である。第10図は本発明をLSIに適用
する場合の回路の一例である。 10…基板、11…半導体層、12…第1電
極、13…絶縁膜、14,15…コンタクトホー
ル、16…第2電極、18,18a,18b…ボ
イド、19…オーミツクコンタクト層、20…拡
散障壁層。
1 and 2 are plan views of a resistor used in a conventional resistance value correction method, FIG. 3 is a plan view of a resistor used in an embodiment of the resistance value correction method of the present invention, and FIG. Figure 3 is a cross-sectional view of the resistor, Figure 5 is a cross-sectional view of the resistor in Figure 4 after the resistance value has been corrected, and Figure 6 is a cross-sectional view of the resistor in Figure 4.
The figure is a sectional view of a resistor used in another embodiment of the resistance value correction method of the present invention, FIG. 7 is a sectional view of the resistor after the resistance value of the resistor in FIG. A diagram showing the relationship between the rate of change in the resistance value of a resistor and the energization time,
FIG. 9 is a diagram showing the relationship between void length and rate of change in resistance value. FIG. 10 is an example of a circuit when the present invention is applied to an LSI. DESCRIPTION OF SYMBOLS 10... Substrate, 11... Semiconductor layer, 12... First electrode, 13... Insulating film, 14, 15... Contact hole, 16... Second electrode, 18, 18a, 18b... Void, 19... Ohmic contact layer, 20... Diffusion barrier layer.

Claims (1)

【特許請求の範囲】 1 目的の抵抗値よりも低い抵抗値を有する半導
体層とこの半導体層の所定領域上に設けられた金
属から成る第1電極と前記半導体層の他の所定領
域上に設けられた第2電極とを備えた抵抗体の第
1電極を陽極とし第2電極を陰極とし前記抵抗体
に直流電流を通電することによりボイドを発生さ
せ抵抗体の抵抗値を修正する抵抗値修正法。 2 特許請求の範囲第1項記載の抵抗値修正法に
おいて、前記第1電極が前記半導体層の所定領域
に直接接触するように設けられた抵抗体を用いる
ことを特徴とする抵抗値修正法。 3 特許請求の範囲第1項記載の抵抗値修正法に
おいて、前記第1電極が前記半導体層の所定領域
にオーミツクコンタクト層及び拡散障壁層を介し
て設けられた抵抗体を用いることを特徴とする抵
抗値修正法。
[Claims] 1. A semiconductor layer having a resistance value lower than a target resistance value, a first electrode made of metal provided on a predetermined region of this semiconductor layer, and a first electrode provided on another predetermined region of the semiconductor layer. Resistance value correction that corrects the resistance value of a resistor by generating a void by passing a direct current through the resistor, with the first electrode of the resistor having a second electrode as an anode and the second electrode as a cathode. Law. 2. A resistance value correction method according to claim 1, characterized in that a resistor is used in which the first electrode is provided in direct contact with a predetermined region of the semiconductor layer. 3. The resistance value correction method according to claim 1, characterized in that the first electrode uses a resistor provided in a predetermined region of the semiconductor layer via an ohmic contact layer and a diffusion barrier layer. Resistance value correction method.
JP56178350A 1981-11-09 1981-11-09 Method of correcting resistance value Granted JPS5880803A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56178350A JPS5880803A (en) 1981-11-09 1981-11-09 Method of correcting resistance value

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56178350A JPS5880803A (en) 1981-11-09 1981-11-09 Method of correcting resistance value

Publications (2)

Publication Number Publication Date
JPS5880803A JPS5880803A (en) 1983-05-16
JPS632153B2 true JPS632153B2 (en) 1988-01-18

Family

ID=16046949

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56178350A Granted JPS5880803A (en) 1981-11-09 1981-11-09 Method of correcting resistance value

Country Status (1)

Country Link
JP (1) JPS5880803A (en)

Also Published As

Publication number Publication date
JPS5880803A (en) 1983-05-16

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