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JPS6322755B2 - - Google Patents
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JPS6322755B2 - - Google Patents

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Publication number
JPS6322755B2
JPS6322755B2 JP14313382A JP14313382A JPS6322755B2 JP S6322755 B2 JPS6322755 B2 JP S6322755B2 JP 14313382 A JP14313382 A JP 14313382A JP 14313382 A JP14313382 A JP 14313382A JP S6322755 B2 JPS6322755 B2 JP S6322755B2
Authority
JP
Japan
Prior art keywords
silicon
voltage
controlled
controlled rectifier
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14313382A
Other languages
Japanese (ja)
Other versions
JPS5932261A (en
Inventor
Tsutomu Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57143133A priority Critical patent/JPS5932261A/en
Publication of JPS5932261A publication Critical patent/JPS5932261A/en
Publication of JPS6322755B2 publication Critical patent/JPS6322755B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/18Generation of supply voltages, in combination with electron beam deflecting

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Details Of Television Scanning (AREA)
  • Dc-Dc Converters (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、テレビジヨン受像機等に使用される
シリコン制御整流素子を使用した電源回路に関す
る。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a power supply circuit using a silicon-controlled rectifying element used in television receivers and the like.

従来例の構成とその問題点 従来、この種の電源回路は第1図のように構成
されている。交流電源入力端子1より4つのダイ
オード2,3,4,5とコンデンサ6とから成る
整流平滑回路7を介して直流電源入力端子8に被
制御直流入力電圧B1〔非安定化直流入力電圧〕を
供給し、この直流入力電圧B1をチヨークトラン
ク9の1次巻線10、水平出力トランス11の3
次巻線12を介してシリコン制御整流素子13の
アノードに印加し、このシリコン制御整流素子1
3のカソードに導出される直流出力電圧B2を水
平出力回路14に印加している。
Conventional configuration and problems thereof Conventionally, this type of power supply circuit has been configured as shown in FIG. A controlled DC input voltage B 1 is supplied from the AC power input terminal 1 to the DC power input terminal 8 via a rectifying and smoothing circuit 7 consisting of four diodes 2, 3, 4, 5 and a capacitor 6. [Unregulated DC input voltage] This DC input voltage B1 is applied to the primary winding 10 of the choke trunk 9 and the horizontal output transformer 11.
The voltage is applied to the anode of the silicon-controlled rectifier 13 via the next winding 12, and the silicon-controlled rectifier 1
A DC output voltage B 2 derived from the cathode of No. 3 is applied to the horizontal output circuit 14 .

ここで水平出力回路14は水平出力トランス1
1に加えて、水平出力トランジスタ15、ダンパ
ーダイオード16、共振コンデンサ17、異常パ
ルス吸収用のダイオード18、抵抗19、コンデ
ンサ20、水平偏向コイル21およびS字補正用
コンデンサ22から構成されている。また、26
はシリコン制御整流素子13の始動パルス供給回
路で、定電圧ダイオード40のアノードにダイオ
ード41のアノードを接続して構成されており、
定電圧ダイオード40のカソードが直流電源入力
端子8に接続され、ダイオード41のカソードは
シリコン制御整流素子13のゲート電極27に接
続されている。ゲート電極27は抵抗28を介し
てシリコン制御整流素子13のカソードに接続さ
れている。また、シリコン制御整流素子13のカ
ソード、すなわち電源出力端子29はコンデンサ
30を介して接地されると共に抵抗31を介して
直流電源入力端子8に接続されている。チヨーク
トランク9の2次巻線32の一端はダイオード3
3を介して接地され、他端は電源出力端子29に
接続されている。電源出力端子29に導出される
直流出力電圧B2は、抵抗34、定電圧ダイオー
ド35、コンデンサ36によつて降圧かつ安定化
されて電源供給端子37から誤差検出位相制御回
路38に供給される。
Here, the horizontal output circuit 14 is the horizontal output transformer 1
1, it is composed of a horizontal output transistor 15, a damper diode 16, a resonant capacitor 17, a diode 18 for absorbing abnormal pulses, a resistor 19, a capacitor 20, a horizontal deflection coil 21, and an S-shaped correction capacitor 22. Also, 26
is a starting pulse supply circuit for the silicon-controlled rectifying element 13, which is constructed by connecting the anode of a diode 41 to the anode of a constant voltage diode 40;
The cathode of the constant voltage diode 40 is connected to the DC power input terminal 8 , and the cathode of the diode 41 is connected to the gate electrode 27 of the silicon-controlled rectifying element 13 . Gate electrode 27 is connected to the cathode of silicon-controlled rectifier 13 via resistor 28 . Further, the cathode of the silicon-controlled rectifier 13 , that is, the power output terminal 29 is grounded via a capacitor 30 and connected to the DC power input terminal 8 via a resistor 31 . One end of the secondary winding 32 of the chiyoke trunk 9 is connected to the diode 3.
3, and the other end is connected to a power output terminal 29. The DC output voltage B 2 derived from the power supply output terminal 29 is stepped down and stabilized by the resistor 34 , the voltage regulator diode 35 , and the capacitor 36 , and is supplied from the power supply terminal 37 to the error detection phase control circuit 38 .

このように構成される定電圧電源回路におい
て、電源スイツチ39を閉成して整流平滑回路7
に入力交流電圧を供給しているときには、直流電
源入力端子8に整流平滑された被制御直流入力電
圧B1が導出され、この被制御直流入力電圧B1
パルストランス9の1次巻線10、水平出力トラ
ンス11の3次巻線12、およびシリコン制御整
流素子13を介して制御され、電源出力端子29
に電圧安定化された直流出力電圧B2が導出され、
この直流出力電圧B2が水平出力回路14に供給
されると共に抵抗34を介して降圧されたのち誤
差検出位相制御回路38にも供給される。
In the constant voltage power supply circuit configured as described above, the power switch 39 is closed and the rectification smoothing circuit 7 is closed.
When input AC voltage is being supplied to the DC power supply input terminal 8, a rectified and smoothed controlled DC input voltage B1 is derived, and this controlled DC input voltage B1 is applied to the primary winding 10 of the pulse transformer 9. , the tertiary winding 12 of the horizontal output transformer 11, and the silicon-controlled rectifier 13, and the power output terminal 29
The voltage stabilized DC output voltage B 2 is derived as
This DC output voltage B 2 is supplied to the horizontal output circuit 14 and is also supplied to the error detection phase control circuit 38 after being stepped down via the resistor 34 .

電源スイツチ39を投入すると、先ず、始動パ
ルス供給回路26が作動してシリコン制御整流素
子13のゲート電極27に始動パルスが供給され
る。これによつてシリコン制御整流素子13がト
リガーされてターンオンし、電源入力端子8より
チヨークトランス9の巻線10、水平出力トラン
ス11の3次巻線12を介してコンデンサ30が
充電される。コンデンサ30がある電圧まで充電
されると、水平出力回路14が水平偏向動作を開
始し、また誤差検出位相制御回路38も動作準備
完了となり、水平出力回路14が完全に動作を開
始する。
When the power switch 39 is turned on, the starting pulse supply circuit 26 is activated and a starting pulse is supplied to the gate electrode 27 of the silicon-controlled rectifying element 13. This triggers the silicon-controlled rectifying element 13 to turn on, and the capacitor 30 is charged from the power input terminal 8 via the winding 10 of the choke transformer 9 and the tertiary winding 12 of the horizontal output transformer 11. When capacitor 30 is charged to a certain voltage, horizontal output circuit 14 begins horizontal deflection operation, error detection phase control circuit 38 is also ready for operation, and horizontal output circuit 14 begins to operate completely.

以上説明の従来回路では、整流平滑回路7とシ
リコン制御整流素子13のゲート電極27間に始
動パルス供給回路26を設け、電源スイツチ39
を投入すると直流電源入力端子8に被制御直流入
力電圧B1が導出され、シリコン制御整流素子1
3のカソードに導出される直流出力電圧をB2
定電圧ダイオード40のツエナー電圧をEzとする
と、B1−B2>Ezとなれば定電圧ダイオード40
及びダイオード41が導通して始動パルス供給回
路26が作動し、シリコン制御整流素子13がタ
ーンオンして直流出力電圧B2が上昇して定格値
となり水平出力回路14等を起動する。
In the conventional circuit described above, the starting pulse supply circuit 26 is provided between the rectifying and smoothing circuit 7 and the gate electrode 27 of the silicon-controlled rectifying element 13, and the power supply switch 39
When input, the controlled DC input voltage B1 is derived from the DC power input terminal 8, and the silicon controlled rectifier element 1
The DC output voltage derived to the cathode of 3 is B 2 ,
If the Zener voltage of the voltage regulator diode 40 is E z , then if B 1 −B 2 > E z , the voltage regulator diode 40
Then, the diode 41 becomes conductive, the starting pulse supply circuit 26 is activated, the silicon-controlled rectifying element 13 is turned on, and the DC output voltage B 2 rises to the rated value, starting the horizontal output circuit 14 and the like.

しかしながら、この種の従来回路は、定電圧ダ
イオード40のツエナー電圧Ezにより作動する構
成のため、電源電圧が定格値よりも高くなつた場
合、 B1−Ez>B2 …… といつた関係になると、誤差検出位相制御回路3
8の動作には関係なくシリコン制御整流素子13
はターンオンしてしまう。そのためツエナー電圧
Ezは高い値に選ぶ必要がある。一方、電源電圧が
定格値よりも低くなつた場合、発振スタートの開
始電圧は、 B1−B2>Ez …… といつた関係を満足しなければならず、ツエナー
電圧Ezを高い値に選ぶと電源電圧が定格値よりも
低くなつた所では発振スタートしないといつた問
題が発生する。このように従来回路では定電圧ダ
イオード40のツエナー電圧Ezによる制約で、電
源電圧の使用範囲が狭いといつた欠点があつた。
However, this type of conventional circuit is configured to operate based on the Zener voltage Ez of the voltage regulator diode 40, so when the power supply voltage becomes higher than the rated value, B1 - Ez > B2 ... When it comes to the relationship, the error detection phase control circuit 3
Regardless of the operation of 8, the silicon controlled rectifier 13
turns on. Therefore the zener voltage
It is necessary to choose a high value for E z . On the other hand, when the power supply voltage becomes lower than the rated value, the starting voltage for oscillation start must satisfy the following relationship: B 1 − B 2 > E z ..., and the Zener voltage E z must be set to a higher value. If this is selected, a problem will occur where oscillation will not start when the power supply voltage drops below the rated value. As described above, the conventional circuit has the drawback that the usable range of the power supply voltage is narrow due to the restriction due to the Zener voltage Ez of the voltage regulator diode 40.

発明の目的 本発明は上記従来の欠点を解消するもので、電
源電圧の使用範囲が広いものを提供することを目
的とする。
OBJECTS OF THE INVENTION The present invention solves the above-mentioned conventional drawbacks, and aims to provide a device that can be used over a wide range of power supply voltages.

発明の構成 本発明の電源回路は、直流電源入力端子に導出
された被制御直流入力電圧をシリコン制御整流素
子を用いて安定化するように構成すると共に、シ
リコン制御整流素子の始動パルス供給回路とし
て、被制御直流入力電圧を分割抵抗で直接降圧
し、その分割抵抗の中点を一端が接地されたシリ
コン双方向スイツチング素子の他端に電流阻止用
抵抗を介して接続し、トランジスタのエミツタを
分割抵抗の中点に接続しPNPトランジスタのベ
ースをシリコン双方向スイツチング素子の他端に
接続して構成し、トランジスタのコレクタよりダ
イオードを順方向に接続して前記シリコン制御整
流素子のゲート電極に、始動パルスを供給するこ
とを特徴とする。
Structure of the Invention The power supply circuit of the present invention is configured to stabilize the controlled DC input voltage derived to the DC power input terminal using a silicon-controlled rectifier, and also serves as a starting pulse supply circuit for the silicon-controlled rectifier. , the controlled DC input voltage is directly stepped down by a dividing resistor, and the midpoint of the dividing resistor is connected to the other end of a silicon bidirectional switching element, one end of which is grounded, via a current blocking resistor, and the emitter of the transistor is divided. The base of the PNP transistor is connected to the midpoint of the resistor and connected to the other end of the silicon bidirectional switching element, and a diode is connected in the forward direction from the collector of the transistor to the gate electrode of the silicon controlled rectifier. It is characterized by supplying pulses.

実施例の説明 以下、本発明の一実施例を第2図と第3図に基
づいて説明する。なお、第1図と同様のものには
同一符号を付けてその説明を省く。
DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. 2 and 3. Components similar to those in FIG. 1 are given the same reference numerals and their explanations will be omitted.

本実施例の電源回路の始動パルス供給回路26
は次のように構成されている。
Starting pulse supply circuit 26 of the power supply circuit of this embodiment
is structured as follows.

第2図において、整流平滑回路7の出力端の直
流電源入力端子8に導出された被制御直流入力電
圧B1を、分割抵抗42及び43にて分割降圧し、
分割抵抗42及び43の中点より電流阻止用抵抗
44を介して、一端が接地されたシリコン双方向
スイツチング素子〔以下、SBSと称す〕45の他
端に接続する。また、分割抵抗42及び43の中
点にはPNPトランジスタ46のエミツタが接続
され、PNPトランジスタ46のベースは電流阻
止用抵抗44とSBS45との交点に接続され、
PNPトランジスタ46のコレクタよりダイオー
ド47を順方向に接続し、ダイオード47のカソ
ードをシリコン制御整流素子13のゲート電極2
7に接続し、始動パルス供給回路26を構成して
いる。
In FIG. 2, the controlled DC input voltage B1 derived to the DC power supply input terminal 8 at the output end of the rectifying and smoothing circuit 7 is divided and stepped down by dividing resistors 42 and 43.
The midpoint between the dividing resistors 42 and 43 is connected via a current blocking resistor 44 to the other end of a silicon bidirectional switching element (hereinafter referred to as SBS) 45 whose one end is grounded. Further, the emitter of a PNP transistor 46 is connected to the midpoint of the dividing resistors 42 and 43, and the base of the PNP transistor 46 is connected to the intersection of the current blocking resistor 44 and the SBS 45.
A diode 47 is connected in the forward direction from the collector of the PNP transistor 46, and the cathode of the diode 47 is connected to the gate electrode 2 of the silicon-controlled rectifier 13.
7 to constitute a starting pulse supply circuit 26.

このように構成したため、電源スイツチ39を
投入すると、整流平滑回路7を介して直流電源入
力端子8に直流入力電圧B1が導出され、分割抵
抗42及び43によつて分割降圧された電圧B3
がSBS45のスイツチング電圧Vsよりも高くな
ると電流阻止用抵抗44を介してSBS45はオン
状態となり、PNPトランジスタ46のベース電
流が流れるため、PNPトランジスタ46はオン
状態となり、ダイオード47を介してシリコン制
御整流素子13のゲート電極27に電流が流れ、
シリコン制御整流素子13がターンオンして直流
出力電圧B2が上昇して定格値となり水平出力回
路14等を起動する。また、SBS45は第3図の
特性に示すように、一旦オンした後はオン電圧
VTまで急速に下がつてオン電圧VTを保持しつづ
ける特性を持つた素子である。このような特性を
もつた素子が必要な理由は、シリコン制御整流素
子13のゲート電圧VG規格に対してSBS45の
スイツチング電圧Vsは十分に高い電圧が必要で
あるが、一旦シリコン制御整流素子13がターン
オンした後は誤差検出位相制御回路38よりのゲ
ートパルスによつてシリコン制御整流素子13を
制御するので始動パルス供給回路26からの影響
をなくしておくためである。シリコン制御整流素
子13のゲート電圧は最低3ボルトであり、SBS
45のスイツチング電圧Vsは約8ボルト、オン
電圧VTは1.4ボルトである。IHは保持電流である。
With this configuration, when the power switch 39 is turned on, the DC input voltage B 1 is derived to the DC power input terminal 8 via the rectifier and smoothing circuit 7, and the voltage B 3 is divided and stepped down by the dividing resistors 42 and 43.
When becomes higher than the switching voltage Vs of SBS 45, SBS 45 is turned on through the current blocking resistor 44, and the base current of PNP transistor 46 flows, so PNP transistor 46 is turned on, and silicon controlled rectification is performed through diode 47. A current flows through the gate electrode 27 of the element 13,
The silicon-controlled rectifying element 13 is turned on, and the DC output voltage B2 rises to the rated value, starting the horizontal output circuit 14 and the like. In addition, as shown in the characteristics in Figure 3, SBS45 once turns on, the on-voltage
This element has the characteristic of rapidly decreasing to V T and continuing to maintain the on-voltage V T . The reason why an element with such characteristics is necessary is that the switching voltage Vs of the SBS45 needs to be sufficiently high compared to the gate voltage V G standard of the silicon-controlled rectifier 13, but once the silicon-controlled rectifier 13 is turned on, the silicon-controlled rectifying element 13 is controlled by the gate pulse from the error detection phase control circuit 38, so that the influence from the starting pulse supply circuit 26 is eliminated. The gate voltage of the silicon controlled rectifier 13 is at least 3 volts, and the SBS
The switching voltage V s of the 45 is approximately 8 volts, and the on-voltage V T is 1.4 volts. I H is the holding current.

このため、シリコン制御整流素子13がターン
オンした後、始動パルス供給回路26の出力はシ
リコン制御整流素子13のゲート電圧VGより十
分に低い値に保持されるため、二度とシリコン制
御整流素子13に影響を与えることはない。
Therefore, after the silicon-controlled rectifier 13 is turned on, the output of the starting pulse supply circuit 26 is maintained at a value sufficiently lower than the gate voltage V G of the silicon-controlled rectifier 13, so that it will never affect the silicon-controlled rectifier 13 again. will not be given.

発明の効果 以上のように本発明によれば次の効果を得るこ
とができる。
Effects of the Invention As described above, according to the present invention, the following effects can be obtained.

本発明の電源回路における始動パルス供給回路
は、シリコン双方向スイツチング素子の特性によ
り作動するため、従来のツエナー電圧によるもの
の欠点であつた電源電圧の使用範囲が狭くて電源
電圧の規制を受けると云つたことなく、広範囲に
わたつて常に良好な始動パルス供給動作を行うこ
とができ、確実、かつ安定に水平出力回路等の起
動をなし得るものである。
Since the starting pulse supply circuit in the power supply circuit of the present invention operates based on the characteristics of a silicon bidirectional switching element, the usage range of the power supply voltage is narrow and is subject to power supply voltage regulations, which was a drawback of the conventional Zener voltage. It is possible to always perform a good starting pulse supply operation over a wide range without any trouble, and to start the horizontal output circuit etc. reliably and stably.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の電源回路図、第2図は本発明の
電源回路の一実施例の回路図、第3図はシリコン
双方向スイツチング素子の静特性図である。 8……直流電源入力端子、13……シリコン制
御整流素子、26……始動パルス供給回路、27
……ゲート電極、42,43……分割抵抗、44
……電流阻止用抵抗、45……シリコン双方向ス
イツチング素子、46……PNPトランジスタ、
47……ダイオード。
FIG. 1 is a conventional power supply circuit diagram, FIG. 2 is a circuit diagram of an embodiment of the power supply circuit of the present invention, and FIG. 3 is a static characteristic diagram of a silicon bidirectional switching element. 8...DC power supply input terminal, 13...Silicon controlled rectifier, 26...Starting pulse supply circuit, 27
...Gate electrode, 42, 43...Division resistor, 44
... Current blocking resistor, 45 ... Silicon bidirectional switching element, 46 ... PNP transistor,
47...Diode.

Claims (1)

【特許請求の範囲】[Claims] 1 直流電源入力端子に加えられた被制御直流入
力電圧をシリコン制御整流素子を用いて安定化し
て出力するように構成すると共に、前記シリコン
制御整流素子の始動パルス供給回路として、前記
被制御直流入力電圧を分割抵抗で直接降圧し、そ
の分割抵抗の中点を一端が接地されたシリコン双
方向スイツチング素子の他端に電流阻止用抵抗を
介して接続し、トランジスタのエミツタを前記分
割抵抗の中点に接続し前記トランジスタのベース
を前記シリコン双方向スイツチング素子の前記他
端に接続して構成し、前記トランジスタのコレク
タよりダイオードを順方向に接続して前記シリコ
ン制御整流素子のゲート電極に始動パルスを供給
するようにした電源回路。
1 The controlled DC input voltage applied to the DC power input terminal is stabilized and output using a silicon-controlled rectifier, and the controlled DC input is used as a starting pulse supply circuit for the silicon-controlled rectifier. The voltage is directly stepped down by a dividing resistor, the midpoint of the dividing resistor is connected to the other end of a silicon bidirectional switching element whose one end is grounded via a current blocking resistor, and the emitter of the transistor is connected to the midpoint of the dividing resistor. The base of the transistor is connected to the other end of the silicon bidirectional switching element, and a diode is connected in the forward direction from the collector of the transistor to apply a starting pulse to the gate electrode of the silicon controlled rectifier. A power supply circuit designed to supply power.
JP57143133A 1982-08-17 1982-08-17 Power supply circuit Granted JPS5932261A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57143133A JPS5932261A (en) 1982-08-17 1982-08-17 Power supply circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57143133A JPS5932261A (en) 1982-08-17 1982-08-17 Power supply circuit

Publications (2)

Publication Number Publication Date
JPS5932261A JPS5932261A (en) 1984-02-21
JPS6322755B2 true JPS6322755B2 (en) 1988-05-13

Family

ID=15331680

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57143133A Granted JPS5932261A (en) 1982-08-17 1982-08-17 Power supply circuit

Country Status (1)

Country Link
JP (1) JPS5932261A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0476153A (en) * 1990-07-18 1992-03-10 Sekisui Chem Co Ltd Tiling window decorative material

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4866525A (en) * 1988-11-01 1989-09-12 Thomson Consumer Electronics, Inc. Television apparatus power supply

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0476153A (en) * 1990-07-18 1992-03-10 Sekisui Chem Co Ltd Tiling window decorative material

Also Published As

Publication number Publication date
JPS5932261A (en) 1984-02-21

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