JPS6323705B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a mark reading system for optically reading a destination mark in a facsimile machine or the like.

In recent years, facsimiles have become faster and more systematized, and various methods have been proposed for reading destination marks using facsimile scanning in order to connect to a broadcasting device or the like and transmit the same data to a large number of destinations. FIG. 1 shows a conventionally used format for a destination mark. In this method, reference marks M _A , _MB are provided on the destination entry form 1 so that they can be read with a scanner, and areas for destination marks (input fields) N _A , N _B . . . are provided between the reference marks M _A , M _B . Desired destinations A, B,
A bar-shaped destination mark L _I is written in a readable color in the area corresponding to C... (N _I in this example). In such a format, destinations are read at the destination mark position from the reference mark, so if the number of planned destinations (A to N) is small, no problem will occur, but if the number of destinations increases, the area per destination will increase.
There is a drawback that the width of N _A , N _B . . . cannot be made large, and destination misidentification is likely to occur due to deviations in the scanning direction of the scanner.

The present invention is an attempt to improve such a drawback, and a plurality of reference marks having the same width are provided at regular intervals in the scanning direction of paper, and each of the adjacent reference marks has a width larger than the reference mark width. The paper is scanned with a scanner to read the reference marks and the marks written in the mark entry fields. The information corresponding to the read mark is identified based on the sequential position of the read reference mark, and it is determined whether the mark to be detected is a reference mark based on the width of the read mark. The quality of the entered mark is determined by detecting that the subsequent reference marks are occurring at the correct cycle and reading from the mark entry field when the number of detected reference marks matches the predetermined number. The gist of this is a mark reading method that is characterized by determining the following, and the drawings will be described in detail below.

FIG. 2 is a diagram showing an example of the format for the destination mark recorded on _the mark paper of the present invention. The reference marks M ₁ to _{M 5} (five in this example) are displayed in readable colors. These reference marks M ₁ to _{M 5} are arranged at equal intervals, and between each adjacent reference mark there are multiple (eight in this example) destination mark entry fields.
N _A ~ _{N H} , N _I ~ N _P , ... are displayed in drop-out colors. The method for entering destination marks in these entry fields N _A , . . . is the same as in FIG. 1. In the example of Fig. 2 _, bar-shaped _destination marks _{L F} , L _K , _{L S ,} L _Y is written in a readable color. This address entry form is stacked on top of the facsimile original and loaded into the facsimile, and the facsimile reads the address from the form and sends the address to the storage exchange, and then reads the image information from the original and sends it to the exchange. send to The exchange simultaneously sends the image information to the previously sent and stored destination.

FIG. 3 shows an image signal obtained by reading the destination entry form 1 shown in FIG. 2 with a scanner. Reference marks M ₁ , M ₂ ,...
The destination mark in the four blocks divided by
The time position of each block is detected using the reference mark at the tip of each block as a reference. For example, destination mark L _F is referenced to reference mark M ₁ and destination mark L _K
is detected using reference mark _M2 as a reference. The accuracy of determining the destination mark deteriorates as the distance from the reference mark increases due to the accumulation of distortion in the scanner in the scanning direction. Therefore, if a large number of destination code entry fields are divided into a plurality of blocks and a reference mark for determining the time position is provided at the beginning of each block as in the present invention, the detection accuracy will be higher than that shown in Fig. 1. Much improved.

In addition, in the present invention all fiducial marks M ₁ ,
Misidentification of the destination is avoided as much as possible by using whether or not M ₂ , . In other words, the reference marks M ₁ , M ₂ , ... are the second
At the stage of the address entry form 1 shown in the figure, the addresses are displayed (printed) at regular intervals in advance. Therefore,
If reading by the scanner is performed regularly in the scanning direction, the reference mark on the time axis shown in Figure 3 will be
The intervals of M ₁ , M ₂ , ... are equal. Conversely, if it is detected that the intervals between the reference marks M ₁ , M ₂ , ... in the image signal have shifted beyond the allowable range, the detection result of the time position of the read destination mark, that is, the destination determination may contain errors. Therefore, in such a case, an alarm is sent out to stop using the destination determined as a result of the determination, thereby preventing the document from being sent to the wrong destination.

Hereinafter, one embodiment of the present invention will be described with reference to FIGS. 4 and 5. FIG. 4 is a block diagram showing the timing mark (reference mark) detection circuit 2 and destination mark detection circuit 3, and FIG. 5 shows a signal waveform diagram of each part. The timing mark detection circuit 2 detects reference marks M ₁ , M ₂ , . . . from the image signal VID read by the scanner, and generates a flag out signal (timing mark) FOT in synchronization with the reference marks M 1 , M 2 , . . . . The destination mark detection circuit 3 generates a signal out signal (destination data) SOT corresponding to the destination mark from the image signal VID, and also generates a stroke signal STR for detecting the time position of the SOT with reference to the timing mark FOT.

The time chart _shown in FIG. 5 shows _one block of the destination mark entry field in _{FIG .} ...and their intervals are both set to a width of 2 mm. And the reference mark
Mark prohibition areas P ₁ and P ₂ with a width of 1 mm are provided between M ₁ and M ₂ and the next destination mark entry fields N _A and N _I. The front (left side) of the reference mark M ₁ is a blank space, and the front of the reference mark M ₂ has a 2 mm width gap between it and the entry field N _H , so the front and rear ends of both M ₁ and M ₂ are clearly defined. be identified.

The operation will be explained in order below. When the reading section detects that the sheet to be read is OMR paper, the OMR designation signal OMRE becomes level "1", and the output level of AND gate _A1 becomes "1" (the output of flip-flop _FF3 is time “1”). As a result, the flip-flop _FF1 sets the Q output to "1" at the time it receives the image signal VID of "1". When the Q output of FF ₁ becomes “1”, the counter
CNT ₁ starts counting. This CNT ₁ is a hexadecimal counter and counts the sample clock SMP at a rate of 8 pulses per 1 mm width on the OMR paper 1 (SMP is inverted by the inverter INV ₁ ). Then, the overflow output CO (“1”) drives the flip-flop _FF2 . NAND circuit NA ₁ outputs Q _A , Q _B , Q _C , Q _D of counter CNT ₁ (Q _D is the most significant digit) when it becomes “0010”, that is, “4”.
When VID is counted and FF ₂ is set, it becomes open, and if VID is "0" at this point (this is an abnormal state, and normally it is "1" as shown in the figure), the output is is set to “0”. In other words,
Q _A , Q _B , Q _D of counter CNT ₁ are inverters
Since INV ₂ , INV ₃ , and INV ₄ are inverted, Q _A
~Q When _D is "0010", these four inputs become "1111" for NA ₁ , and the output b becomes 0. Since the Q output of the flip-flop FF ₂ becomes "1" when the counter CNT ₁ overflows once, the fact that these five inputs to the NAND circuit NA ₁ are all "1" means that the sample clock SMP is 16 + 4 = 20.
This is the time of pulse counting, and the position is as shown in FIG. 5b with respect to the reference pulse _M1 . At this point, the output obtained by inverting the image signal VID with inverter INV ₅ is "1", which means that the width of the image signal is less than 20 pulses, that is, less than 2.5 mm, and this is not a regular timing signal but is caused by dirt etc. There is a strong possibility that it is noise. Conversely, if the output of the inverter INV ₅ is "0" at this point, it can be determined that it is normal, that is, the reference mark _M1 .

In other words, the reference mark M ₁ by the NAND circuit NA ₁ ,
It is checked whether the width of M ₂ .
On the other hand, the NAND circuit _NA2 checks whether the width of the reference pulse is too large, and allows the width up to 28 pulses, and considers anything larger than that to be noise. For this reason, the Nando circuit
When the counter CNT ₁ counts "12" and the flip-flop FF ₂ is set, NA ₂ changes the output c to "0" (broken line) if the image signal VID is "0" at 12+16=28 pulses. ).

The NAND circuit _NA3 outputs "0" at the time of counting 32 pulses. This 32-pulse counting point is 4 mm from the tips of the reference marks M ₁ and M ₂ , that is, the address entry field.
This corresponds to the tips of N _A ..., N _I ..., and is defined as the flag out signal FOT. NAND circuit NA ₄
When the output of any one of NA ₁ to _{NA 3} becomes "0", the output is set to "1" and flip-flop FF ₁ is reset. When flip-flop FF ₁ is reset and its Q output a becomes “0”, counter CNT ₁
stops counting, flip-flop _FF2 is reset and its Q output becomes zero. NAND circuit NA ₁ ,
When the outputs b and c of NA ₂ are "0", at that point the output of the NAND circuit NA ₄ is "1", and the flip-flop
FF ₁ is reset and the counter CNT ₁ stops counting, so 32 pulses are counted and the NAND circuit NA ₃
never outputs the flag out signal FOT.
This is fine because the "0" outputs of the NAND circuits NA ₁ and NA ₂ are the results of noise detection, and the process waits for the next correct reference mark to be detected. On the other hand, the fact that NAND circuit NA ₃ produced a "0" output after counting 32 pulses means that the detected mark is the correct reference mark and that the timing has entered the destination mark detection period. Flip-flop _FF1 and counter _CNT1 are reset and placed in a standby state in preparation for the next reference mark detection. Fifth
Waveform a in the figure shows a flip-flop in a normal state reset by the output FOT of the NAND circuit _NA3 .
This is the Q output of _FF1 .

When the flag out signal FOT is generated from the NAND circuit NA ₃ , the destination mark detection circuit 3 is driven. That is, when the flip-flop _FF3 is set by FOT, its Q output d becomes "1", making the counters _CNT2 and _CNT3 capable of counting. Counter CNT ₂ is sample clock SMP
When counting 8 pulses, it overflows,
Its output CO drives counter _CNT3 . The counter CNT ₃ outputs a signal STR' from the terminal Q _A , which is turned on and off by the CO output of the counter CNT ₂ . After this output STR' is inverted by the inverter INV ₆ , it is outputted through the open AND circuit A ₂ at the output d of the flip-flop FF ₃ to become the strobe signal STR, and then led to the AND circuit A ₄ . Open this. Since the image signal VID is led to the AND circuit _A4 , if a destination mark is detected while the AND circuit _A4 is open, it can pass through the AND circuit _A4 . In this example, destination marks L _F , L _K ... are entered in the destination mark entry fields N _F , N _K ...
are written, the signal out signal SOT corresponding to these is output.

Counter CNT ₃ generates an overflow output CO when the count reaches "15", which is sent to the AND circuit.
Supplied to one input end of _A3 . The other input terminal of AND circuit A ₃ has a counter from AND circuit A ₅ .
It receives an output that becomes "1" every 7 counts of CNT ₂ , and ultimately produces a "1" output when counting 8×15+7=127 sample clocks SMP. In other words, the number of pulses corresponding to the distance from the start of destination mark entry field N _A to the start of reference mark M ₂ (8 x 16 = 128 pulses)
Just before this occurs, the AND circuit _A3 output becomes "1" and flip-flop _FF3 is reset. Destination mark detection is now interrupted and the AND circuit
The output of _A1 becomes "1" again, flip-flop _FF1 is set, and reference mark detection circuit 2 becomes operational.

As mentioned above, the point in time when the flip-flop FF ₁ becomes operational is just before the start of the next reference mark M ₂ in the image signal VID, so the timing mark detection circuit 2 performs the same operation as described above.
As a result, when normal, the next flag out signal FOT
is generated. Of course, if NAND gates NA ₁ and NA ₂ produce outputs b and c due to distortion, noise, etc. in the scanner and flip-flop FF ₁ is reset, FOT will not be generated.

Repeat this operation, count the number of all flag-out signals FOT using another counter (not shown), and if the counted value is less than a predetermined value ("5" in the example in Figure 2), an alarm is generated as an error. Send. On the other hand, each destination mark position is detected by the count value of a counter (not shown) that counts the strobe signal STR and a counter that counts the flag out signal.
The destination is identified by decoding the count value of the strobe signal STR when SOT is output and the count value of the counter that counts the flag-out signal at the same time. Whether or not the destination data resulting from this identification is adopted depends on the presence or absence of the alarm. In other words, if an alarm is sent, the destination data determined at that time may have a detection error.
As mentioned above, this is not adopted.

With the destination mark reading method of the present invention as described above, even if the width of each destination mark entry field on OMR paper becomes narrow due to an increase in the number of destinations, it is possible to improve the detection accuracy of destination marks. The possibility of misidentification can be reduced as much as possible.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram showing an example of a conventional address entry form, Fig. 2 is an explanatory diagram showing an example of a mark entry form of the present invention, and Fig. 3 is an illustration of the mark entry form of Fig. 2 read with a scanner. FIG. 4 is a block diagram showing an embodiment of the present invention, and FIG. 5 is a waveform diagram of each part of FIG. 4. 1... Address entry form (OMR form), 2... Timing mark (reference mark) detection circuit, 3...
Destination mark detection circuit, _M1 to _M5 ...Reference mark,
N _A , N _B ... Destination mark entry field, L _D , L _F ... Destination mark, CNT ₁ to _{CNT 3} ... Counter, FF ₁ to _{FF 3}
……Flip-flop, A ₁ to A ₅ ……AND circuit,
NA ₁ ~ NA ₄ ... NAND circuit, INV ₁ ~ INV ₆ ...
inverter.

Claims (1)

[Claims] 1 A plurality of reference marks of the same width are provided at regular intervals in the scanning direction of the paper, and a plurality of mark entry fields each having a width narrower than the width of the reference mark are provided between adjacent reference marks, and this paper is is scanned with a scanner to read the reference marks and entry marks written in the mark entry field, and for the entry mark, the entry mark is determined based on the previous nearby reference mark and the sequential position of this previous nearby reference mark. At the same time, it is determined whether the detected mark is a reference mark or not based on the read mark width, and the reference marks that follow from the most advanced reference mark are generated at the correct cycle at a predetermined period. The mark reading method is characterized in that the number of detected reference marks matches a predetermined number, and then the quality of the entry mark read from the mark entry field is determined.