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JPS6324583B2 - - Google Patents
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JPS6324583B2 - - Google Patents

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Publication number
JPS6324583B2
JPS6324583B2 JP55164681A JP16468180A JPS6324583B2 JP S6324583 B2 JPS6324583 B2 JP S6324583B2 JP 55164681 A JP55164681 A JP 55164681A JP 16468180 A JP16468180 A JP 16468180A JP S6324583 B2 JPS6324583 B2 JP S6324583B2
Authority
JP
Japan
Prior art keywords
signal
electrode
divided
electrodes
interdigital
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55164681A
Other languages
Japanese (ja)
Other versions
JPS5789365A (en
Inventor
Koji Toda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to JP55164681A priority Critical patent/JPS5789365A/en
Publication of JPS5789365A publication Critical patent/JPS5789365A/en
Publication of JPS6324583B2 publication Critical patent/JPS6324583B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic elements; Electromechanical resonators
    • H03H9/02Details
    • H03H9/125Driving means, e.g. electrodes, coils
    • H03H9/145Driving means, e.g. electrodes, coils for networks using surface acoustic waves

Landscapes

  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Logic Circuits (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Description

【発明の詳細な説明】 本発明は3値論理デバイス及び当該デバイスを
用いる3値通信システムに関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a ternary logic device and a ternary communication system using the device.

本出願人は先に2値伝送にもう1つの論理の自
由度を加えるものとして3値伝送方式を提案した
(特願昭54―068999号)。これは、正極性と零振幅
と負極性のパルスの組合せによる3値論理信号
を、所定周波数の信号Sと振幅零の信号S0と信号
Sに対して180゜位相偏移する周波数同一の信号
との組合せからなる信号として出力し、該信号を
3値論理デバイスを介して振幅レベルの相違とし
て検出するものである。3値論理デバイスは圧電
基板と該基板の一面にもうけられるインターデイ
ジタル構成の2個のすだれ状電極と各すだれ状電
極に対向して上記基板の他面にもうけられる2個
の平板状電極からなり、前記信号によつてラム波
を励起させ3値モードでの良好な動作特性を得よ
うとするものである。そのため圧電基板の厚さは
該基板におけるラム波の波長以下とし、周波数の
上昇に伴ないより薄い構成としなければならな
い。その結果、先の3値論理デバイスは比較的周
波数の低い、例えば20〜30MHz程度を限界とする
周波数領域での使用に限られるという欠点があ
る。
The present applicant previously proposed a ternary transmission system as a method that adds another degree of freedom in logic to binary transmission (Japanese Patent Application No. 54-068999). This converts a three-value logic signal consisting of a combination of pulses of positive polarity, zero amplitude, and negative polarity into a signal S of a predetermined frequency, a signal S0 of zero amplitude, and a signal with the same frequency that has a phase shift of 180° with respect to the signal S. This signal is output as a signal consisting of a combination of the above signals, and the signal is detected as a difference in amplitude level via a ternary logic device. The ternary logic device consists of a piezoelectric substrate, two interdigital interdigital electrodes provided on one surface of the substrate, and two flat electrodes provided on the other surface of the substrate opposite to each interdigital electrode. , the Lamb wave is excited by the signal to obtain good operating characteristics in the ternary mode. Therefore, the thickness of the piezoelectric substrate must be less than the wavelength of the Lamb wave in the substrate, and as the frequency increases, the thickness of the piezoelectric substrate must be made thinner. As a result, the aforementioned ternary logic devices have the drawback of being limited to use in a relatively low frequency range, for example, limited to about 20 to 30 MHz.

従つて本発明は従来の技術の上記欠点を改善す
るもので、その目的は数百MHz以上の高周波領域
でも良好な3値モード特性を有する3値論理デバ
イスを提供すると共に、当該3値論理デバイスを
用いる3値通信システムを提供することにある。
Therefore, the present invention aims to improve the above-mentioned drawbacks of the conventional technology, and its purpose is to provide a ternary logic device having good ternary mode characteristics even in a high frequency range of several hundred MHz or more, and to The purpose of the present invention is to provide a three-level communication system using the following.

上記目的を達成するための本発明の特徴は、イ
ンターデイジタル構成の1対のくしの歯状電極か
らなる入力用及び出力用のすだれ状電極を、表面
弾性波を励起するごとき厚さの圧電基板上に互い
に離間して配列し、各すだれ状電極を構成する1
対のくしの歯状電極の1方をグラウンドとし他方
を2分割することにより少なくとも入力用のすだ
れ状電極に第1及び第2の分割電極を形成し、第
1の分割電極に所定周波数の信号Sを印加すると
共に第2の分割電極に上記信号Sと振幅零の信号
S0と上記信号Sに対して180゜位相偏移する周波数
同一の信号とを印加し、出力用のすだれ状電極
を介して前記各信号S,S0,を振幅レベルの相
違として検出するごとき3値論理デバイスにあ
る。
A feature of the present invention for achieving the above object is that input and output interdigital electrodes consisting of a pair of comb-like electrodes having an interdigital configuration are connected to a piezoelectric substrate having a thickness sufficient to excite surface acoustic waves. 1 arranged spaced apart from each other on the top and forming each interdigital electrode.
One of the pair of comb tooth-shaped electrodes is grounded and the other is divided into two to form first and second divided electrodes at least on the input comb-shaped electrode, and a signal of a predetermined frequency is sent to the first divided electrode. At the same time, the above signal S and a signal with zero amplitude are applied to the second divided electrode.
S 0 and a signal with the same frequency and a phase shift of 180° with respect to the signal S are applied, and each of the signals S and S 0 is detected as a difference in amplitude level through an output interdigital electrode. Located in a ternary logic device.

また本発明の別の特徴は、正極性、零振幅、負
極性のパルスの組合せにより構成される3値論理
信号を、所定周波数の信号S、振幅零の信号S0
上記信号Sに対して180゜位相偏移する周波数同一
の信号との組合せからなる信号として出力する
送信手段と、該信号を伝送する伝送路と、表面弾
性波を励起するごとき厚さの圧電基板と該基板上
に互いに離間して配列されるインターデイジタル
構成の1対のくしの歯状電極からなる入力用及び
出力用のすだれ状電極であつて、各すだれ状電極
を構成する1対のくしの歯状電極の1方をグラウ
ンドとし他方を2分割することにより少なくとも
入力用のすだれ状電極に第1及び第2の分割電極
を形成した3値論理デバイスを具備する受信手段
をもうけ、3値論理デバイスにおける入力用のす
だれ状電極の第1の分割電極に信号Sを印加する
と共に第2の分割電極にS,S0,を印加し、各
信号を振幅レベルの相違として検出することによ
り3値論理信号の送受信を行なうごとき3値通信
システムにある。
Another feature of the present invention is that a three-value logic signal constituted by a combination of pulses of positive polarity, zero amplitude, and negative polarity is divided into a signal S of a predetermined frequency, a signal S 0 of zero amplitude,
A transmitting means for outputting a signal consisting of a combination of a signal having the same frequency and a phase shift of 180° with respect to the signal S, a transmission line for transmitting the signal, and a piezoelectric substrate having a thickness that excites surface acoustic waves. and input and output interdigital transducer electrodes comprising a pair of interdigital comb-like electrodes arranged spaced apart from each other on the substrate, each interdigital transducer comprising a pair of interdigital interdigital transducer electrodes. One of the tooth-shaped electrodes is grounded and the other is divided into two, thereby providing a receiving means equipped with a ternary logic device in which first and second divided electrodes are formed on at least the interdigital interdigital electrode for input. By applying the signal S to the first divided electrode of the input interdigital electrode in the logic device and applying S, S 0 to the second divided electrode, and detecting each signal as a difference in amplitude level, 3. This is in a three-value communication system that transmits and receives value logic signals.

以下図面により本発明の実施例を説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第1図は本発明による3値論理デバイスの一実
施例を示す。圧電基板1は励起される音波に対し
例えば5波長程度の厚さで、表面弾性波が励起さ
れるに充分な厚さを有する。圧電基板1には入力
用のすだれ状電極2及び出力用のすだれ状電極4
が互いに離間してもうけられる。入力用のすだれ
状電極2は1対のくしの歯状電極3a及び3bを
インターデイジタルに組合せるこにより構成さ
れ、一方のくしの歯状電極3bは端子Oを介して
グラウンドされるが、他方のくしの歯状電極3a
は図示されるごとく2分割されて第1及び第2の
分割電極3a―1及び3a―2とされる。第1の
分割電極3a―1には端子Aが、第2の分割電極
3a―2には端子Bが夫々もうけられる。出力用
のすだれ状電極4は1対のくしの歯状電極4a及
び4bをインターデイジタルに組合せることによ
り構成され、一方のくしの歯状電極4bは端子
O′を介して先の場合と同様にグラウンドされる。
他方のくしの歯状電極4aには端子A′がもうけ
られる。出力用のすだれ状電極はまた、入力用の
すだれ状電極2と同一の構成、即ちくしの歯状電
極4aを分割電極として構成することも可能で、
これによれば互いに180゜位相の相違する等振幅の
出力信号が各分割電極に得られる。従つて差動ア
ンプに直接入力することができ、縦続接続して用
いる場合に好ましいという利点がある。
FIG. 1 shows an embodiment of a ternary logic device according to the present invention. The piezoelectric substrate 1 has a thickness of, for example, about 5 wavelengths for the excited sound waves, which is sufficient to excite surface acoustic waves. The piezoelectric substrate 1 has an input interdigital electrode 2 and an output interdigital electrode 4.
can be received at a distance from each other. The input interdigital electrode 2 is constructed by interdigitally combining a pair of comb tooth electrodes 3a and 3b, one of the comb tooth electrodes 3b is grounded via the terminal O, while the other comb tooth electrode 3b is grounded via the terminal O. Comb tooth electrode 3a
As shown in the figure, it is divided into two to form first and second divided electrodes 3a-1 and 3a-2. A terminal A is provided on the first divided electrode 3a-1, and a terminal B is provided on the second divided electrode 3a-2. The output interdigital electrode 4 is constructed by interdigitally combining a pair of comb tooth electrodes 4a and 4b, and one comb tooth electrode 4b is a terminal.
It is grounded via O′ as before.
A terminal A' is provided on the other comb-tooth electrode 4a. The output interdigital electrode can also have the same configuration as the input interdigital electrode 2, that is, the comb tooth electrode 4a can be configured as a divided electrode.
According to this, output signals of equal amplitude and having a phase difference of 180° from each other can be obtained for each divided electrode. Therefore, it has the advantage that it can be directly input to the differential amplifier, which is preferable when used in cascade connection.

以上の構成のもとで、A―O端子間には基準信
号として周波数cのキヤリアを有する信号Sが印
加され、B―O端子間には入力信号として前記信
号Sに対して180゜位相偏移した周波数同一の信号
Sと前記信号Sと振幅零の信号S0とが印加され
る。B―O端子間の入力信号がの場合には、A
―O端子間に同一周波数で180゜位相偏移する信号
Sが印加されているので、電極構造からの180゜の
位相差を考慮すると、出力用のすだれ状電極4の
A′―O′端子間に得られる出力は最大となり、そ
の振幅はSあるいはに比べて大きいS―とな
る。次にB―O端子間の入力信号がSの場合に
は、A―O端子間にも同一の信号Sが印加されて
いるので表面弾性波はほとんど励起されず、
A′―O′端子間に得られる出力は振幅零の信号S0
となる。更にB―O端子間の入力信号がS0の場合
には、基準信号Sによつて音波が励起されるので
A′―O′端子間出力はSとなる。従つて、入力信
号は振幅レベルの相違により判断することがで
き、各信号の識別は容易である。
Under the above configuration, a signal S having a carrier of frequency c is applied as a reference signal between the A and O terminals, and a signal S having a carrier with a frequency of c is applied between the B and O terminals as an input signal with a phase deviation of 180° with respect to the signal S. A signal S having the same frequency as the shifted signal S, and a signal S 0 having zero amplitude are applied. If the input signal between B and O terminals is A
- Since a signal S with the same frequency and a 180° phase shift is applied between the -O terminals, considering the 180° phase difference from the electrode structure, the output interdigital electrode 4
The output obtained between the A' and O' terminals is the maximum, and its amplitude is S-, which is larger than S or S-. Next, when the input signal between the B and O terminals is S, the same signal S is applied between the A and O terminals, so almost no surface acoustic waves are excited.
The output obtained between A′ and O′ terminals is a signal with zero amplitude S 0
becomes. Furthermore, when the input signal between the BO terminals is S 0 , the sound wave is excited by the reference signal S.
The output between A' and O' terminals becomes S. Therefore, input signals can be determined based on differences in amplitude levels, and each signal can be easily identified.

本発明による3値論理デバイスでは表面弾性波
を励起させるので、ラム波の場合のように周波数
に対する圧電性基板の厚さを考慮する必要がな
く、従つて数百MHz以上の高周波領域でも良好な
3値の動作モードを得ることができる。
Since the three-value logic device according to the present invention excites surface acoustic waves, there is no need to consider the thickness of the piezoelectric substrate with respect to frequency, unlike in the case of Lamb waves, and therefore the device can perform well even in the high frequency range of several hundred MHz or more. Three-value operating modes can be obtained.

第2図a及び第2図bは上記デバイスを用いる
3値通信システムの一実施例で、第2図aは3値
通信システムの送信側の構成例、第2図bは受信
側の構成例を示す。
Figures 2a and 2b show an example of a ternary communication system using the above device, in which Figure 2a is an example of the configuration of the transmitting side of the ternary communication system, and Figure 2b is an example of the configuration of the receiving side. shows.

第2図aにおいて、10は例えばフオトダイオ
ード及びフオトトランジスタにより構成されるフ
オトカツプラ、11はフオトカツプラ10により
制御される電子スイツチ、12は電子スイツチ1
1の出力を入力とするオペレーシヨナルアンプ、
R1〜R6は抵抗、C1及びC2はコンデンサ、C及び
Dは入力側端子、Eは出力側端子である。入力側
端子Cに正極性と零振幅と負極性のパルスの組合
せで構成される3値論理信号を印加し端子Dに正
弦波交流(周波数c)を印加すれば、正極性、零
振幅及び負極性の夫々のパルスに応じて電子スイ
ツチ11の開閉が制御され、オペレーシヨナルア
ンプ12を介して出力側端子Eに、周波数cのキ
ヤリアを有する信号S、振幅零の出力信号S0、上
記Sに対して180゜位相偏移した信号の組み合せ
によつて構成される出力信号が得られる。送信側
は、この信号を送信出力として伝送路に送り出
す。
In FIG. 2a, 10 is a photocoupler composed of, for example, a photodiode and a phototransistor, 11 is an electronic switch controlled by the photocoupler 10, and 12 is an electronic switch 1.
An operational amplifier whose input is the output of
R 1 to R 6 are resistors, C 1 and C 2 are capacitors, C and D are input terminals, and E is an output terminal. If a three-value logic signal consisting of a combination of pulses of positive polarity, zero amplitude, and negative polarity is applied to the input terminal C, and a sine wave alternating current (frequency c ) is applied to the terminal D, positive polarity, zero amplitude, and negative polarity will be generated. The opening and closing of the electronic switch 11 is controlled according to each pulse of the frequency, and a signal S having a carrier of frequency c , an output signal S 0 of zero amplitude, and the above S are sent to the output side terminal E via the operational amplifier 12. An output signal composed of a combination of signals having a phase shift of 180° is obtained. The transmitting side sends out this signal to the transmission path as a transmission output.

第2図bにおいて、13は第1図で説明した3
値論理デバイスで、入力用すだれ状電極2の入力
信号端子Bには伝送されて来た信号,S,S0
印加され、基準信号端子Aには信号Sが与えられ
る。従つて、出力用すだれ状電極4の端子A′に
は基準信号と入力信号との位相差に従つて各信号
S,S,S0に対応する振幅の出力信号S―,
S0,Sとして得られる。この出力信号は増幅回路
14で増幅された後、検波回路15を介して包絡
線検波され、出力端子OUTに振幅レベルの異な
る信号として供給される。
In Figure 2b, 13 is 3 explained in Figure 1.
In the value logic device, the transmitted signals S and S0 are applied to the input signal terminal B of the input interdigital electrode 2, and the signal S is applied to the reference signal terminal A. Therefore, the terminal A' of the output interdigital electrode 4 receives output signals S-, S-, S-, S-, S-, S-, S-, S-, S-, S-, S-, S-, S-, S-, S-- , S--, S--, S--, S--, S--, S--, S--, S--, S--, S--, S--, S--, S--, S--, S--, S--, S--, S--,
It is obtained as S 0 ,S. This output signal is amplified by the amplifier circuit 14, then subjected to envelope detection via the detection circuit 15, and is supplied to the output terminal OUT as signals with different amplitude levels.

第3図は本発明による3値通信システムの一実
施例を示し、第3図aは送信側、第3図bは受信
側で、図中のイは端子C(第2図a)に印加され
るコード化した3値信号、ロは端子E(第2図a)
に得られる送信信号、ハはタイミングパルス、ニ
は受信システムの出力端子OUT(第2図b)に得
られる復調信号を示す。ニから明らかなように3
種類の振幅レベルからなる信号が得られ、3値論
理デバイスが有効に動作していることがわかる。
FIG. 3 shows an embodiment of the ternary communication system according to the present invention, in which FIG. 3a shows the transmitting side, FIG. 3b shows the receiving side, and A in the figure shows the voltage applied to the terminal C (FIG. 2a). coded ternary signal, B is terminal E (Figure 2a)
C shows the transmission signal obtained at , C shows the timing pulse, and D shows the demodulated signal obtained at the output terminal OUT of the receiving system (FIG. 2b). As is clear from d, 3
It can be seen that signals consisting of various amplitude levels are obtained, and that the ternary logic device is operating effectively.

以上説明したように本発明によれば、表面弾性
波を用いる3値論理デバイスを提供することがで
き、高周波領域においても良好な3値モード特性
を得ることができると共に、当該デバイスを用い
2値伝送にもう1つの論理の自由度を加える3値
通信システムを提供することができる。しかも該
システムにおける送信信号は相互に逆位相の信号
(Sと)を用いるので比較的狭い周波数帯域で
よく、またすだれ状の電極構造を用いるため雑音
に強く高いS/N比を得ることができる。
As explained above, according to the present invention, it is possible to provide a ternary logic device using surface acoustic waves, obtain good ternary mode characteristics even in a high frequency region, and use the device to obtain a ternary logic device using a binary logic device. A ternary communication system can be provided that adds another logical degree of freedom to transmission. Moreover, since the transmission signals in this system use signals (S) with opposite phases to each other, a relatively narrow frequency band is required, and since the interdigital electrode structure is used, it is resistant to noise and can obtain a high S/N ratio. .

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明による3値論理デバイスの一実
施例、第2図a及び第2図bは本発明による3値
通信システムの一実施例、第3図a及び第3図b
は本発明による3値通信システムの一実施例であ
る。 1;圧電基板、2,4;すだれ状電極、3a,
3b,4a,4b;くしの歯状電極、3a―1,
3a―2;分割電極、10;フオトカツプラ、1
1;電子スイツチ、12;オペレーシヨナルアン
プ、13;3値論理デバイス、14;増幅回路、
15;検波回路。
FIG. 1 shows an embodiment of a ternary logic device according to the present invention, FIGS. 2a and 2b show an embodiment of a ternary communication system according to the present invention, and FIGS. 3a and 3b
is an embodiment of a ternary communication system according to the present invention. 1; piezoelectric substrate, 2, 4; interdigital electrode, 3a,
3b, 4a, 4b; comb tooth electrode, 3a-1,
3a-2; Divided electrode, 10; Photo coupling, 1
1; electronic switch, 12; operational amplifier, 13; ternary logic device, 14; amplifier circuit,
15; Detection circuit.

Claims (1)

【特許請求の範囲】 1 インターデイジタル構成の1対のくしの歯状
電極からなる入力用及び出力用のすだれ状電極
を、表面弾性波を励起するごとき厚さの圧電基板
上に互いに離間して配列し、各すだれ状電極を構
成する1対のくしの歯状電極の1方をグラウンド
とし他方を2分割することにより少なくとも入力
用のすだれ状電極に第1及び第2の分割電極を形
成し、第1の分割電極に所定周波数の信号Sを印
加すると共に第2の分割電極に上記信号Sと振幅
零の信号S0と上記信号Sに対して180゜位相偏移す
る周波数同一の信号とを印加し、出力用のすだ
れ状電極を介して前記各信号S,S0,を振幅レ
ベルの相違として検出することを特徴とする3値
論理デバイス。 2 正極性、零振幅、負極性のパルスの組合せに
より構成される3値論理信号を、所定周波数の信
号S、振幅零の信号S0、上記信号Sに対して180゜
位相偏移する周波数同一の信号との組合せから
なる信号として出力する送信手段と、該信号を伝
送する伝送路と、表面弾性波を励起するごとき厚
さの圧電基板と該基板上に互いに離間して配列さ
れるインターデイジタル構成の1対のくしの歯状
電極からなる入力用及び出力用のすだれ状電極で
あつて、各すだれ状電極を構成する1対のくしの
歯状電極の1方をグラウンドとし他方を2分割す
ることにより少なくとも入力用のすだれ状電極に
第1及び第2の分割電極を形成した3値論理デバ
イスを具備する受信手段をもうけ、3値論理デバ
イスにおける入力用のすだれ状電極の第1の分割
電極に信号Sを印加すると共に第2の分割電極に
S,S0,を印加し、各信号を振幅レベルの相違
として検出することにより3値論理信号の送受信
を行なうことを特徴とする3値通信システム。
[Claims] 1. Input and output interdigital electrodes consisting of a pair of interdigital comb-like electrodes are spaced apart from each other on a piezoelectric substrate having a thickness that excites surface acoustic waves. A pair of comb-shaped electrodes constituting each interdigital electrode are arranged, one of which is grounded, and the other is divided into two, thereby forming first and second divided electrodes at least on the input interdigital electrode. , a signal S of a predetermined frequency is applied to the first divided electrode, and a signal S0 with zero amplitude is applied to the second divided electrode, and a signal with the same frequency and a phase shift of 180° with respect to the signal S is applied to the second divided electrode. A ternary logic device characterized in that the signals S and S 0 are detected as a difference in amplitude level through output interdigital electrodes. 2 A ternary logic signal composed of a combination of pulses of positive polarity, zero amplitude, and negative polarity is divided into a signal S of a predetermined frequency, a signal S 0 of zero amplitude, and a signal S of the same frequency with a phase shift of 180° with respect to the above signal S. a transmission means for outputting a signal consisting of a combination of signals, a transmission path for transmitting the signal, a piezoelectric substrate having a thickness such that it excites surface acoustic waves, and interdigital signals arranged spaced apart from each other on the substrate. An input and output interdigital electrode consisting of a pair of comb-like electrodes, one of which is grounded and the other divided into two. By doing so, there is provided a receiving means comprising a ternary logic device in which first and second divided electrodes are formed on at least the input interdigital electrode, and the first division of the input interdigital electrode in the ternary logic device is provided. A ternary logic signal is transmitted and received by applying a signal S to the electrode and applying S, S 0 , to the second divided electrode, and detecting each signal as a difference in amplitude level. Communications system.
JP55164681A 1980-11-25 1980-11-25 Ternary logical device and ternary communication system using it Granted JPS5789365A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55164681A JPS5789365A (en) 1980-11-25 1980-11-25 Ternary logical device and ternary communication system using it

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55164681A JPS5789365A (en) 1980-11-25 1980-11-25 Ternary logical device and ternary communication system using it

Publications (2)

Publication Number Publication Date
JPS5789365A JPS5789365A (en) 1982-06-03
JPS6324583B2 true JPS6324583B2 (en) 1988-05-21

Family

ID=15797821

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55164681A Granted JPS5789365A (en) 1980-11-25 1980-11-25 Ternary logical device and ternary communication system using it

Country Status (1)

Country Link
JP (1) JPS5789365A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2586481B2 (en) * 1987-04-20 1997-02-26 耕司 戸田 Ternary PSK communication device

Also Published As

Publication number Publication date
JPS5789365A (en) 1982-06-03

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