JPS6325498B2 - - Google Patents
Info
- Publication number
- JPS6325498B2 JPS6325498B2 JP54092266A JP9226679A JPS6325498B2 JP S6325498 B2 JPS6325498 B2 JP S6325498B2 JP 54092266 A JP54092266 A JP 54092266A JP 9226679 A JP9226679 A JP 9226679A JP S6325498 B2 JPS6325498 B2 JP S6325498B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- bubble
- processing
- etching
- processed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
Landscapes
- Weting (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Description
【発明の詳細な説明】
本発明は、基板例えば半導体基板等の表面処理
方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for surface treatment of a substrate, such as a semiconductor substrate.
半導体装置を製造するに当り、熱抵抗やコレク
タ寄生抵抗を小さくする等の目的のため、半導体
素子製造の最終工程において半導体基板を所定の
厚さ(通常100〜200〔μm〕)まで薄くする必要が
ある。 When manufacturing semiconductor devices, it is necessary to thin the semiconductor substrate to a predetermined thickness (usually 100 to 200 [μm]) in the final process of semiconductor element manufacturing in order to reduce thermal resistance and collector parasitic resistance. There is.
上述の半導体基板の厚さ調整をエツチング法に
より行なう場合は所謂バブルエツチング法が多く
用いられている。該バブルエツチング法は処理液
の撹拌効果がすぐれているためエツチング精度が
非常に高く、前記厚さ調整のみならず半導体基板
の各種表面処理工程で多用されている。 When the above-mentioned thickness adjustment of a semiconductor substrate is performed by an etching method, a so-called bubble etching method is often used. The bubble etching method has a very high etching precision due to its excellent stirring effect on the processing solution, and is widely used not only for the above-mentioned thickness adjustment but also for various surface treatment processes of semiconductor substrates.
前記バブルエツチング法は、第1図に示すごと
く処理槽1底部に配設された複数本の気体導入管
2に開口された多数の小孔3より窒素(N2)或
いは二酸化炭素(CO2)等の気体4を処理槽1内
に送出し、バブル(気泡)5を発生させることに
より処理液6を撹拌しながら、支持板7にワツク
ス等で固着され処理槽1上部に設けられた保持板
8により下向きに保持された被処理基板9をエツ
チングする表面処理方法である。 In the bubble etching method, as shown in FIG. 1, nitrogen (N 2 ) or carbon dioxide (CO 2 ) is introduced through a large number of small holes 3 opened in a plurality of gas introduction pipes 2 arranged at the bottom of a processing tank 1 . A holding plate fixed to a support plate 7 with wax or the like and provided at the top of the processing tank 1 is used to stir the processing liquid 6 by sending gas 4 such as into the processing tank 1 and generating bubbles 5. This is a surface treatment method in which a substrate 9 to be processed is held downward by a substrate 8.
上記バブルエツチング法はエツチング精度は良
好であるが、近年に至り半導体基板が大型化する
につれ、一回当りの処理枚数を同一に保つには処
理槽を大きくせねばならず、広い面積を要すると
共に大量の処理液を必要とする問題を生じた。 The above-mentioned bubble etching method has good etching accuracy, but as semiconductor substrates have become larger in recent years, the processing tank has to be enlarged in order to maintain the same number of substrates processed at one time, which requires a large area and This resulted in the problem of requiring a large amount of processing solution.
かかる問題を除去するため、例えば処理槽内に
被処理基板を多数平行に塔載したバスケツトを装
着し、該バスケツトを回転させながらバブルエツ
チングを行なう等の方法が試みられているが、エ
ツチング精度が低下する等の問題があり、満足で
きる方法とは言い難い。 In order to eliminate this problem, attempts have been made to, for example, install a basket in which a large number of substrates to be processed are mounted in parallel in a processing tank and perform bubble etching while rotating the basket, but the etching accuracy is limited. It is difficult to say that this is a satisfactory method, as there are problems such as a drop in performance.
本発明は上述の欠点を排除して、エツチング精
度を低下させることなく、小型の処理槽を用いて
大量処理を可能ならしめる、バブルによる撹拌を
用いた基板の表面処理方法を提供することを目的
とする。 An object of the present invention is to provide a method for surface treatment of a substrate using stirring using bubbles, which eliminates the above-mentioned drawbacks and enables mass processing using a small processing tank without reducing etching accuracy. shall be.
本発明の基板の表面処理方法の特徴は、処理槽
内の底部にほぼ水平に設けられたバブル発生面上
に傾斜してほぼ平行に配設された複数のバブル散
乱板の上側の面に被処理基板を載置し、バブル発
生面よりバブルを処理槽内に送出することにより
処理液を撹拌して被処理基板を処理するものであ
り、バブルが浮上とバブル散乱板の下面に衝突し
た際の分散・散乱とにより処理液を撹拌し、且つ
その下面に対向する被処理基板がその撹拌の領域
内に位置するようにバブル散乱板を配置すること
にある。 The feature of the substrate surface treatment method of the present invention is that the upper surface of a plurality of bubble scattering plates arranged obliquely and substantially parallel to the bubble generation surface provided substantially horizontally at the bottom of the processing tank is coated. The processing substrate is placed on the substrate and bubbles are sent into the processing tank from the bubble generation surface to stir the processing liquid and process the substrate.When the bubbles collide with the floating surface and the bottom surface of the bubble scattering plate. The purpose is to agitate the processing liquid by dispersing and scattering the bubble scattering plate, and to dispose the bubble scattering plate so that the substrate to be processed facing the lower surface thereof is located within the stirring area.
以下本発明の表面処理方法を図面を用いて説明
する。 The surface treatment method of the present invention will be explained below with reference to the drawings.
第2図は本発明を可能ならしめる装置を用いて
被処理基板の表面処理を行なう状態を示す要部断
面図である。 FIG. 2 is a sectional view of a main part showing a state in which a surface treatment of a substrate to be processed is performed using an apparatus that makes the present invention possible.
同図において、1は処理槽、2は気体導入管で
液面に平行な平面(水平面)内に複数本配設さ
れ、該気体導入管2上部には多数の小孔3が開口
され、該小孔3によりバブル発生面を形成する。
4の矢印は導入される窒素、二酸化炭素等の気体
の導入方向を示し、5は前記気体4を導入するこ
とにより処理液6中に送出されたバブル、9は被
処理基板、11はパイレツクスガラス、石英ある
いはテフロン等によりなる散乱板である。該散乱
板11は、前記被処理基板9の支持板を兼ね、ワ
ツクスで固着する等の方法で前記処理基板9を支
持する。 In the figure, 1 is a processing tank, 2 is a plurality of gas introduction pipes arranged in a plane parallel to the liquid surface (horizontal plane), and a large number of small holes 3 are opened in the upper part of the gas introduction pipe 2. The small holes 3 form a bubble generation surface.
Arrows 4 indicate the direction of introduction of gases such as nitrogen and carbon dioxide, 5 indicates bubbles sent into the processing liquid 6 by introducing the gas 4, 9 indicates the substrate to be processed, and 11 indicates the pyrex. This is a scattering plate made of glass, quartz, Teflon, etc. The scattering plate 11 also serves as a support plate for the substrate 9 to be processed, and supports the substrate 9 to be processed by a method such as fixing with wax.
また該散乱板11は支持枠(図示せず)により
支持する等の方法で前記バブル発生面に対し65〜
75〔度〕の角度で傾斜し水平方向の間隔を10〜20
〔mm〕になるよう前記気体導入管上即ちバブル発
生面上に設置される。ここで前記被処理基板9は
散乱板11の上側になるよう散乱板11は配設さ
れる。 Further, the scattering plate 11 is supported by a support frame (not shown) or the like so that the scattering plate 11 is 65 to
Tilt at an angle of 75 [degrees] with horizontal spacing of 10 to 20
[mm] above the gas introduction pipe, that is, on the bubble generation surface. Here, the scattering plate 11 is arranged so that the substrate 9 to be processed is above the scattering plate 11.
上記状態において、気体導入管2より窒素
(N2)、二酸化炭素(CO2)等の気体4を導入す
れば小孔3よりバブル5が処理液6中に送出され
る。このバブル5は処理液6中を上昇し、散乱板
11に衝突して分散・散乱し、バブル5自身の浮
力とバブル発生源からの圧力によりジグザグ運動
を繰り返しながら処理液6中を上昇する。このバ
ブル5の運動により処理液6は均一に撹拌される
ので、被処理基板9を密に配置しているにも拘ら
ず均一な表面処理が可能となる。 In the above state, if a gas 4 such as nitrogen (N 2 ) or carbon dioxide (CO 2 ) is introduced through the gas introduction tube 2 , bubbles 5 are sent out from the small holes 3 into the processing liquid 6 . The bubbles 5 rise in the processing liquid 6, collide with the scattering plate 11 and are dispersed and scattered, and rise in the processing liquid 6 while repeating a zigzag movement due to the buoyancy of the bubbles 5 themselves and the pressure from the bubble generation source. Since the treatment liquid 6 is uniformly stirred by the movement of the bubbles 5, uniform surface treatment is possible even though the substrates 9 to be treated are closely arranged.
次に上記方法を用いて直径76〔mm〕、厚さ400〔μ
m〕のシリコン基板の背面をエツチングして厚さ
を200〔μm〕に調整する実施例について説明す
る。 Next, using the above method, a diameter of 76 [mm] and a thickness of 400 [μ] were obtained.
An example will be described in which the back side of a silicon substrate of 200 [μm] is etched to adjust the thickness to 200 [μm].
本実施例においてはシリコン基板9を20枚同時
に処理するため、処理槽1の大きさを長さ、巾、
深さをそれぞれ30〔cm〕、18〔cm〕、20〔cm〕とし、
大きさ10〔cm〕×10〔cm〕のパイレツクスガラス製
の散乱板を15〔mm〕間隔で並設し、気体導入管2
には小孔3を7.5〔mm〕間隔で開口したものを8本
平行に設け、処理液として硝酸(HNO3)10容と
弗酸(HF)1容との混合液を凡そ10〔〕用い、
導入する気体4には窒素ガスを約20〔/分〕の
流量で用い、約30〔分〕エツチングを行なつた。 In this embodiment, since 20 silicon substrates 9 are processed at the same time, the size of the processing tank 1 is determined by the length, width,
The depths are 30 [cm], 18 [cm], and 20 [cm], respectively.
Pyrex glass scattering plates measuring 10 [cm] x 10 [cm] were arranged in parallel at intervals of 15 [mm], and the gas introduction pipe 2
Eight small holes 3 were opened in parallel at intervals of 7.5 mm, and a mixed solution of 10 volumes of nitric acid (HNO 3 ) and 1 volume of hydrofluoric acid (HF) was used as the treatment liquid. ,
Nitrogen gas was used as the introduced gas 4 at a flow rate of about 20 [min], and etching was carried out for about 30 [min].
第3図に本実施例のエツチング精度を示す。 FIG. 3 shows the etching accuracy of this example.
同図aは、シリコン基板No.1〜No.20毎のエツチ
ング処理前の厚さの分布を示し、また同図bはシ
リコン基板各々のエツチング後の厚さ分布を示
す。これは同図cに×印で示すように、各シリコ
ン基板の中央と周辺の4箇所の5箇所における厚
さの最大値と最小値を示したものである。 Figure a shows the thickness distribution of silicon substrates No. 1 to No. 20 before etching, and figure b shows the thickness distribution of each silicon substrate after etching. This shows the maximum and minimum values of the thickness at five locations, the center and four locations around the periphery of each silicon substrate, as indicated by the x marks in Figure c.
同図a及びbより明らかなごとく、本実施例に
おいてはエツチング前後でシリコン基板の厚さの
バラツキは殆んど変らない。このことはエツチン
グが均一に進行したことを示している。 As is clear from figures a and b, in this example, the variation in the thickness of the silicon substrate before and after etching hardly changes. This indicates that etching progressed uniformly.
上述のエツチングを前記第1図に示した従来の
エツチング方法により実施すると、処理槽の大き
さは40〔cm〕×50〔cm〕×20〔cm〕程度のものとなり
40〔〕近い処理液を必要とする。 If the above-mentioned etching is carried out using the conventional etching method shown in Figure 1 above, the size of the processing tank will be approximately 40 [cm] x 50 [cm] x 20 [cm].
Requires a processing solution close to 40[].
以上述べたごとく本実施例によれば、シリコン
基板の厚さ精度を低下させることなく、小さな処
理槽で大量の処理が可能となつた。 As described above, according to this embodiment, it is possible to process a large amount of silicon substrates in a small processing tank without reducing the thickness accuracy of the silicon substrate.
本発明は上記実施例に限定されることなく、更
に種々変形して実施できる。 The present invention is not limited to the above embodiments, but can be implemented with various modifications.
例えば前記実施例ではシリコン基板の厚さ調整
のエツチングに適用した場合について説明した
が、メサ型トランジスタの製造工程におけるメサ
エツチング等、各種のエツチング処理に用いるこ
とができる。要は本発明は反応が液の撹拌の良否
に依存する場合に適用し得る表面処理方法であ
り、従つてエツチングの場合のみならず水洗等洗
浄工程に用いても有効である。 For example, in the above embodiment, the case where the present invention is applied to etching for adjusting the thickness of a silicon substrate has been described, but it can also be used for various etching processes such as mesa etching in the manufacturing process of mesa type transistors. In short, the present invention is a surface treatment method that can be applied when the reaction depends on the quality of stirring of the liquid, and is therefore effective not only for etching but also for cleaning processes such as water washing.
また被処理基板の種類及び処理の目的等により
処理液や気体の種類等も種々選択してよい。 Furthermore, various types of processing liquid and gas may be selected depending on the type of substrate to be processed and the purpose of processing.
更に処理装置の構造、例えば散乱板の材質や支
持方法、或いはバブル発生面の構成法等も適宜選
択し得るものであることは言うまでもない。 Furthermore, it goes without saying that the structure of the processing apparatus, such as the material and support method of the scattering plate, or the construction method of the bubble generation surface, can be selected as appropriate.
以上説明したごとく本発明の基板の処理方法に
よれば、処理精度を低下させることなく小型の処
理槽により大量の処理が可能となる。 As explained above, according to the substrate processing method of the present invention, a large amount of processing can be performed using a small processing tank without reducing processing accuracy.
第1図は従来のバブルエツチング方法を示す要
部断面図、第2図は本発明の表面処理方法の一実
施例を示す要部断面図、第3図は本発明にかかる
処理方法における効果を示す図である。
1……処理槽、2……気体導入管、3……小
孔、4……導入気体、5……バブル、6……処理
液、9……被処理基板、11……散乱板。
FIG. 1 is a cross-sectional view of a main part showing a conventional bubble etching method, FIG. 2 is a cross-sectional view of a main part showing an embodiment of the surface treatment method of the present invention, and FIG. FIG. DESCRIPTION OF SYMBOLS 1... Processing tank, 2... Gas introduction pipe, 3... Small hole, 4... Introduced gas, 5... Bubble, 6... Processing liquid, 9... Processing target substrate, 11... Scattering plate.
Claims (1)
面上に傾斜してほぼ平行に配設された複数のバブ
ル散乱板の上側の面に被処理基板を載置し、バブ
ル発生面よりバブルを処理槽内に送出することに
より処理液を撹拌して被処理基板を処理するもの
であり、バブルが浮上とバブル散乱板の下面に衝
突した際の分散・散乱とにより処理液を撹拌し、
且つその下面に対向する被処理基板がその撹拌の
領域内に位置するようにバブル散乱板を配置する
ことを特徴とする基板の表面処理方法。1. A substrate to be processed is placed on the upper surface of a plurality of bubble scattering plates that are arranged obliquely and substantially parallel to a bubble generation surface provided almost horizontally in a processing tank, and bubbles are emitted from the bubble generation surface. It processes the substrate by stirring the processing liquid by sending it into the processing tank, and the processing liquid is stirred by the floating bubbles and the dispersion and scattering when they collide with the bottom surface of the bubble scattering plate.
A method for surface treatment of a substrate, characterized in that a bubble scattering plate is arranged so that the substrate to be processed facing the lower surface thereof is located within the stirring area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9226679A JPS5617021A (en) | 1979-07-20 | 1979-07-20 | Surface treatment of substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9226679A JPS5617021A (en) | 1979-07-20 | 1979-07-20 | Surface treatment of substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5617021A JPS5617021A (en) | 1981-02-18 |
| JPS6325498B2 true JPS6325498B2 (en) | 1988-05-25 |
Family
ID=14049587
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9226679A Granted JPS5617021A (en) | 1979-07-20 | 1979-07-20 | Surface treatment of substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5617021A (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58123730A (en) * | 1982-01-18 | 1983-07-23 | Toshiba Corp | Semiconductor wafer etching device |
| JPS6386525A (en) * | 1986-09-30 | 1988-04-16 | Kyushu Denshi Kinzoku Kk | Device for etching semiconductor silicon wafer |
| JPH0160532U (en) * | 1987-10-13 | 1989-04-17 | ||
| US7648584B2 (en) * | 2003-06-27 | 2010-01-19 | Lam Research Corporation | Method and apparatus for removing contamination from substrate |
| CN103377878A (en) * | 2012-04-18 | 2013-10-30 | 三菱电机株式会社 | Manufacture method of roughened silicon substrate, process device thereof and manufacture method of solar cell element |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA1027465A (en) * | 1973-12-19 | 1978-03-07 | Robert J. Walsh | Processing of semiconductor wafers |
| JPS5110770A (en) * | 1974-07-16 | 1976-01-28 | Matsushita Electric Industrial Co Ltd | Etsuchinguhoho |
| JPS5115977A (en) * | 1974-07-31 | 1976-02-07 | Hitachi Ltd | Banjobutsuno keishaetsuchinguho |
-
1979
- 1979-07-20 JP JP9226679A patent/JPS5617021A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5617021A (en) | 1981-02-18 |
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