JPS6326625B2 - - Google Patents
Info
- Publication number
- JPS6326625B2 JPS6326625B2 JP10005280A JP10005280A JPS6326625B2 JP S6326625 B2 JPS6326625 B2 JP S6326625B2 JP 10005280 A JP10005280 A JP 10005280A JP 10005280 A JP10005280 A JP 10005280A JP S6326625 B2 JPS6326625 B2 JP S6326625B2
- Authority
- JP
- Japan
- Prior art keywords
- state
- voltage
- circuit
- switching
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Description
【発明の詳細な説明】
本発明は直流安定化電源回路に係り、スイツチ
ング素子の導通状態をスイツチングパルスのレベ
ルを入力電圧のレベルに応じて制御することによ
つて制御し、簡単な回路構成でスイツチングノイ
ズが少なく、高効率の直流安定化電源回路を提供
することを目的とする。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a DC stabilized power supply circuit, which controls the conduction state of a switching element by controlling the level of a switching pulse according to the level of an input voltage, and has a simple circuit configuration. The purpose of this invention is to provide a highly efficient DC stabilized power supply circuit with low switching noise.
第1図は従来のスイツチングレギユレータの一
例の回路図を示す。同図において、入力端子1に
入来した非安定直流電圧Viはトランジスタ等のス
イツチング素子2に供給され、ここでパルス幅変
調回路3からのパルス信号Pでチヨツピングさ
れ、スイツチング素子2がオフになつた時に後段
に電流を流し続けるためのフライホイールダイオ
ード4、平滑チヨーク5、平滑コンデンサ6にて
平滑されて出力端子7よりとり出される。この
際、出力電圧Vpはパルス幅変調回路3に供給さ
れ、出力電圧Vpのレベルが低下(上昇)した時
にはパルス信号Pのパルス幅がスイツチング素子
1の導通期間が長く(短かく)なる方向に動作し
て出力端子7より安定な電圧Vpをとり出すよう
に構成されている。パルス信号Pのデユーテイサ
イクルをδとした場合、出力電圧Vpは、Vp=(1
−δ)Viとなる。 FIG. 1 shows a circuit diagram of an example of a conventional switching regulator. In the figure, an unstable DC voltage V i that enters an input terminal 1 is supplied to a switching element 2 such as a transistor, where it is stopped by a pulse signal P from a pulse width modulation circuit 3, and the switching element 2 is turned off. When the current is smoothed, the current is smoothed by a flywheel diode 4, a smoothing circuit 5, and a smoothing capacitor 6 to continue flowing current to the subsequent stage, and then taken out from an output terminal 7. At this time, the output voltage V p is supplied to the pulse width modulation circuit 3, and when the level of the output voltage V p decreases (increases), the pulse width of the pulse signal P increases (shortens) the conduction period of the switching element 1. The output terminal 7 is configured to operate in the direction so as to output a stable voltage V p from the output terminal 7. When the duty cycle of the pulse signal P is δ, the output voltage V p is V p = (1
−δ)V i .
ところで、パルス信号Pのデユーテイサイクル
δを例えば0%付近や100%付近の極端な値に設
定するとパルス幅制御の設計が困難になるので、
通常50%前後を標準使用状態として設定すること
が多い。このため、このスイツチングレギユレー
タで入力電圧Viの略1/2の出力電圧Vpを得る場合
には好適である。 By the way, if the duty cycle δ of the pulse signal P is set to an extreme value, for example near 0% or 100%, it will be difficult to design pulse width control.
Normally, around 50% is often set as the standard usage state. Therefore, this switching regulator is suitable for obtaining an output voltage V p that is approximately 1/2 of the input voltage V i .
然るに、例えばテレビジヨン受像機において、
水平偏向パルスの周期に同期させてパルス信号P
のスイツチング周期を定める回路に適用した場
合、デユーテイサイクルδが50%前後ということ
は水平偏向の中央部付近でスイツチングすること
になり、このスイツチングの際に発生する高周波
振動が画面の略中央部に妨害となつて現われ、し
かもこの妨害の出る位置が入力電圧Viのレベル値
によつて変動するので画面が不自然になる等の欠
点があつた。又、電池を使用する機器において
は、実際に使用する電圧Vpに比して遥かに大き
な電圧Viを定格にもつ電流を使用しなければなら
ず不経済である欠点があつた。更に、パルス幅変
調回路3は構成が複雑であり、安価に構成し得な
い欠点があつた。 However, for example, in a television receiver,
The pulse signal P is synchronized with the period of the horizontal deflection pulse.
When applied to a circuit that determines the switching period of Moreover, since the position of this interference varies depending on the level value of the input voltage V i , the screen becomes unnatural. Furthermore, devices using batteries have the disadvantage of being uneconomical because they must use a current rated at a voltage V i that is much higher than the voltage V p actually used. Furthermore, the pulse width modulation circuit 3 has a complicated structure and cannot be constructed at low cost.
本発明は上記欠点を除去したものであり、第2
図以下と共にその一実施例について説明する。 The present invention eliminates the above drawbacks, and the second
An example will be described below with reference to the drawings.
第2図は本発明になる直流安定化電源回路の一
実施例の基本回路図を示し、同図中、第1図と同
一構成部分には同一番号を付す。同図中、8は出
力電圧比較用の標準電圧、9は演算増幅器、10
はスイツチングパルス信号Psの波高値決定用の標
準電圧、11,12はクランプ用ダイオード、1
3はクランプ用抵抗、14はスイツチング素子2
のバイアス抵抗、15は水平偏向パルス入力端子
である。水平偏向パルスPiの振幅はスイツチング
素子2に供給するパルスPsの振幅よりも大に設定
されている。 FIG. 2 shows a basic circuit diagram of an embodiment of the DC stabilized power supply circuit according to the present invention, in which the same components as in FIG. 1 are given the same numbers. In the figure, 8 is a standard voltage for output voltage comparison, 9 is an operational amplifier, and 10
is the standard voltage for determining the peak value of the switching pulse signal Ps , 11 and 12 are clamp diodes, 1
3 is a clamping resistor, 14 is a switching element 2
15 is a horizontal deflection pulse input terminal. The amplitude of the horizontal deflection pulse P i is set larger than the amplitude of the pulse P s supplied to the switching element 2 .
このものは入力端子1に入来する入力電圧Viを
スイツチング素子2、ダイオード4、コイル5、
コンデンサ6を介して出力端子7よりとり出す
際、入力電圧Viのレベル変動に応じてスイツチン
グ素子2の導通状態を制御して一定レベルの出力
電圧Vpを得るものである。端子15に入来した
水平偏向パルスPiは抵抗13を介してダイオード
11,12に供給されて電圧E3及び電圧(E2+
E3)にクランプされ、基底部が電圧E3、パルス
のピーク・ピーク値が電圧E2のパルス信号Psと
され、パルス信号Psの基底部及びピークのレベル
は入力電圧Viのレベル変動に応じた増幅器9の出
力電圧E3に応じて第3図に示す信号Ps〜Ps
の如く変化する。この場合、抵抗14、電圧E2
は信号Ps〜Psが得られるように適宜定められ
ている。 This device switches the input voltage V i entering the input terminal 1 through a switching element 2, a diode 4, a coil 5,
When the voltage is taken out from the output terminal 7 via the capacitor 6, the conduction state of the switching element 2 is controlled according to level fluctuations of the input voltage V i to obtain an output voltage V p at a constant level. The horizontal deflection pulse P i that enters the terminal 15 is supplied to the diodes 11 and 12 via the resistor 13, and the voltage E 3 and the voltage (E 2 +
E 3 ), the base is the voltage E 3 and the peak-to-peak values of the pulse are the voltage E 2 as the pulse signal P s , and the base and peak levels of the pulse signal P s are the level of the input voltage Vi . Depending on the output voltage E 3 of the amplifier 9 depending on the fluctuation, the signal P s to P s shown in FIG.
It changes like this. In this case, resistance 14, voltage E 2
is appropriately determined so that signals P s to P s can be obtained.
即ち、第3図に示す如く、スイツチング素子2
のオンレベルl1、オフレベルl2を定め、入力電圧
Viが標準値にある場合(の状態)、スイツチン
グ素子2はパルス信号Psに応じて導通状態(或い
は導通状態に近い状態)と遮断状態(或いは遮断
状態に近い状態)とを繰返され、所謂スイツチン
グレギユレータとしての動作となる。この状態か
ら入力電圧Viがやや低くなると(の状態)、パ
ルス信号Psの基底部レベルは低下し、基底部はス
イツチング素子2の導通レベルのままであるもパ
ルス部はハーフオンの状態となり、スイツチング
素子2は導通状態と非飽和能動状態とを繰返され
る。この状態から入力電圧Viが更に低くなると
(の状態)、パルス信号の基底部及びパルス部は
共にスイツチング素子2の導通レベルとなり、ス
イツチング素子2は常時導通状態となる。これと
は逆に入力電圧Viが標準値からやや高くなると
(及びの状態)、パルス信号Psの基底部及びパ
ルス部は上昇し、スイツチング素子2は非飽和状
態と遮断状態とを繰返され、所謂シリーズレギユ
レータとしての動作となる。 That is, as shown in FIG.
Determine the on level l 1 and off level l 2 of the input voltage
When V i is at the standard value (state), the switching element 2 repeats a conductive state (or a state close to a conductive state) and a cutoff state (or a state close to a cutoff state) according to the pulse signal P s, It operates as a so-called switching regulator. When the input voltage V i becomes slightly lower from this state, the base level of the pulse signal P s decreases, and although the base remains at the conduction level of the switching element 2, the pulse part becomes a half-on state. The switching element 2 is repeatedly switched between a conductive state and a non-saturated active state. When the input voltage V i further decreases from this state, both the base portion and the pulse portion of the pulse signal reach the conduction level of the switching element 2, and the switching element 2 is always in the conduction state. On the contrary, when the input voltage V i becomes slightly higher than the standard value (states of and ), the base and pulse parts of the pulse signal P s rise, and the switching element 2 repeats the unsaturated state and cutoff state. , it operates as a so-called series regulator.
これらの様子を入力電圧対出力電圧特性とスイ
ツチング素子2の損失との関係について表わすと
夫々第4図A,Bのようになる。入力電圧Vinが
低く標準出力電圧Vpsと等しい場合(の状態)、
スイツチング素子2は常時導通状態であるので回
路が理想的に動作すれば損失Ppは零である。入力
電圧Viがこれよりも高い場合(の状態)、スイ
ツチング素子2がパルス期間でハーフオンになつ
た分だけ損失Ppが増加し、の場合に比して電圧
降下が大になつて出力電圧Vpを一定にするよう
に動作する。入力電圧Visが標準出力電圧Vpsと等
しい場合(の状態)、スイツチング素子2は完
全なスイツチング動作であるので損失Ppは零であ
り、この時の入力電圧Visと出力電圧Vpsとの関係
は、Vps=(1−δ)Visとなる。この状態よりも
入力電圧Visが高い場合(及びの状態)、スイ
ツチング素子2は非飽和能動状態と遮断状態との
繰返しであるので損失Ppは入力電圧Visと共に一
様に増加し、電圧降下が大になつて出力電圧Vp
を一定にするように動作する。 These situations are expressed in terms of the relationship between the input voltage vs. output voltage characteristics and the loss of the switching element 2 as shown in FIGS. 4A and 4B, respectively. When the input voltage V in is low and equal to the standard output voltage V ps ,
Since the switching element 2 is always conductive, the loss P p is zero if the circuit operates ideally. When the input voltage V i is higher than this, the loss P p increases by the amount that switching element 2 is half-on during the pulse period, and the voltage drop becomes larger than in the case of , and the output voltage It operates to keep V p constant. When the input voltage V is is equal to the standard output voltage V ps (state), the switching element 2 performs a perfect switching operation, so the loss P p is zero, and the input voltage V is and output voltage V ps at this time are The relationship is V ps = (1-δ) V is . When the input voltage V is is higher than this state (states of and ), the switching element 2 repeats the non-saturated active state and cutoff state, so the loss P p increases uniformly with the input voltage V is , and the voltage As the drop increases, the output voltage V p
operates to keep it constant.
即ち、本発明回路は、第1図に示す如きパルス
幅変調回路3を用いてパルス幅を変化させるので
はなく、入力電圧レベルの変動に応じてパルス信
号Psのレベルを〜の状態に変化させてスイツ
チング素子2の導通状態を種々変化させ、一定の
出力電圧レベルを得るようにしている。 That is, the circuit of the present invention does not change the pulse width using the pulse width modulation circuit 3 as shown in FIG. By doing so, the conduction state of the switching element 2 is varied in order to obtain a constant output voltage level.
なお、スイツチング素子2がシリーズレギユレ
ータとしての動作しか行なわないとすれば、損失
Ppは第4図Bの破線に示す如く、の電圧安定化
を開始する入力電圧Vinから一様に増加する。 Note that if switching element 2 only operates as a series regulator, the loss
P p increases uniformly from the input voltage V in which starts voltage stabilization, as shown by the broken line in FIG. 4B.
第5図に示す如き放電特性を持つ電池の標準電
圧に回路の入力電圧Visを設定すれば、大部分の
使用状態で高効率を保ち、しかも出力電圧は使用
当初の高電圧から寿命末期の限界電圧迄安定化さ
れる。 If the input voltage V is of the circuit is set to the standard voltage of a battery with discharge characteristics as shown in Figure 5, high efficiency will be maintained under most usage conditions, and the output voltage will vary from the high voltage at the beginning of use to the end of life. Stabilized up to the limit voltage.
第6図は本発明回路の具体的回路図を示し、同
図中、第2図と同一構成部分には同一番号を付
す。同図中、16,17,18は出力電圧Vpの
レベルを調整するための抵抗器で、可変抵抗17
の摺動子から出力端子7迄の抵抗値をRA、可変
抵抗17の摺動子からアース迄の抵抗値をRBと
すると、出力電圧Vpは、Vp=RA+RB/RB・E1で定
められる。19は標準電圧E1を得るためのツエ
ナーダイオード、20はそのバイアス抵抗、21
は標準電圧E2を得るためのツエナーダイオード、
22はそのバイアス抵抗、23,24はバイパス
コンデンサである。この回路の動作及び効果は第
2図に示すものより容易に理解できるため、その
説明を省略する。 FIG. 6 shows a specific circuit diagram of the circuit of the present invention, in which the same components as in FIG. 2 are given the same numbers. In the figure, 16, 17, and 18 are resistors for adjusting the level of the output voltage V p , and variable resistor 17
If the resistance value from the slider of the variable resistor 17 to the output terminal 7 is R A , and the resistance value from the slider of the variable resistor 17 to the ground is R B , the output voltage V p is V p = R A + R B /R Defined in B・E 1 . 19 is a Zener diode for obtaining the standard voltage E1 , 20 is its bias resistance, 21
is a Zener diode to obtain the standard voltage E 2 ,
22 is its bias resistor, and 23 and 24 are bypass capacitors. Since the operation and effects of this circuit can be more easily understood than those shown in FIG. 2, their explanation will be omitted.
上述の如く、本発明になる直流安定化電源回路
は、出力電圧と基準電圧とを比較する比較回路
と、前記能動素子をスイツチングするためのスイ
ツチングパルスを発生するパルス発生回路と、前
記比較回路の出力により、入力電圧レベルの変動
に応じて前記スイツチングパルス全体のレベルを
変化させる回路とよりなり、スイツチング能動素
子を、入力電圧のレベル変動に応じて連続的な導
通状態、導通状態と非飽和能動状態との繰返し、
導通状態或いはこれに近い状態と遮断状態或いは
これに近い状態との繰返し、非飽和能動状態と遮
断状態との繰返し、のいずれかで動作するように
したため、スイツチング能動素子の導通状態を入
力電圧のレベル変動応じて制御するだけで一定レ
ベルの出力電圧を安定に得ることができ、従来の
スイツチングレギユレータの如きパルス幅変調回
路を用いる必要がなく、回路を簡単に、安価に構
成し得、又、スイツチングレギユレータに比して
スイツチングの際の寄生振動による妨害を軽減で
き、更に、スイツチングレギユレータのようにス
イツチングパルスを50%付近に定める必要はない
ので、例えば、テレビジヨン受像機の水平偏向パ
ルスの周期に同期させてパルス信号のスイツチン
グ周期を定める回路に適用した場合、スイツチン
グパルスの前縁、後縁を受像画面の左右端にする
ことができ、オーバスキヤンのために画面上の影
響のない位置にすることができ、より自然な画面
を得ることができ、又更に、スイツチングレギユ
レータのように出力電圧と標準入力電圧との比を
それ程大に設定する必要がないので、電池の数を
増加する必要はなく、電池使用の機器に好適であ
る等の特長を有する。 As described above, the DC stabilized power supply circuit according to the present invention includes a comparison circuit that compares an output voltage with a reference voltage, a pulse generation circuit that generates a switching pulse for switching the active element, and the comparison circuit. The circuit changes the overall level of the switching pulse according to the fluctuation of the input voltage level by the output of repetition with saturated active state,
Since the switching active element is operated in either a repeating state of conduction or a state close to this and a state of cutoff or a state close to this, or a repetition of a non-saturated active state and a cutoff state, the conduction state of the switching active element is controlled by changing the input voltage. A constant level output voltage can be stably obtained simply by controlling according to level fluctuations, there is no need to use a pulse width modulation circuit such as a conventional switching regulator, and the circuit can be configured easily and inexpensively. Also, compared to a switching regulator, interference due to parasitic vibrations during switching can be reduced, and unlike a switching regulator, there is no need to set the switching pulse at around 50%, so for example, When applied to a circuit that determines the switching period of a pulse signal in synchronization with the period of the horizontal deflection pulse of a television receiver, the leading and trailing edges of the switching pulse can be placed at the left and right edges of the receiving screen, resulting in overscanning. Therefore, it can be placed in a position without any influence on the screen, resulting in a more natural screen, and in addition, the ratio of the output voltage to the standard input voltage can be increased, such as with a switching regulator. Since there is no need to set the number of batteries, there is no need to increase the number of batteries, making it suitable for devices that use batteries.
第1図は従来のスイツチングレギユレータの一
例の回路図、第2図は本発明回路の一実施例の基
本回路図、第3図は本発明回路の動作を説明する
ための入力電圧とパルス信号のレベル、スイツチ
ング素子の動作状態との関係を示す図、第4図
A,Bは夫々本発明回路の動作を説明するための
入力電圧対出力電圧特性図及び入力電圧対損失特
性図、第5図は本発明回路に用いる電池の放電特
性図、第6図は本発明回路の具体的回路図であ
る。
1……入力電圧端子、2……スイツチング素
子、4……フライホイールダイオード、5……平
滑チヨーク、6……平滑コンデンサ、7……出力
端子、8……出力電圧比較用標準電圧、9……演
算増幅器、10……スイツチングパルス信号の波
高値決定用標準電圧、11,12……クランプ用
ダイオード、13……クランプ用抵抗、14……
スイツチング素子のバイアス抵抗、15……水平
偏向パルス入力端子。
FIG. 1 is a circuit diagram of an example of a conventional switching regulator, FIG. 2 is a basic circuit diagram of an embodiment of the circuit of the present invention, and FIG. A diagram showing the relationship between the level of the pulse signal and the operating state of the switching element; FIGS. 4A and 4B are an input voltage vs. output voltage characteristic diagram and an input voltage vs. loss characteristic diagram, respectively, for explaining the operation of the circuit of the present invention; FIG. 5 is a discharge characteristic diagram of a battery used in the circuit of the present invention, and FIG. 6 is a specific circuit diagram of the circuit of the present invention. 1... Input voltage terminal, 2... Switching element, 4... Flywheel diode, 5... Smoothing circuit, 6... Smoothing capacitor, 7... Output terminal, 8... Standard voltage for output voltage comparison, 9... ...Operation amplifier, 10... Standard voltage for determining the peak value of the switching pulse signal, 11, 12... Clamping diode, 13... Clamping resistor, 14...
Bias resistance of switching element, 15...Horizontal deflection pulse input terminal.
Claims (1)
の直列接続を経て負荷の一端を接続し、前記負荷
の他端は前記直流電源の他端に接続し、更に前記
能動素子とインダクタの接続点と前記直流電源の
他端との間に、前記能動素子が遮断状態の時に導
通するような向きにダイオードを挿通し、前記能
動素子の動作状態を制御することによつて前記負
荷に加わる直流電圧を制御する直流安定化電源回
路において、 出力電圧と基準電圧とを比較する比較回路と、 前記能動素子をスイツチングするためのスイツ
チングパルスを発生するパルス発生回路と、 前記比較回路の出力により、入力電圧レベルの
変動に応じて前記スイツチングパルス全体のレベ
ルを変化させる回路とよりなり、 前記直流電源の電圧値に応じて、前記能動素子
を、連続的な導通状態、導通状態と非飽和能動状
態との繰返し、導通状態或いはこれに近い状態と
遮断状態或いはこれに近い状態との繰返し、非飽
和能動状態と遮断状態との繰返し、のいずれかで
動作するようにしたことを特徴とする直流安定化
電源回路。[Claims] 1. One end of a load is connected from one end of a DC power source through a series connection of an active element and an inductor, the other end of the load is connected to the other end of the DC power source, and the active element and the inductor are connected to one end of the load. A diode is inserted between the connection point of the inductor and the other end of the DC power supply in a direction such that the active element is conductive when it is in a cut-off state, and the operating state of the active element is controlled. A DC stabilized power supply circuit that controls a DC voltage applied to a DC voltage source, comprising: a comparison circuit that compares an output voltage with a reference voltage; a pulse generation circuit that generates a switching pulse for switching the active element; The output is a circuit that changes the overall level of the switching pulse according to fluctuations in the input voltage level, and changes the active element into a continuous conductive state or a conductive state according to the voltage value of the DC power supply. It is characterized in that it operates in any of the following: repeating a non-saturated active state, repeating a conducting state or a state close to this and a cut-off state or a state close to this, repeating a non-saturated active state and a cut-off state. DC stabilized power supply circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10005280A JPS5725013A (en) | 1980-07-22 | 1980-07-22 | Direct current regulated electric power supplying circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10005280A JPS5725013A (en) | 1980-07-22 | 1980-07-22 | Direct current regulated electric power supplying circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5725013A JPS5725013A (en) | 1982-02-09 |
| JPS6326625B2 true JPS6326625B2 (en) | 1988-05-31 |
Family
ID=14263713
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10005280A Granted JPS5725013A (en) | 1980-07-22 | 1980-07-22 | Direct current regulated electric power supplying circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5725013A (en) |
-
1980
- 1980-07-22 JP JP10005280A patent/JPS5725013A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5725013A (en) | 1982-02-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6275397B1 (en) | Power factor correction control circuit for regulating the current waveshape in a switching power supply | |
| JP4493045B2 (en) | Switching regulator circuit | |
| US4546421A (en) | Flyback feedforward pulse width modulation regulator | |
| JP4405438B2 (en) | Slope compensation switching regulator and compensation method thereof | |
| US5469349A (en) | Power supply circuit and control circuit for use in a power supply circuit | |
| EP0519471B1 (en) | Amplification circuit | |
| US6184663B1 (en) | Apparatus for driving electric load | |
| US6198637B1 (en) | Switching power supply circuit | |
| JP2946091B2 (en) | Switching regulator | |
| US4521726A (en) | Control circuitry for a pulse-width-modulated switching power supply | |
| CN118100645B (en) | Constant voltage control circuit of step-down type switching power supply | |
| US4218730A (en) | Transistor switching apparatus for use in the control of a D.C. load | |
| EP0662747B1 (en) | A DC/DC converter for outputting multiple signals | |
| US4052645A (en) | Vertical deflection circuit | |
| JPS6326625B2 (en) | ||
| JPH08149804A (en) | Switching regulator type power supply circuit | |
| US4864251A (en) | Compensation circuit for power amplifier | |
| US6262898B1 (en) | Circuit for driving a switching transistor | |
| KR100415187B1 (en) | High Power Factor Correction Circuit | |
| JPH11110056A (en) | Power circuit | |
| JPS6126301B2 (en) | ||
| JP3456586B2 (en) | Deflection device | |
| JPH0923640A (en) | Pulse width modulation circuit for dc/dc converter | |
| JP3360419B2 (en) | Amplifier circuit | |
| SU1636957A1 (en) | Pulsed dc current regulator |