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JPS6327763B2 - - Google Patents
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JPS6327763B2 - - Google Patents

Info

Publication number
JPS6327763B2
JPS6327763B2 JP56050331A JP5033181A JPS6327763B2 JP S6327763 B2 JPS6327763 B2 JP S6327763B2 JP 56050331 A JP56050331 A JP 56050331A JP 5033181 A JP5033181 A JP 5033181A JP S6327763 B2 JPS6327763 B2 JP S6327763B2
Authority
JP
Japan
Prior art keywords
circuit
recording
magnetic head
impedance
differential amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56050331A
Other languages
Japanese (ja)
Other versions
JPS57164406A (en
Inventor
Chihiro Kamata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP5033181A priority Critical patent/JPS57164406A/en
Publication of JPS57164406A publication Critical patent/JPS57164406A/en
Publication of JPS6327763B2 publication Critical patent/JPS6327763B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/02Analogue recording or reproducing

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)

Description

【発明の詳細な説明】 本発明は新規な録音回路を用いたテープレコー
ダー回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a tape recorder circuit using a novel recording circuit.

最近テープレコーダーは増々小型化されてき
た。それに伴い電源として用いられる電池の本数
が少くされていく傾向があり、録音回路の動作電
圧が低電圧化されてきている。そのために録音回
路のダイナミツクレンジが狭くなつている。従つ
て十分な高域補償と録音レベルを確保するには磁
気ヘツドのインピーダンスを低くしなければなら
ない。ところが磁気ヘツドのインピーダンスを低
くすれば、磁気ヘツドの再生感度が減少し、SN
比が悪化し、特にステレオでハイフアイ再生する
場合は非常に困難となる。
Recently, tape recorders have become increasingly smaller. Along with this, there is a tendency to reduce the number of batteries used as a power source, and the operating voltage of recording circuits is becoming lower. As a result, the dynamic range of recording circuits has become narrower. Therefore, in order to ensure sufficient high frequency compensation and recording level, the impedance of the magnetic head must be made low. However, if the impedance of the magnetic head is lowered, the reproduction sensitivity of the magnetic head will decrease and the SN
The ratio deteriorates, making it extremely difficult to play back high-fidelity stereo signals.

本発明はそこで録音回路に互いに位相を反転し
た2チヤンネルの増幅器を設け、前記増幅器の出
力を夫々磁気ヘツドの両端に加えることによつて
増幅器の動作電圧が低くても、録音信号のダイナ
ミツクレンジを十分大きくとれることができるよ
うにしたテープレコーダーを提供するものであ
る。
Therefore, the present invention provides a recording circuit with two-channel amplifiers whose phases are inverted to each other, and applies the outputs of the amplifiers to both ends of the magnetic head, thereby increasing the dynamic range of the recording signal even if the operating voltage of the amplifier is low. To provide a tape recorder which can record a sufficiently large amount of data.

以下本発明を図面に従つて説明をする。1はマ
イクロホン、2はテープ3に信号を録音又は再生
する磁気ヘツド、4は前記マイクロホン1より得
られる電気信号を増幅等する録音回路で、一対の
出力端子5a,5bを有し、一方の出力端子5b
は定電源回路6及びバイアス発振回路7を介して
磁気ヘツド2の一端に接続され、又前記録音回路
4の他方の出力端子5aは直接に磁気ヘツド2の
他端に接続されている。8は磁気ヘツド2にて再
生された電気信号を増幅する再生回路で、その出
力はパワー増幅回路9に加えられる。前記録音回
路4は第2図に示す如く、マイクロホン1に接続
されたプリアンプ10、該プリアンプ10の出力
の位相を反転する位相反転器11、該位相反転器
11の出力を増幅するバツフアアンプ12と、前
記プリアンプ10の出力を直接増幅するバツフア
アンプ13とよりなり、バツフアアンプ12,1
3の出力端子5a,5bには位相が180度ずれた
大きさが等しい録音信号が取出されるようになつ
ている。
The present invention will be explained below with reference to the drawings. 1 is a microphone; 2 is a magnetic head for recording or reproducing signals on a tape 3; 4 is a recording circuit for amplifying the electric signal obtained from the microphone 1; it has a pair of output terminals 5a, 5b; terminal 5b
is connected to one end of the magnetic head 2 via a constant power supply circuit 6 and a bias oscillation circuit 7, and the other output terminal 5a of the recording circuit 4 is directly connected to the other end of the magnetic head 2. Reference numeral 8 denotes a reproducing circuit for amplifying the electric signal reproduced by the magnetic head 2, and its output is applied to a power amplifying circuit 9. As shown in FIG. 2, the recording circuit 4 includes a preamplifier 10 connected to the microphone 1, a phase inverter 11 that inverts the phase of the output of the preamplifier 10, and a buffer amplifier 12 that amplifies the output of the phase inverter 11. It consists of a buffer amplifier 13 that directly amplifies the output of the preamplifier 10, and buffer amplifiers 12 and 1.
Recording signals having a phase shift of 180 degrees and having the same magnitude are taken out from the output terminals 5a and 5b of No.3.

次に本発明の動作について説明をする。今録音
を行うには録音再出切換スイツチ14,15を図
示と異なる状態に切換える。斯る状態でマイクロ
ホン1に音声が加えられると、その音声はマイク
ロホン2で電気信号に変換され、その変換された
電気信号は動作状態にされた録音回路4に加えら
れる。
Next, the operation of the present invention will be explained. To perform recording now, the recording replay switches 14 and 15 are switched to a state different from that shown. When sound is applied to the microphone 1 in this state, the sound is converted into an electrical signal by the microphone 2, and the converted electrical signal is applied to the recording circuit 4 which is activated.

それで先ず前記電気信号はプリアンプ10で増
幅され、その一部は直接バツフアアンプ13に加
えられ、残部は位相反転器11で位相が反転され
た後、バツフアアンプ12で増幅される。従つて
出力端子5a,5bには大きさが等しく位相が
180度異なつた正負の録音信号が得られる。出力
端子5bの正の録音信号はパイアス発振回路7よ
りのバイアス信号とともに、磁気ヘツド2の一端
に加えられ、又出力端子5aの負の録音信号は磁
気ヘツド2の他端に加えられ、これら録音信号は
テープ3に録音される。このように磁気ヘツドの
両端には正負の録音信号が加えられるので、ダイ
ナミツクレンジは大きくなり、磁気ヘツド2のイ
ンピーダンスを高くとることができ、再生時にス
テレオハイフアイ再生が可能となる。ところで前
記の録音信号路を等価回路で表わすと、第4図の
ようになる。これから分るように出力端子5a,
5bよりみた録音回路4の内部インピーダンスを
Zinとすると、該内部インピーダンスZin→定電流
回路6→バイアス発振回路7→磁気ヘツド2→内
部インピーダンスZinとする閉回路ができる。こ
こで内部インピーダンスZinは定電流回路6のイ
ンピーダンスZ1、及び磁気ヘツド2のインピーダ
Z2に比して十分小さい必要がある。若し内部イン
ピーダンスZinが大きいと、磁気ヘツド2に必要
なバイアス電圧を供給することができず、又出力
端子5a,5bに加わるバイアス電圧が高くな
り、録音信号の重畳電圧がその分減少しダイナミ
ツクレンジが低下する等の欠点が生じた。
Therefore, the electrical signal is first amplified by a preamplifier 10, a part of which is directly applied to a buffer amplifier 13, and the remaining part is inverted in phase by a phase inverter 11 and then amplified by a buffer amplifier 12. Therefore, the output terminals 5a and 5b have the same magnitude and phase.
You can obtain positive and negative recording signals that differ by 180 degrees. The positive recording signal at the output terminal 5b is applied to one end of the magnetic head 2 together with the bias signal from the bias oscillation circuit 7, and the negative recording signal at the output terminal 5a is applied to the other end of the magnetic head 2. The signal is recorded on tape 3. Since positive and negative recording signals are applied to both ends of the magnetic head in this way, the dynamic range is increased, the impedance of the magnetic head 2 can be set high, and stereo high-fidelity reproduction is possible during reproduction. By the way, when the above-mentioned recording signal path is expressed as an equivalent circuit, it becomes as shown in FIG. As can be seen, the output terminal 5a,
The internal impedance of recording circuit 4 seen from 5b is
When Zin is assumed, a closed circuit is created in which the internal impedance Zin→constant current circuit 6→bias oscillation circuit 7→magnetic head 2→internal impedance Zin. Here, the internal impedance Zin is the impedance Z 1 of the constant current circuit 6 and the impedance of the magnetic head 2.
It needs to be sufficiently small compared to Z 2 . If the internal impedance Zin is large, it will not be possible to supply the necessary bias voltage to the magnetic head 2, and the bias voltage applied to the output terminals 5a and 5b will increase, and the superimposed voltage of the recording signal will decrease by that amount, causing the dynamometer to There were disadvantages such as a decrease in the range of water.

以上のことは、出力端子5b側は定電流回路6
の抵抗、若しくはバイパス用コンデンサの大きさ
を調整することによつて補償できるが、出力端子
5a側は直接再生回路8に接続されるため、上記
のような手段をとることができない。
The above means that the constant current circuit 6 on the output terminal 5b side
This can be compensated for by adjusting the size of the resistor or bypass capacitor, but since the output terminal 5a side is directly connected to the reproducing circuit 8, the above measures cannot be taken.

そこでバツフアアンプ12を第3図に示す如
く、差動アンプ16にて形成し、そして差動アン
プ16の入力インピーダンスZ2oはプリアンプ1
0の出力インピーダンスZsに比較し十分高い値
とし、差動アンプ16のオープンループゲインA
はバイアス信号の周波数foに於て十分に高く設定
し、帰還抵抗17,18による負帰還回路は帰還
率をβ、オープンゲインをAとしたときAβが十
分大きくなるようにしている。
Therefore, the buffer amplifier 12 is formed by a differential amplifier 16 as shown in FIG. 3, and the input impedance Z 2o of the differential amplifier 16 is
The open loop gain A of the differential amplifier 16 is set to a sufficiently high value compared to the output impedance Zs of 0.
is set to a sufficiently high frequency fo of the bias signal, and the negative feedback circuit including the feedback resistors 17 and 18 is configured such that Aβ becomes sufficiently large when the feedback rate is β and the open gain is A.

その結果録音信号は従来通り差動アンプ16で
増幅され、出力端子5aから磁気ヘツド2に供給
されるが、バイアス発振回路7よりみた差動アン
プ16の等価入力インピーダンスは非常に低い値
となる。
As a result, the recording signal is amplified by the differential amplifier 16 as before and supplied to the magnetic head 2 from the output terminal 5a, but the equivalent input impedance of the differential amplifier 16 as seen from the bias oscillation circuit 7 becomes a very low value.

このことを解折すると i=(Z1/1+Z2/1+Z3/1)(Eo−Eo′)…(1
) 但しi…差動アンプ16への電流 Eo…差動アンプ16の不動作時の出力端子5a
の電圧 Eo′…差動アンプ16の動作時の出力端子5aの
電圧 Z1…磁気ヘツド2のインピーダンス Z2…後段の増幅回路等その他負荷を総称したイン
ピーダンス Z3…帰還回路19の抵抗17のインピーダンスZf
と抵抗18のインピーダンスZsを加えたイン
ピーダンス。
Analyzing this, i=(Z 1 /1+Z 2 /1+Z 3 /1)(Eo−Eo')...(1
) However, i...Current Eo to the differential amplifier 16...Output terminal 5a of the differential amplifier 16 when it is not operating
Voltage Eo'... Voltage at output terminal 5a when differential amplifier 16 is in operation Z 1 ... Impedance Z 2 of magnetic head 2 ... Impedance Z 3 collectively referring to other loads such as the amplifier circuit in the subsequent stage... Voltage of resistor 17 of feedback circuit 19 Impedance Zf
The impedance is the sum of the impedance Zs of resistor 18.

一方差動アンプ16の入力インピーダンスZin
は抵抗18のインピーダンスZsに比して十分に
大きいので、負帰還電流i3′は i3′=Eo′/Zf+Zs …(2) 又負帰還率βは β=Zs/Zf+Zs …(3) さらに差動アンプ16の入力インピーダンス
Zinに比較してプリアンプ10の内部インピーダ
ンスは十分小さいため、差動アンプ16の正入力
端子20は接地されていると考えてよい。故に抵
抗18に誘起される電圧Ezsは Ezs=i3′Zs=βEo′ …(4) これが差動アンプ16の負入力端子21に加え
られ、オープンゲインAで増幅されるので、 Eo−Eo′/A=βEo …(5) ∴Eo−E′=AβEo …(6) Eo′/Eo=1/1+Aβ≒1/Aβ …(7) 例えばEo=6V Aβ=300とすれば Eo′=6×1/300=20mV 磁気ヘツド2のインピーダンスZ1を9Kppmとし、
又差動アンプ16の出力側からみた内部インピー
ダンスZnとすると Zn/Zn+Z1×Eo=Eo′ Zn×6=0.02×(Zn+9000) Zn≪Z1=9000 6Zn≒0.02×9000 Zn≒90/3=30(Ω) このように差動アンプ16の内部インピーダン
スZnは30Ωと非常に小さくなり、バイアス信号
の影響を殆んど受けないようにできる。
On the other hand, the input impedance Zin of the differential amplifier 16
is sufficiently large compared to the impedance Zs of the resistor 18, so the negative feedback current i 3 ′ is i 3 ′=Eo′/Zf+Zs…(2) and the negative feedback rate β is β=Zs/Zf+Zs…(3) Input impedance of differential amplifier 16
Since the internal impedance of the preamplifier 10 is sufficiently small compared to Zin, the positive input terminal 20 of the differential amplifier 16 can be considered to be grounded. Therefore, the voltage Ezs induced in the resistor 18 is Ezs=i 3 ′Zs=βEo′ (4) Since this is applied to the negative input terminal 21 of the differential amplifier 16 and amplified by the open gain A, Eo−Eo′ /A=βEo…(5) ∴Eo−E′=AβEo…(6) Eo′/Eo=1/1+Aβ≒1/Aβ…(7) For example, if Eo=6V Aβ=300, Eo′=6× 1/300=20mV Impedance Z1 of magnetic head 2 is 9Kppm,
Also, if the internal impedance Zn seen from the output side of the differential amplifier 16 is Zn/Zn+Z 1 ×Eo=Eo′ Zn×6=0.02×(Zn+9000) Zn≪Z 1 =9000 6Zn≒0.02×9000 Zn≒90/3= 30 (Ω) In this way, the internal impedance Zn of the differential amplifier 16 becomes very small, 30Ω, and can be made almost unaffected by the bias signal.

本発明のテープレコーダー回路は上述した如
く、録音回路より大きさが等しく位相が180度異
なる録音信号を取出し、これら録音信号を磁気ヘ
ツドに加えるようにしたので、磁気ヘツドに加え
られる録音信号のダイナミツクレンジを大きくと
れる。従つて磁気ヘツドのインピーダンスを大き
くすることができ、再生特性が向上する。
As mentioned above, the tape recorder circuit of the present invention extracts recording signals that are equal in magnitude but differ in phase by 180 degrees from the recording circuit and applies these recording signals to the magnetic head, so that the dynamometer of the recording signal applied to the magnetic head is You can get a large amount of honey cleanse. Therefore, the impedance of the magnetic head can be increased, and the reproduction characteristics can be improved.

しかも録音回路より大きさ等しく位相が異なる
録音信号を取出すときに問題となる録音回路の出
力端子からみた内部インピーダンスを小さくでき
るので、バイアス信号が録音信号に悪影響を及ぼ
すことが防止できる。
Furthermore, since the internal impedance seen from the output terminal of the recording circuit, which is a problem when extracting a recording signal having the same magnitude and a different phase from the recording circuit, can be reduced, it is possible to prevent the bias signal from adversely affecting the recording signal.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のテープレコーダー回路図、第
2図及び第3図は本発明のテープレコーダー回路
に用いられた録音回路及び差動アンプのブロツク
図、第4図は本発明の録音信号路の等価回路図で
ある。 1……マイクロホン、2……磁気ヘツド、4…
…録音回路、7……バイアス発振回路、10……
プリアンプ、11……位相反転器、12,13…
…バツフアアンプ。
FIG. 1 is a circuit diagram of a tape recorder according to the present invention, FIGS. 2 and 3 are block diagrams of a recording circuit and a differential amplifier used in the tape recorder circuit of the present invention, and FIG. 4 is a recording signal path according to the present invention. FIG. 1...Microphone, 2...Magnetic head, 4...
...Recording circuit, 7...Bias oscillation circuit, 10...
Preamplifier, 11... Phase inverter, 12, 13...
...Batsuhua amp.

Claims (1)

【特許請求の範囲】[Claims] 1 マイクロホンと、該マイクロホンに接続され
夫々大きさが等しく位相が180度異なる録音信号
を生じる第1及び第2のバツフアアンプを有する
録音回路と、一端がバイアス信号源を介して前記
第2のバツフアアンプに接続され他端がバイアス
信号源を介さず第1のバツフアアンプに接続され
た磁気ヘツドとよりなり、前記バツフアアンプを
差動増幅回路にて構成し該差動増幅回路の入力イ
ンピーダンスを出力インピーダンスに比して十分
に高く、且つ前記差動増幅回路のオープンゲイン
をバイアス信号の周波数に対して十分に高く、負
帰還率を十分に大きく設定したことを特徴とする
テープレコーダー回路。
1. A recording circuit having a microphone, first and second buffer amplifiers that are connected to the microphone and generate recording signals that are equal in magnitude and have a phase difference of 180 degrees, and one end of which is connected to the second buffer amplifier via a bias signal source. and a magnetic head whose other end is connected to a first buffer amplifier without going through a bias signal source, the buffer amplifier being constituted by a differential amplifier circuit, and the input impedance of the differential amplifier circuit being compared to the output impedance. The tape recorder circuit is characterized in that the open gain of the differential amplifier circuit is set to be sufficiently high with respect to the frequency of the bias signal, and the negative feedback rate is set to be sufficiently large.
JP5033181A 1981-04-02 1981-04-02 Tape recording circuit Granted JPS57164406A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5033181A JPS57164406A (en) 1981-04-02 1981-04-02 Tape recording circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5033181A JPS57164406A (en) 1981-04-02 1981-04-02 Tape recording circuit

Publications (2)

Publication Number Publication Date
JPS57164406A JPS57164406A (en) 1982-10-09
JPS6327763B2 true JPS6327763B2 (en) 1988-06-06

Family

ID=12855922

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5033181A Granted JPS57164406A (en) 1981-04-02 1981-04-02 Tape recording circuit

Country Status (1)

Country Link
JP (1) JPS57164406A (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS601689B2 (en) * 1978-11-24 1985-01-17 パイオニア株式会社 magnetic recording amplifier

Also Published As

Publication number Publication date
JPS57164406A (en) 1982-10-09

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